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319 lines
9.8 KiB
ArmAsm
319 lines
9.8 KiB
ArmAsm
# asmtst.tpl
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.include "defines.s"
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# -------------------------------------------------------------------------------------------------
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# c-accessible
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.global init_tst
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.global tst_start
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.global tst_end
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.global tst_inits
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.global tst_results
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.global tst_expects
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# -------------------------------------------------------------------------------------------------
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tst_misc:
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tst_info: .asciz "info text"
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tst_header: .asciz "header text"
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.set SAVESPR,tar
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.set MAGIC,0x8675309
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# -------------------------------------------------------------------------------------------------
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.align 5
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tst_inits:
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init_r0: .int 0x00000000
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init_r1: .int 0x5822C905
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init_r2: .int 0xFFFFFFFF
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init_r3: .int 0x91B6D1A3
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init_r4: .int 0xFFFFFFFF
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init_r5: .int 0xFFFFFFFF
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init_r6: .int 0xFFFFFFFF
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init_r7: .int 0xFFFFFFFF
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init_r8: .int 0xFFFFFFFF
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init_r9: .int 0x7E11EE88
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init_r10: .int 0xFFFFFFFF
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init_r11: .int 0x7FFFFFFF
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init_r12: .int 0xFFFFFFFF
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init_r13: .int 0xFFFFFFFF
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init_r14: .int 0x8C20BDE6
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init_r15: .int 0xFFFFFFFF
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init_r16: .int 0x76D0DADF
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init_r17: .int 0x15111F42
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init_r18: .int 0xFFFFFFFF
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init_r19: .int 0x36108E50
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init_r20: .int 0xFFFFFFFF
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init_r21: .int 0xFFFFFFFF
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init_r22: .int 0x328A0CED
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init_r23: .int 0xFFFFFFFF
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init_r24: .int 0xFFFFFFFF
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init_r25: .int 0xAF224C19
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init_r26: .int 0xFFFFFFFF
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init_r27: .int 0xFFFFFFFF
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init_r28: .int 0xD624B27A
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init_r29: .int 0xFFFFFFFF
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init_r30: .int 0xFFFFFFFF
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init_r31: .int 0xFFFFFFFF
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init_cr: .int 0xDBFD3628
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init_xer: .int 0x89F0006E
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init_ctr: .int 0xFFFFFFFF
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init_lr: .int 0xFFFFFFFF
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init_tar: .int 0xFFFFFFFF
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init_msr: .int 0x00001104
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init_iar: .int 0x00010000
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save_r1: .int 0
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codelen: .int 13
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ops: .int 0x7C61CC14,0x7D230595,0x7AC37392,0x7E094C11,0x7E1CB115,0x7A338886,0x7C6004D1,0x7E09B038,0x7C360591,0x7E2B00D1,0x60000000,0x60000000,0x60000000
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iars: .int 0x00010000,0x00010004,0x00010008,0x0001000C,0x00010010,0x00010014,0x00010018,0x0001001C,0x00010020,0x00010024,0x00010028,0x0001002C,0x00010030
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# -------------------------------------------------------------------------------------------------
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# r3=@tst_inits
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.align 5
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init_tst:
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# save c stuff
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stw r1,(save_r1-tst_inits)(r3)
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# copy ops
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opcopy:
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lwz r1,(codelen-tst_inits)(r3)
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mtctr r1
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la r1,(ops-tst_inits)(r3) # @ ops list
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la r2,(iars-tst_inits)(r3) # @ iars list
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opcopy_loop:
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lwz r4,0(r1) # next op
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lwz r5,0(r2) # next iar
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stw r4,0(r5) # store it
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addi r1,r1,4 # inc to next
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addi r2,r2,4
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bdnz opcopy_loop
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# add end of test op - could be done here or by builder
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# ways to end:
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# ba <fixed_loc> - avoid reloc, target op can then branch to tst_end
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# trap,sc,scv - branch to tst_end in handler
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# attn, priv op, etc. - "
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# overwrite the last epilogue op to avoid any crossing
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opcopy_eot:
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lis r4,0x4800
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ori r4,r4,0x0006 # ba 0x0004
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stw r4,0(r5)
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# get tst start
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lwz r1,init_msr(r0)
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mtsrr1 r1
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lwz r1,iars(r0)
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mtsrr0 r1
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# init test regs
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init_regs:
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lwz r1,(init_cr-tst_inits)(r3)
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mtcr r1
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lwz r1,(init_xer-tst_inits)(r3)
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mtxer r1
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lwz r1,(init_ctr-tst_inits)(r3)
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mtctr r1
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lwz r1,(init_lr-tst_inits)(r3)
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mtlr r1
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lwz r1,(init_tar-tst_inits)(r3)
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mtspr tar,r1
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lwz r0,(init_r0-tst_inits)(r3)
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lwz r1,(init_r1-tst_inits)(r3)
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lwz r2,(init_r2-tst_inits)(r3)
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lwz r4,(init_r4-tst_inits)(r3)
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lwz r5,(init_r5-tst_inits)(r3)
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lwz r6,(init_r6-tst_inits)(r3)
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lwz r7,(init_r7-tst_inits)(r3)
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lwz r8,(init_r8-tst_inits)(r3)
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lwz r9,(init_r9-tst_inits)(r3)
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lwz r10,(init_r10-tst_inits)(r3)
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lwz r11,(init_r11-tst_inits)(r3)
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lwz r12,(init_r12-tst_inits)(r3)
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lwz r13,(init_r13-tst_inits)(r3)
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lwz r14,(init_r14-tst_inits)(r3)
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lwz r15,(init_r15-tst_inits)(r3)
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lwz r16,(init_r16-tst_inits)(r3)
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lwz r17,(init_r17-tst_inits)(r3)
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lwz r18,(init_r18-tst_inits)(r3)
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lwz r19,(init_r19-tst_inits)(r3)
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lwz r20,(init_r20-tst_inits)(r3)
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lwz r21,(init_r21-tst_inits)(r3)
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lwz r22,(init_r22-tst_inits)(r3)
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lwz r23,(init_r23-tst_inits)(r3)
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lwz r24,(init_r24-tst_inits)(r3)
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lwz r25,(init_r25-tst_inits)(r3)
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lwz r26,(init_r26-tst_inits)(r3)
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lwz r27,(init_r27-tst_inits)(r3)
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lwz r28,(init_r28-tst_inits)(r3)
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lwz r29,(init_r29-tst_inits)(r3)
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lwz r30,(init_r30-tst_inits)(r3)
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lwz r31,(init_r31-tst_inits)(r3)
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lwz r3,(init_r3-tst_inits)(r3)
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jmp2tst:
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rfi
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#rfid
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#ba 0x10000
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tst_end:
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b save_results
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# -------------------------------------------------------------------------------------------------
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.align 5
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save_results:
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# use a designated spr to save (sprgx, ...)
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mtspr SAVESPR,r1
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lis r1,tst_results@h
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ori r1,r1,tst_results@l
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stw r0,(rslt_r0-tst_results)(r1)
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stw r2,(rslt_r2-tst_results)(r1)
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stw r3,(rslt_r3-tst_results)(r1)
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stw r4,(rslt_r4-tst_results)(r1)
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stw r5,(rslt_r5-tst_results)(r1)
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stw r6,(rslt_r6-tst_results)(r1)
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stw r7,(rslt_r7-tst_results)(r1)
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stw r8,(rslt_r8-tst_results)(r1)
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stw r9,(rslt_r9-tst_results)(r1)
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stw r10,(rslt_r10-tst_results)(r1)
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stw r11,(rslt_r11-tst_results)(r1)
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stw r12,(rslt_r12-tst_results)(r1)
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stw r13,(rslt_r13-tst_results)(r1)
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stw r14,(rslt_r14-tst_results)(r1)
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stw r15,(rslt_r15-tst_results)(r1)
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stw r16,(rslt_r16-tst_results)(r1)
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stw r17,(rslt_r17-tst_results)(r1)
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stw r18,(rslt_r18-tst_results)(r1)
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stw r19,(rslt_r19-tst_results)(r1)
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stw r20,(rslt_r20-tst_results)(r1)
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stw r21,(rslt_r21-tst_results)(r1)
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stw r22,(rslt_r22-tst_results)(r1)
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stw r23,(rslt_r23-tst_results)(r1)
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stw r24,(rslt_r24-tst_results)(r1)
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stw r25,(rslt_r25-tst_results)(r1)
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stw r26,(rslt_r26-tst_results)(r1)
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stw r27,(rslt_r27-tst_results)(r1)
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stw r28,(rslt_r28-tst_results)(r1)
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stw r29,(rslt_r29-tst_results)(r1)
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stw r30,(rslt_r30-tst_results)(r1)
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stw r31,(rslt_r31-tst_results)(r1)
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mfspr r2,SAVESPR
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stw r2,(rslt_r1-tst_results)(r1)
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mfcr r2
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stw r2,(rslt_cr-tst_results)(r1)
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mfxer r2
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stw r2,(rslt_xer-tst_results)(r1)
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mfctr r2
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stw r2,(rslt_ctr-tst_results)(r1)
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mflr r2
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stw r2,(rslt_lr-tst_results)(r1)
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mfspr r2,tar
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stw r2,(rslt_tar-tst_results)(r1)
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tst_cleanup:
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# restore c stuff
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lis r3,tst_inits@h
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ori r3,r3,tst_inits@l
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lwz r1,(save_r1-tst_inits)(r3)
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lis r3,MAGIC@h
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ori r3,r3,MAGIC@l
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bla tst_done
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# -------------------------------------------------------------------------------------------------
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.align 5
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tst_results:
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rslt_r0: .int 0xFFFFFFFF
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rslt_r1: .int 0xFFFFFFFF
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rslt_r2: .int 0xFFFFFFFF
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rslt_r3: .int 0xFFFFFFFF
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rslt_r4: .int 0xFFFFFFFF
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rslt_r5: .int 0xFFFFFFFF
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rslt_r6: .int 0xFFFFFFFF
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rslt_r7: .int 0xFFFFFFFF
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rslt_r8: .int 0xFFFFFFFF
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rslt_r9: .int 0xFFFFFFFF
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rslt_r10: .int 0xFFFFFFFF
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rslt_r11: .int 0xFFFFFFFF
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rslt_r12: .int 0xFFFFFFFF
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rslt_r13: .int 0xFFFFFFFF
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rslt_r14: .int 0xFFFFFFFF
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rslt_r15: .int 0xFFFFFFFF
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rslt_r16: .int 0xFFFFFFFF
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rslt_r17: .int 0xFFFFFFFF
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rslt_r18: .int 0xFFFFFFFF
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rslt_r19: .int 0xFFFFFFFF
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rslt_r20: .int 0xFFFFFFFF
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rslt_r21: .int 0xFFFFFFFF
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rslt_r22: .int 0xFFFFFFFF
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rslt_r23: .int 0xFFFFFFFF
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rslt_r24: .int 0xFFFFFFFF
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rslt_r25: .int 0xFFFFFFFF
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rslt_r26: .int 0xFFFFFFFF
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rslt_r27: .int 0xFFFFFFFF
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rslt_r28: .int 0xFFFFFFFF
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rslt_r29: .int 0xFFFFFFFF
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rslt_r30: .int 0xFFFFFFFF
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rslt_r31: .int 0xFFFFFFFF
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rslt_cr: .int 0xFFFFFFFF
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rslt_xer: .int 0xFFFFFFFF
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rslt_ctr: .int 0xFFFFFFFF
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rslt_lr: .int 0xFFFFFFFF
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rslt_tar: .int 0xFFFFFFFF
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# -------------------------------------------------------------------------------------------------
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.align 5
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tst_expects:
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expt_r0: .int 0x00000000
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expt_r1: .int 0xCD75F313
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expt_r2: .int 0xFFFFFFFF
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expt_r3: .int 0x00000000
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expt_r4: .int 0xFFFFFFFF
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expt_r5: .int 0xFFFFFFFF
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expt_r6: .int 0xFFFFFFFF
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expt_r7: .int 0xFFFFFFFF
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expt_r8: .int 0xFFFFFFFF
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expt_r9: .int 0x008A0C68
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expt_r10: .int 0xFFFFFFFF
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expt_r11: .int 0x7FFFFFFF
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expt_r12: .int 0xFFFFFFFF
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expt_r13: .int 0xFFFFFFFF
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expt_r14: .int 0x8C20BDE6
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expt_r15: .int 0xFFFFFFFF
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expt_r16: .int 0x08AEBF68
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expt_r17: .int 0x80000001
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expt_r18: .int 0xFFFFFFFF
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expt_r19: .int 0x00000000
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expt_r20: .int 0xFFFFFFFF
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expt_r21: .int 0xFFFFFFFF
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expt_r22: .int 0x328A0CED
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expt_r23: .int 0xFFFFFFFF
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expt_r24: .int 0xFFFFFFFF
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expt_r25: .int 0xAF224C19
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expt_r26: .int 0xFFFFFFFF
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expt_r27: .int 0xFFFFFFFF
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expt_r28: .int 0xD624B27A
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expt_r29: .int 0xFFFFFFFF
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expt_r30: .int 0xFFFFFFFF
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expt_r31: .int 0xFFFFFFFF
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expt_cr: .int 0x9BFD3628
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expt_xer: .int 0x98F0006E
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expt_ctr: .int 0xFFFFFFFF
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expt_lr: .int 0xFFFFFFFF
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expt_tar: .int 0xFFFFFFFF
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expt_msr: .int 0x00001104
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expt_iar: .int 0x00010038
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