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81 lines
1.9 KiB
Tcl
81 lines
1.9 KiB
Tcl
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# Create Project
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create_project -force -name cmod7_kintex -part xc7k410t-ffv676-1
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set_msg_config -id {Common 17-55} -new_severity {Warning}
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# Add Sources
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add_files {/data/projects/a2o/dev/build/litex/a2o/verilog/a2o_litex}
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add_files {/data/projects/a2o/dev/build/litex/a2o/verilog/trilib}
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add_files {/data/projects/a2o/dev/build/litex/a2o/verilog/trilib_clk1x}
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add_files {/data/projects/a2o/dev/build/litex/a2o/verilog/work}
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read_verilog {/data/projects/a2o/dev/build/litex/build/cmod7_kintex/gateware/cmod7_kintex.v}
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# Add EDIFs
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# Add IPs
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# Add constraints
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read_xdc cmod7_kintex.xdc
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set_property PROCESSING_ORDER EARLY [get_files cmod7_kintex.xdc]
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# Add pre-synthesis commands
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# Synthesis
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synth_design -directive default -top cmod7_kintex -part xc7k410t-ffv676-1
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# Synthesis report
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report_timing_summary -file cmod7_kintex_timing_synth.rpt
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report_utilization -hierarchical -file cmod7_kintex_utilization_hierarchical_synth.rpt
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report_utilization -file cmod7_kintex_utilization_synth.rpt
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# Optimize design
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opt_design -directive default
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# Add pre-placement commands
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# Placement
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place_design -directive default
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# Placement report
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report_utilization -hierarchical -file cmod7_kintex_utilization_hierarchical_place.rpt
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report_utilization -file cmod7_kintex_utilization_place.rpt
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report_io -file cmod7_kintex_io.rpt
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report_control_sets -verbose -file cmod7_kintex_control_sets.rpt
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report_clock_utilization -file cmod7_kintex_clock_utilization.rpt
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# Add pre-routing commands
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# Routing
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route_design -directive default
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phys_opt_design -directive default
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write_checkpoint -force cmod7_kintex_route.dcp
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# Routing report
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report_timing_summary -no_header -no_detailed_paths
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report_route_status -file cmod7_kintex_route_status.rpt
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report_drc -file cmod7_kintex_drc.rpt
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report_timing_summary -datasheet -max_paths 10 -file cmod7_kintex_timing.rpt
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report_power -file cmod7_kintex_power.rpt
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# Bitstream generation
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write_bitstream -force cmod7_kintex.bit
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# End
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quit |