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157 lines
4.8 KiB
Plaintext
157 lines
4.8 KiB
Plaintext
Memory Size=01000000B
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Loading memory from rom.bin.hex...
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Seed=08675309
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Cores: 4
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Resetting...
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Go!
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>>> UART_0:
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>>> UART_1:
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>>> UART_2:
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>>> UART_3:
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>>> UART_0:A2Node Test!
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>>> UART_1:A2Node Test!
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>>> UART_2:A2Node Test!
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>>> UART_3:A2Node Test!
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>>> UART_0:
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>>> UART_1:
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>>> UART_2:
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>>> UART_3:
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>>> UART_0:Coremark test
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>>> UART_1:Coremark test
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>>> UART_2:Coremark test
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>>> UART_3:Coremark test
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>>> UART_0:Iterations: 1000
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>>> UART_1:Iterations: 1000
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>>> UART_2:Iterations: 1000
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>>> UART_3:Iterations: 1000
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>>> UART_0:Initing...
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>>> UART_1:Initing...
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>>> UART_2:Initing...
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>>> UART_3:Initing...
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>>> UART_0:List: 00FFF7CC 0000029A 00FFF7CC 00000000
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>>> UART_1:List: 00BFF7CC 0000029A 00BFF7CC 00000000
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>>> UART_2:List: 007FF7CC 0000029A 007FF7CC 00000000
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>>> UART_3:List: 003FF7CC 0000029A 003FF7CC 00000000
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>>> UART_0:Matrix: 00FFF7B0 0000029A 00FFFA66 00000000
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>>> UART_1:Matrix: 00BFF7B0 0000029A 00BFFA66 00000000
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>>> UART_2:Matrix: 007FF7B0 0000029A 007FFA66 00000000
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>>> UART_3:Matrix: 003FF7B0 0000029A 003FFA66 00000000
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>>> UART_0:State: 0000029A 00FFFD00 00000000
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>>> UART_1:State: 0000029A 00BFFD00 00000000
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>>> UART_2:State: 0000029A 007FFD00 00000000
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>>> UART_3:State: 0000029A 003FFD00 00000000
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>>> UART_0:Starting...
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>>> UART_1:Starting...
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>>> UART_2:Starting...
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>>> UART_3:Starting...
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cyc=40000000
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cyc=80000000
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cyc=120000000
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cyc=160000000
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cyc=200000000
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cyc=240000000
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cyc=280000000
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cyc=320000000
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cyc=360000000
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cyc=400000000
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cyc=440000000
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cyc=480000000
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cyc=520000000
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cyc=560000000
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cyc=600000000
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>>> UART_0:2K performance run parameters for coremark.
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>>> UART_1:2K performance run parameters for coremark.
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>>> UART_0:CoreMark Size : 666
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>>> UART_1:CoreMark Size : 666
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>>> UART_0:Total ticks : 639078926
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>>> UART_1:Total ticks : 639079903
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>>> UART_0:Total time (secs): 6
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>>> UART_1:Total time (secs): 6
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>>> UART_0:Iterations/Sec : 166
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>>> UART_1:Iterations/Sec : 166
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>>> UART_0:ERROR! Must execute for at least 10 secs for a valid result!
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>>> UART_1:ERROR! Must execute for at least 10 secs for a valid result!
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>>> UART_2:2K performance run parameters for coremark.
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>>> UART_0:Iterations : 1000
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>>> UART_3:2K performance run parameters for coremark.
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>>> UART_1:Iterations : 1000
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>>> UART_0:Compiler version : GCC9.3.0
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>>> UART_2:CoreMark Size : 666
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>>> UART_1:Compiler version : GCC9.3.0
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>>> UART_0:Compiler flags :
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>>> UART_3:CoreMark Size : 666
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>>> UART_1:Compiler flags :
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>>> UART_2:Total ticks : 639099865
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>>> UART_0:Memory location : STACK
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>>> UART_1:Memory location : STACK
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>>> UART_3:Total ticks : 639102185
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>>> UART_2:Total time (secs): 6
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>>> UART_0:seedcrc : 0xe9f5
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>>> UART_1:seedcrc : 0xe9f5
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>>> UART_3:Total time (secs): 6
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>>> UART_2:Iterations/Sec : 166
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>>> UART_0:[0]crclist : 0xe714
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>>> UART_3:Iterations/Sec : 166
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>>> UART_1:[0]crclist : 0xe714
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>>> UART_2:ERROR! Must execute for at least 10 secs for a valid result!
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>>> UART_0:[0]crcmatrix : 0x1fd7
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>>> UART_3:ERROR! Must execute for at least 10 secs for a valid result!
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>>> UART_1:[0]crcmatrix : 0x1fd7
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>>> UART_2:Iterations : 1000
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>>> UART_3:Iterations : 1000
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>>> UART_0:[0]crcstate : 0x8e3a
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>>> UART_2:Compiler version : GCC9.3.0
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>>> UART_1:[0]crcstate : 0x8e3a
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>>> UART_2:Compiler flags :
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>>> UART_3:Compiler version : GCC9.3.0
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>>> UART_0:[0]crcfinal : 0xd340
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>>> UART_3:Compiler flags :
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>>> UART_2:Memory location : STACK
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>>> UART_1:[0]crcfinal : 0xd340
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>>> UART_3:Memory location : STACK
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>>> UART_2:seedcrc : 0xe9f5
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>>> UART_0:Correct operation validated. See README.md for run and reporting rules.
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>>> UART_0:
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>>> UART_3:seedcrc : 0xe9f5
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>>> UART_0:Pass.
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>>> UART_0:
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cyc=639212365 WBI Data @=0000f000 data=00000048
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** pass address ifetch'd (1)...
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>>> UART_1:Correct operation validated. See README.md for run and reporting rules.
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>>> UART_1:
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>>> UART_1:Pass.
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>>> UART_1:
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cyc=639213694 WBI Data @=0000f000 data=00000048
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** pass address ifetch'd (2)...
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>>> UART_2:[0]crclist : 0xe714
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>>> UART_3:[0]crclist : 0xe714
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>>> UART_2:[0]crcmatrix : 0x1fd7
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>>> UART_3:[0]crcmatrix : 0x1fd7
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>>> UART_2:[0]crcstate : 0x8e3a
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>>> UART_3:[0]crcstate : 0x8e3a
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>>> UART_2:[0]crcfinal : 0xd340
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>>> UART_3:[0]crcfinal : 0xd340
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>>> UART_2:Correct operation validated. See README.md for run and reporting rules.
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>>> UART_2:
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>>> UART_2:Pass.
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>>> UART_2:
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cyc=639232242 WBI Data @=0000f000 data=00000048
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** pass address ifetch'd (3)...
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>>> UART_3:Correct operation validated. See README.md for run and reporting rules.
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>>> UART_3:
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>>> UART_3:Pass.
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>>> UART_3:
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cyc=639234350 WBI Data @=0000f000 data=00000048
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** pass address ifetch'd (4)...
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Statistics
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IFetch: 11416960
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DRead: 00007676
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DWrite: 111415376
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Done.
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You has opulence.
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Seed=08675309
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