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79 lines
1.8 KiB
Tcl
79 lines
1.8 KiB
Tcl
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# Create Project
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create_project -force -name caravel_user -part xc7a35t-CPG236-1
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set_msg_config -id {Common 17-55} -new_severity {Warning}
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# Add Sources
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read_verilog {/home/wtf/projects/a2p-opf/build/openroad/litex/momv modules/issiram.v}
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read_verilog {/home/wtf/projects/a2p-opf/build/openroad/litex/a2p/verilog/A2P_WB.v}
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read_verilog {/home/wtf/projects/a2p-opf/build/openroad/litex/build/caravel_user/gateware/caravel_user.v}
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# Add EDIFs
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# Add IPs
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# Add constraints
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read_xdc caravel_user.xdc
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set_property PROCESSING_ORDER EARLY [get_files caravel_user.xdc]
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# Add pre-synthesis commands
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# Synthesis
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synth_design -directive default -top caravel_user -part xc7a35t-CPG236-1
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# Synthesis report
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report_timing_summary -file caravel_user_timing_synth.rpt
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report_utilization -hierarchical -file caravel_user_utilization_hierarchical_synth.rpt
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report_utilization -file caravel_user_utilization_synth.rpt
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# Optimize design
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opt_design -directive default
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# Add pre-placement commands
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# Placement
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place_design -directive default
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# Placement report
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report_utilization -hierarchical -file caravel_user_utilization_hierarchical_place.rpt
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report_utilization -file caravel_user_utilization_place.rpt
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report_io -file caravel_user_io.rpt
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report_control_sets -verbose -file caravel_user_control_sets.rpt
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report_clock_utilization -file caravel_user_clock_utilization.rpt
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# Add pre-routing commands
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# Routing
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route_design -directive default
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phys_opt_design -directive default
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write_checkpoint -force caravel_user_route.dcp
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# Routing report
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report_timing_summary -no_header -no_detailed_paths
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report_route_status -file caravel_user_route_status.rpt
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report_drc -file caravel_user_drc.rpt
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report_timing_summary -datasheet -max_paths 10 -file caravel_user_timing.rpt
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report_power -file caravel_user_power.rpt
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# Bitstream generation
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write_bitstream -force caravel_user.bit
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# End
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quit |