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56 lines
1.5 KiB
C
56 lines
1.5 KiB
C
//--------------------------------------------------------------------------------
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// Auto-generated by Migen (9a0be7a) & LiteX (85d6cb4b) on 2021-11-25 13:53:32
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//--------------------------------------------------------------------------------
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#ifndef __GENERATED_SOC_H
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#define __GENERATED_SOC_H
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#define CONFIG_CLOCK_FREQUENCY 50000000
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#define CONFIG_CPU_HAS_INTERRUPT
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#define CONFIG_CPU_RESET_ADDR 0
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#define CONFIG_CPU_TYPE_A2P
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#define CONFIG_CPU_VARIANT_STANDARD
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#define CONFIG_CPU_HUMAN_NAME "A2P_WB"
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#define CONFIG_CPU_NOP "nop"
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#define CONFIG_WITH_BUILD_TIME
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#define UART_POLLING
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#define CONFIG_CSR_DATA_WIDTH 32
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#define CONFIG_CSR_ALIGNMENT 32
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#define CONFIG_BUS_STANDARD "WISHBONE"
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#define CONFIG_BUS_DATA_WIDTH 32
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#define CONFIG_BUS_ADDRESS_WIDTH 32
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#define TIMER0_INTERRUPT 0
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#ifndef __ASSEMBLER__
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static inline int config_clock_frequency_read(void) {
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return 50000000;
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}
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static inline int config_cpu_reset_addr_read(void) {
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return 0;
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}
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static inline const char * config_cpu_human_name_read(void) {
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return "A2P_WB";
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}
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static inline const char * config_cpu_nop_read(void) {
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return "nop";
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}
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static inline int config_csr_data_width_read(void) {
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return 32;
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}
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static inline int config_csr_alignment_read(void) {
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return 32;
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}
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static inline const char * config_bus_standard_read(void) {
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return "WISHBONE";
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}
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static inline int config_bus_data_width_read(void) {
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return 32;
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}
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static inline int config_bus_address_width_read(void) {
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return 32;
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}
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static inline int timer0_interrupt_read(void) {
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return 0;
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}
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#endif // !__ASSEMBLER__
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#endif
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