From 365f60b69391e193032d8b3bb961b2da707fd5c7 Mon Sep 17 00:00:00 2001
From: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Date: Sat, 19 Oct 2019 10:34:48 +1100
Subject: [PATCH] simple_ram: Turn on pipelining

With a 1 cycle delay

Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
---
 simple_ram_behavioural.vhdl | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/simple_ram_behavioural.vhdl b/simple_ram_behavioural.vhdl
index 64135b8..d6255b8 100644
--- a/simple_ram_behavioural.vhdl
+++ b/simple_ram_behavioural.vhdl
@@ -11,7 +11,7 @@ entity mw_soc_memory is
     generic (
         RAM_INIT_FILE  : string;
         MEMORY_SIZE    : integer;
-	PIPELINE_DEPTH : integer := 0
+	PIPELINE_DEPTH : integer := 1
         );
 
     port (