From 4016f69e70991919946f1431b570c4b08a1d6a2c Mon Sep 17 00:00:00 2001 From: Anton Blanchard Date: Thu, 10 Oct 2019 17:14:55 +1100 Subject: [PATCH] Limit outstanding range outstanding can only ever be -1 to 2 at the moment (0 or 1 on a rising clock edge). Vivado is synthesizing a much wider adder which is silly. Constrain it with a range statement. This should be good for timing and saves us about 85 LUTs. This will get relaxed when we add more pipelining, but only by a few bits. Signed-off-by: Anton Blanchard --- decode2.vhdl | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/decode2.vhdl b/decode2.vhdl index 44a130d..8651b76 100644 --- a/decode2.vhdl +++ b/decode2.vhdl @@ -40,7 +40,7 @@ architecture behaviour of decode2 is type reg_internal_type is record state : state_type; - outstanding : integer; + outstanding : integer range -1 to 2; end record; type reg_type is record