From 6366fbb5a79453c8e7a4a504676794389260c728 Mon Sep 17 00:00:00 2001 From: Paul Mackerras Date: Mon, 26 Jan 2026 16:42:21 +1100 Subject: [PATCH] arty a7: Simplify GPIO connections Currently, GPIO lines 0 - 8 drive three of the 3-colour LEDs on output, but on input read the state of the pins labelled IO10 - IO13, IO26 - IO29 and IO8 on the Arty board. Then GPIO lines 10 - 17 drive IO10 - IO13 and IO26 - IO29 on output, but on input read the 4 buttons and 4 switches. To simplify all this and prepare for future changes, this just detaches IO8, IO13 - IO13 and IO26 - IO29, so now GPIO 0 - 8 read 0 on input, and GPIO 10 - 17 do nothing on output. Signed-off-by: Paul Mackerras --- fpga/arty_a7.xdc | 34 +++++++-------- fpga/top-arty.vhdl | 102 +++++++++++++++++---------------------------- 2 files changed, 56 insertions(+), 80 deletions(-) diff --git a/fpga/arty_a7.xdc b/fpga/arty_a7.xdc index cf90805..df55577 100644 --- a/fpga/arty_a7.xdc +++ b/fpga/arty_a7.xdc @@ -150,24 +150,24 @@ set_property IOB true [get_cells -hierarchical -filter {NAME =~*.litesdcard/sdpa # Arduino/chipKIT shield connector ################################################################################ -set_property -dict { PACKAGE_PIN V15 IOSTANDARD LVCMOS33 PULLDOWN TRUE } [get_ports { shield_io0 }]; -set_property -dict { PACKAGE_PIN U16 IOSTANDARD LVCMOS33 PULLDOWN TRUE } [get_ports { shield_io1 }]; -set_property -dict { PACKAGE_PIN P14 IOSTANDARD LVCMOS33 PULLDOWN TRUE } [get_ports { shield_io2 }]; -set_property -dict { PACKAGE_PIN T11 IOSTANDARD LVCMOS33 PULLDOWN TRUE } [get_ports { shield_io3 }]; -set_property -dict { PACKAGE_PIN R12 IOSTANDARD LVCMOS33 PULLDOWN TRUE } [get_ports { shield_io4 }]; -set_property -dict { PACKAGE_PIN T14 IOSTANDARD LVCMOS33 PULLDOWN TRUE } [get_ports { shield_io5 }]; -set_property -dict { PACKAGE_PIN T15 IOSTANDARD LVCMOS33 PULLDOWN TRUE } [get_ports { shield_io6 }]; -set_property -dict { PACKAGE_PIN T16 IOSTANDARD LVCMOS33 PULLDOWN TRUE } [get_ports { shield_io7 }]; -set_property -dict { PACKAGE_PIN N15 IOSTANDARD LVCMOS33 PULLDOWN TRUE } [get_ports { shield_io8 }]; +#set_property -dict { PACKAGE_PIN V15 IOSTANDARD LVCMOS33 PULLDOWN TRUE } [get_ports { shield_io0 }]; +#set_property -dict { PACKAGE_PIN U16 IOSTANDARD LVCMOS33 PULLDOWN TRUE } [get_ports { shield_io1 }]; +#set_property -dict { PACKAGE_PIN P14 IOSTANDARD LVCMOS33 PULLDOWN TRUE } [get_ports { shield_io2 }]; +#set_property -dict { PACKAGE_PIN T11 IOSTANDARD LVCMOS33 PULLDOWN TRUE } [get_ports { shield_io3 }]; +#set_property -dict { PACKAGE_PIN R12 IOSTANDARD LVCMOS33 PULLDOWN TRUE } [get_ports { shield_io4 }]; +#set_property -dict { PACKAGE_PIN T14 IOSTANDARD LVCMOS33 PULLDOWN TRUE } [get_ports { shield_io5 }]; +#set_property -dict { PACKAGE_PIN T15 IOSTANDARD LVCMOS33 PULLDOWN TRUE } [get_ports { shield_io6 }]; +#set_property -dict { PACKAGE_PIN T16 IOSTANDARD LVCMOS33 PULLDOWN TRUE } [get_ports { shield_io7 }]; +#set_property -dict { PACKAGE_PIN N15 IOSTANDARD LVCMOS33 PULLDOWN TRUE } [get_ports { shield_io8 }]; set_property -dict { PACKAGE_PIN M16 IOSTANDARD LVCMOS33 PULLDOWN TRUE } [get_ports { shield_io9 }]; -set_property -dict { PACKAGE_PIN V17 IOSTANDARD LVCMOS33 PULLDOWN TRUE } [get_ports { shield_io10 }]; -set_property -dict { PACKAGE_PIN U18 IOSTANDARD LVCMOS33 PULLDOWN TRUE } [get_ports { shield_io11 }]; -set_property -dict { PACKAGE_PIN R17 IOSTANDARD LVCMOS33 PULLDOWN TRUE } [get_ports { shield_io12 }]; -set_property -dict { PACKAGE_PIN P17 IOSTANDARD LVCMOS33 PULLDOWN TRUE } [get_ports { shield_io13 }]; -set_property -dict { PACKAGE_PIN U11 IOSTANDARD LVCMOS33 PULLDOWN TRUE } [get_ports { shield_io26 }]; -set_property -dict { PACKAGE_PIN V16 IOSTANDARD LVCMOS33 PULLDOWN TRUE } [get_ports { shield_io27 }]; -set_property -dict { PACKAGE_PIN M13 IOSTANDARD LVCMOS33 PULLDOWN TRUE } [get_ports { shield_io28 }]; -set_property -dict { PACKAGE_PIN R10 IOSTANDARD LVCMOS33 PULLDOWN TRUE } [get_ports { shield_io29 }]; +#set_property -dict { PACKAGE_PIN V17 IOSTANDARD LVCMOS33 PULLDOWN TRUE } [get_ports { shield_io10 }]; +#set_property -dict { PACKAGE_PIN U18 IOSTANDARD LVCMOS33 PULLDOWN TRUE } [get_ports { shield_io11 }]; +#set_property -dict { PACKAGE_PIN R17 IOSTANDARD LVCMOS33 PULLDOWN TRUE } [get_ports { shield_io12 }]; +#set_property -dict { PACKAGE_PIN P17 IOSTANDARD LVCMOS33 PULLDOWN TRUE } [get_ports { shield_io13 }]; +#set_property -dict { PACKAGE_PIN U11 IOSTANDARD LVCMOS33 PULLDOWN TRUE } [get_ports { shield_io26 }]; +#set_property -dict { PACKAGE_PIN V16 IOSTANDARD LVCMOS33 PULLDOWN TRUE } [get_ports { shield_io27 }]; +#set_property -dict { PACKAGE_PIN M13 IOSTANDARD LVCMOS33 PULLDOWN TRUE } [get_ports { shield_io28 }]; +#set_property -dict { PACKAGE_PIN R10 IOSTANDARD LVCMOS33 PULLDOWN TRUE } [get_ports { shield_io29 }]; set_property -dict { PACKAGE_PIN R11 IOSTANDARD LVCMOS33 PULLDOWN TRUE } [get_ports { shield_io30 }]; set_property -dict { PACKAGE_PIN R13 IOSTANDARD LVCMOS33 PULLDOWN TRUE } [get_ports { shield_io31 }]; set_property -dict { PACKAGE_PIN R15 IOSTANDARD LVCMOS33 PULLDOWN TRUE } [get_ports { shield_io32 }]; diff --git a/fpga/top-arty.vhdl b/fpga/top-arty.vhdl index e86cecd..54d1f90 100644 --- a/fpga/top-arty.vhdl +++ b/fpga/top-arty.vhdl @@ -68,24 +68,24 @@ entity toplevel is sw3 : in std_ulogic; -- GPIO - shield_io0 : inout std_ulogic; - shield_io1 : inout std_ulogic; - shield_io2 : inout std_ulogic; - shield_io3 : inout std_ulogic; - shield_io4 : inout std_ulogic; - shield_io5 : inout std_ulogic; - shield_io6 : inout std_ulogic; - shield_io7 : inout std_ulogic; - shield_io8 : inout std_ulogic; + --shield_io0 : inout std_ulogic; + --shield_io1 : inout std_ulogic; + --shield_io2 : inout std_ulogic; + --shield_io3 : inout std_ulogic; + --shield_io4 : inout std_ulogic; + --shield_io5 : inout std_ulogic; + --shield_io6 : inout std_ulogic; + --shield_io7 : inout std_ulogic; + --shield_io8 : inout std_ulogic; shield_io9 : inout std_ulogic; - shield_io10 : inout std_ulogic; - shield_io11 : inout std_ulogic; - shield_io12 : inout std_ulogic; - shield_io13 : inout std_ulogic; - shield_io26 : inout std_ulogic; - shield_io27 : inout std_ulogic; - shield_io28 : inout std_ulogic; - shield_io29 : inout std_ulogic; + --shield_io10 : inout std_ulogic; + --shield_io11 : inout std_ulogic; + --shield_io12 : inout std_ulogic; + --shield_io13 : inout std_ulogic; + --shield_io26 : inout std_ulogic; + --shield_io27 : inout std_ulogic; + --shield_io28 : inout std_ulogic; + --shield_io29 : inout std_ulogic; shield_io30 : inout std_ulogic; shield_io31 : inout std_ulogic; shield_io32 : inout std_ulogic; @@ -762,24 +762,17 @@ begin gpio_in(16) <= sw2; gpio_in(17) <= sw3; - gpio_in(0) <= shield_io10; - gpio_in(1) <= shield_io11; - gpio_in(2) <= shield_io12; - gpio_in(3) <= shield_io13; - gpio_in(4) <= shield_io26; - gpio_in(5) <= shield_io27; - gpio_in(6) <= shield_io28; - gpio_in(7) <= shield_io29; - gpio_in(8) <= shield_io8; + gpio_in(0) <= '0'; + gpio_in(1) <= '0'; + gpio_in(2) <= '0'; + gpio_in(3) <= '0'; + gpio_in(4) <= '0'; + gpio_in(5) <= '0'; + gpio_in(6) <= '0'; + gpio_in(7) <= '0'; + gpio_in(8) <= '0'; + gpio_in(9) <= shield_io9; - --gpio_in(10) <= shield_io10; - --gpio_in(11) <= shield_io11; - --gpio_in(12) <= shield_io12; - --gpio_in(13) <= shield_io13; - --gpio_in(14) <= shield_io26; - --gpio_in(15) <= shield_io27; - --gpio_in(16) <= shield_io28; - --gpio_in(17) <= shield_io29; gpio_in(18) <= shield_io30; gpio_in(19) <= shield_io31; gpio_in(20) <= shield_io32; @@ -795,36 +788,19 @@ begin gpio_in(30) <= shield_io43; gpio_in(31) <= shield_io44; - led_b_pwm(1) <= gpio_out(0) when gpio_dir(0) = '1' else 'Z'; - led_g_pwm(1) <= gpio_out(1) when gpio_dir(1) = '1' else 'Z'; - led_r_pwm(1) <= gpio_out(2) when gpio_dir(2) = '1' else 'Z'; - - led_b_pwm(2) <= gpio_out(3) when gpio_dir(3) = '1' else 'Z'; - led_g_pwm(2) <= gpio_out(4) when gpio_dir(4) = '1' else 'Z'; - led_r_pwm(2) <= gpio_out(5) when gpio_dir(5) = '1' else 'Z'; - - led_b_pwm(3) <= gpio_out(6) when gpio_dir(6) = '1' else 'Z'; - led_g_pwm(3) <= gpio_out(7) when gpio_dir(7) = '1' else 'Z'; - led_r_pwm(3) <= gpio_out(8) when gpio_dir(8) = '1' else 'Z'; - - --shield_io0 <= gpio_out(0) when gpio_dir(0) = '1' else 'Z'; - --shield_io1 <= gpio_out(1) when gpio_dir(1) = '1' else 'Z'; - --shield_io2 <= gpio_out(2) when gpio_dir(2) = '1' else 'Z'; - --shield_io3 <= gpio_out(3) when gpio_dir(3) = '1' else 'Z'; - --shield_io4 <= gpio_out(4) when gpio_dir(4) = '1' else 'Z'; - --shield_io5 <= gpio_out(5) when gpio_dir(5) = '1' else 'Z'; - --shield_io6 <= gpio_out(6) when gpio_dir(6) = '1' else 'Z'; - --shield_io7 <= gpio_out(7) when gpio_dir(7) = '1' else 'Z'; - --shield_io8 <= gpio_out(8) when gpio_dir(8) = '1' else 'Z'; + led_b_pwm(1) <= gpio_out(0) and gpio_dir(0); + led_g_pwm(1) <= gpio_out(1) and gpio_dir(1); + led_r_pwm(1) <= gpio_out(2) and gpio_dir(2); + + led_b_pwm(2) <= gpio_out(3) and gpio_dir(3); + led_g_pwm(2) <= gpio_out(4) and gpio_dir(4); + led_r_pwm(2) <= gpio_out(5) and gpio_dir(5); + + led_b_pwm(3) <= gpio_out(6) and gpio_dir(6); + led_g_pwm(3) <= gpio_out(7) and gpio_dir(7); + led_r_pwm(3) <= gpio_out(8) and gpio_dir(8); + shield_io9 <= gpio_out(9) when gpio_dir(9) = '1' else 'Z'; - shield_io10 <= gpio_out(10) when gpio_dir(10) = '1' else 'Z'; - shield_io11 <= gpio_out(11) when gpio_dir(11) = '1' else 'Z'; - shield_io12 <= gpio_out(12) when gpio_dir(12) = '1' else 'Z'; - shield_io13 <= gpio_out(13) when gpio_dir(13) = '1' else 'Z'; - shield_io26 <= gpio_out(14) when gpio_dir(14) = '1' else 'Z'; - shield_io27 <= gpio_out(15) when gpio_dir(15) = '1' else 'Z'; - shield_io28 <= gpio_out(16) when gpio_dir(16) = '1' else 'Z'; - shield_io29 <= gpio_out(17) when gpio_dir(17) = '1' else 'Z'; shield_io30 <= gpio_out(18) when gpio_dir(18) = '1' else 'Z'; shield_io31 <= gpio_out(19) when gpio_dir(19) = '1' else 'Z'; shield_io32 <= gpio_out(20) when gpio_dir(20) = '1' else 'Z';