From 68533c4cfb4d91dff51c7d015d66ec22d5215714 Mon Sep 17 00:00:00 2001 From: Anton Blanchard Date: Tue, 10 Sep 2019 16:22:58 +1000 Subject: [PATCH] Reduce multiply to 2 cycles We want all non load/store ops to take 2 cycles to make tracking write back easier. Signed-off-by: Anton Blanchard --- multiply.vhdl | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/multiply.vhdl b/multiply.vhdl index 4d9637f..9aa4316 100644 --- a/multiply.vhdl +++ b/multiply.vhdl @@ -10,7 +10,7 @@ use work.crhelpers.all; entity multiply is generic ( - PIPELINE_DEPTH : natural := 6 + PIPELINE_DEPTH : natural := 2 ); port ( clk : in std_logic;