diff --git a/openocd/flash-arty b/openocd/flash-arty
index 97193c7..430aaa5 100755
--- a/openocd/flash-arty
+++ b/openocd/flash-arty
@@ -8,21 +8,23 @@ import sys
 BASE = os.path.dirname(os.path.abspath(__file__))
 CONFIG = os.path.join(BASE, "xilinx-xc7.cfg")
 
-def flash(config, flash_proxy, address, data, set_qe=False):
+def flash(config, flash_proxy, address, data, filetype="", set_qe=False):
     script = "; ".join([
         "init",
         "jtagspi_init 0 {{{}}}".format(flash_proxy),
         "jtagspi set_qe 0 1" if set_qe else "",
-        "jtagspi_program {{{}}} 0x{:x}".format(data, address),
+        "jtagspi_program {{{}}} 0x{:x} {}".format(data, address, filetype),
         "fpga_program",
         "exit"
     ])
+    print(script)
     subprocess.call(["openocd", "-f", config, "-c", script])
 
 parser = argparse.ArgumentParser()
 parser.add_argument("file", help="file to write to flash")
-parser.add_argument("-a", "--address", help="offset in flash", type=int, default=0)
+parser.add_argument("-a", "--address", help="offset in flash", type=lambda x: int(x,0), default=0)
 parser.add_argument("-f", "--fpga", help="a35 or a100", default="a35")
+parser.add_argument("-t", "--filetype", help="file type such as 'bin'", default="")
 args = parser.parse_args()
 
 if args.fpga.lower() == "a35":
@@ -35,4 +37,4 @@ else:
 
 proxy = os.path.join(BASE, proxy)
 
-flash(CONFIG, proxy, args.address, args.file)
+flash(CONFIG, proxy, args.address, args.file, args.filetype.lower())
diff --git a/openocd/jtagspi.cfg b/openocd/jtagspi.cfg
new file mode 100644
index 0000000..70ea4f7
--- /dev/null
+++ b/openocd/jtagspi.cfg
@@ -0,0 +1,48 @@
+set _USER1 0x02
+
+if { [info exists JTAGSPI_IR] } {
+	set _JTAGSPI_IR $JTAGSPI_IR
+} else {
+	set _JTAGSPI_IR $_USER1
+}
+
+if { [info exists DR_LENGTH] } {
+	set _DR_LENGTH $DR_LENGTH
+} else {
+	set _DR_LENGTH 1
+}
+
+if { [info exists TARGETNAME] } {
+	set _TARGETNAME $TARGETNAME
+} else {
+	set _TARGETNAME $_CHIPNAME.proxy
+}
+
+if { [info exists FLASHNAME] } {
+	set _FLASHNAME $FLASHNAME
+} else {
+	set _FLASHNAME $_CHIPNAME.spi
+}
+
+target create $_TARGETNAME testee -chain-position $_CHIPNAME.tap
+flash bank $_FLASHNAME jtagspi 0 0 0 0 $_TARGETNAME $_JTAGSPI_IR $_DR_LENGTH
+
+proc jtagspi_init {chain_id proxy_bit} {
+	# load proxy bitstream $proxy_bit and probe spi flash
+	global _FLASHNAME
+	pld load $chain_id $proxy_bit
+	reset halt
+	flash probe $_FLASHNAME
+}
+
+proc jtagspi_program {bin addr {type ""} } {
+	# write and verify binary file $bin at offset $addr
+	global _FLASHNAME
+	if { $type eq "" } {
+		flash write_image erase $bin $addr
+		flash verify_bank $_FLASHNAME $bin $addr
+	} else {
+		flash write_image erase $bin $addr $type
+		flash verify_bank $_FLASHNAME $bin $addr $type
+	}
+}
diff --git a/openocd/xilinx-xc7.cfg b/openocd/xilinx-xc7.cfg
index b5eda4b..87f1257 100644
--- a/openocd/xilinx-xc7.cfg
+++ b/openocd/xilinx-xc7.cfg
@@ -5,7 +5,7 @@ ftdi_layout_init 0x00e8 0x60eb
 reset_config none
 
 source [find cpld/xilinx-xc7.cfg]
-source [find cpld/jtagspi.cfg]
+source openocd/jtagspi.cfg
 adapter_khz 25000
 
 proc fpga_program {} {