From 86c53aa3f781a32e069c0d4bb94f92d89e5b7013 Mon Sep 17 00:00:00 2001 From: Paul Mackerras Date: Mon, 14 Oct 2019 16:02:45 +1100 Subject: [PATCH] Implement neg using OP_ADD We have all the machinery in place to implement the neg instruction as OP_ADD. Doing that means we can ditch OP_NEG, and saves about 66 slice LUTs on the A7-100. Signed-off-by: Paul Mackerras --- decode1.vhdl | 2 +- decode_types.vhdl | 2 +- execute1.vhdl | 3 --- 3 files changed, 2 insertions(+), 5 deletions(-) diff --git a/decode1.vhdl b/decode1.vhdl index 2bdb423..4515522 100644 --- a/decode1.vhdl +++ b/decode1.vhdl @@ -243,7 +243,7 @@ architecture behaviour of decode1 is 2#0011101001# => (MUL, OP_MUL_L64, RA, RB, NONE, RT, '0', '1', '0', '0', ZERO, '0', NONE, '0', '0', '0', '0', '0', '1', RC, '0', '1'), -- mulld 2#0011101011# => (MUL, OP_MUL_L64, RA, RB, NONE, RT, '0', '1', '0', '0', ZERO, '0', NONE, '0', '0', '0', '0', '1', '1', RC, '0', '1'), -- mullw 2#0111011100# => (ALU, OP_AND, NONE, RB, RS, RA, '0', '0', '0', '1', ZERO, '0', NONE, '0', '0', '0', '0', '0', '0', RC, '0', '0'), -- nand - 2#0001101000# => (ALU, OP_NEG, RA, RB, NONE, RT, '0', '0', '0', '0', ZERO, '0', NONE, '0', '0', '0', '0', '0', '0', RC, '0', '0'), -- neg + 2#0001101000# => (ALU, OP_ADD, RA, NONE, NONE, RT, '0', '0', '1', '0', ONE, '0', NONE, '0', '0', '0', '0', '0', '0', RC, '0', '0'), -- neg 2#0001111100# => (ALU, OP_OR, NONE, RB, RS, RA, '0', '0', '0', '1', ZERO, '0', NONE, '0', '0', '0', '0', '0', '0', RC, '0', '0'), -- nor 2#0110111100# => (ALU, OP_OR, NONE, RB, RS, RA, '0', '0', '0', '0', ZERO, '0', NONE, '0', '0', '0', '0', '0', '0', RC, '0', '0'), -- or 2#0110011100# => (ALU, OP_OR, NONE, RB, RS, RA, '0', '0', '1', '0', ZERO, '0', NONE, '0', '0', '0', '0', '0', '0', RC, '0', '0'), -- orc diff --git a/decode_types.vhdl b/decode_types.vhdl index 982b172..a60053f 100644 --- a/decode_types.vhdl +++ b/decode_types.vhdl @@ -13,7 +13,7 @@ package decode_types is OP_LOAD, OP_STORE, OP_MADDHD, OP_MADDHDU, OP_MADDLD, OP_MCRF, OP_MCRXR, OP_MCRXRX, OP_MFCR, OP_MFSPR, OP_MOD, OP_MTCRF, OP_MTSPR, OP_MUL_L64, - OP_MUL_H64, OP_MUL_H32, OP_NEG, OP_OR, + OP_MUL_H64, OP_MUL_H32, OP_OR, OP_POPCNTB, OP_POPCNTD, OP_POPCNTW, OP_PRTYD, OP_PRTYW, OP_RLC, OP_RLCL, OP_RLCR, OP_SETB, OP_SHL, OP_SHR, diff --git a/execute1.vhdl b/execute1.vhdl index d0ff461..5f49c6f 100644 --- a/execute1.vhdl +++ b/execute1.vhdl @@ -311,9 +311,6 @@ begin elsif std_match(e_in.insn(20 downto 11), "0100000000") then ctrl_tmp.lr <= e_in.read_data3; end if; - when OP_NEG => - result := ppc_neg(e_in.read_data1); - result_en := 1; when OP_POPCNTB => result := ppc_popcntb(e_in.read_data3); result_en := 1;