From 8e9ec4d1b75717437927c5111c5f84a7880d7b3b Mon Sep 17 00:00:00 2001 From: Paul Mackerras Date: Thu, 21 Mar 2024 21:55:06 +1100 Subject: [PATCH] ECPIX-5: Add pin definitions for the PMOD ports Not wired to anything at this point. Signed-off-by: Paul Mackerras --- constraints/ecpix-5.lpf | 137 ++++++++++++++++++++++++++++++++++++++++ fpga/top-ecpix5.vhdl | 68 +++++++++++++++++++- 2 files changed, 204 insertions(+), 1 deletion(-) diff --git a/constraints/ecpix-5.lpf b/constraints/ecpix-5.lpf index 1748601..02d14c6 100644 --- a/constraints/ecpix-5.lpf +++ b/constraints/ecpix-5.lpf @@ -57,3 +57,140 @@ LOCATE COMP "spi_flash_wp_n" SITE "AF2"; IOBUF PORT "spi_flash_wp_n" IO_TYPE=LVCMOS33; LOCATE COMP "spi_flash_hold_n" SITE "AE1"; IOBUF PORT "spi_flash_hold_n" IO_TYPE=LVCMOS33; + +// PMOD signals +LOCATE COMP "pmod0_0" SITE "T25"; +IOBUF PORT "pmod0_0" IO_TYPE=LVCMOS33; +LOCATE COMP "pmod0_1" SITE "U25"; +IOBUF PORT "pmod0_1" IO_TYPE=LVCMOS33; +LOCATE COMP "pmod0_2" SITE "U24"; +IOBUF PORT "pmod0_2" IO_TYPE=LVCMOS33; +LOCATE COMP "pmod0_3" SITE "V24"; +IOBUF PORT "pmod0_3" IO_TYPE=LVCMOS33; +LOCATE COMP "pmod0_4" SITE "T26"; +IOBUF PORT "pmod0_4" IO_TYPE=LVCMOS33; +LOCATE COMP "pmod0_5" SITE "U26"; +IOBUF PORT "pmod0_5" IO_TYPE=LVCMOS33; +LOCATE COMP "pmod0_6" SITE "V26"; +IOBUF PORT "pmod0_6" IO_TYPE=LVCMOS33; +LOCATE COMP "pmod0_7" SITE "W26"; +IOBUF PORT "pmod0_7" IO_TYPE=LVCMOS33; + +LOCATE COMP "pmod1_0" SITE "U23"; +IOBUF PORT "pmod1_0" IO_TYPE=LVCMOS33; +LOCATE COMP "pmod1_1" SITE "V23"; +IOBUF PORT "pmod1_1" IO_TYPE=LVCMOS33; +LOCATE COMP "pmod1_2" SITE "U22"; +IOBUF PORT "pmod1_2" IO_TYPE=LVCMOS33; +LOCATE COMP "pmod1_3" SITE "V21"; +IOBUF PORT "pmod1_3" IO_TYPE=LVCMOS33; +LOCATE COMP "pmod1_4" SITE "W25"; +IOBUF PORT "pmod1_4" IO_TYPE=LVCMOS33; +LOCATE COMP "pmod1_5" SITE "W24"; +IOBUF PORT "pmod1_5" IO_TYPE=LVCMOS33; +LOCATE COMP "pmod1_6" SITE "W23"; +IOBUF PORT "pmod1_6" IO_TYPE=LVCMOS33; +LOCATE COMP "pmod1_7" SITE "W22"; +IOBUF PORT "pmod1_7" IO_TYPE=LVCMOS33; + +LOCATE COMP "pmod2_0" SITE "J24"; +IOBUF PORT "pmod2_0" IO_TYPE=LVCMOS33; +LOCATE COMP "pmod2_1" SITE "H22"; +IOBUF PORT "pmod2_1" IO_TYPE=LVCMOS33; +LOCATE COMP "pmod2_2" SITE "E21"; +IOBUF PORT "pmod2_2" IO_TYPE=LVCMOS33; +LOCATE COMP "pmod2_3" SITE "D18"; +IOBUF PORT "pmod2_3" IO_TYPE=LVCMOS33; +LOCATE COMP "pmod2_4" SITE "K22"; +IOBUF PORT "pmod2_4" IO_TYPE=LVCMOS33; +LOCATE COMP "pmod2_5" SITE "J21"; +IOBUF PORT "pmod2_5" IO_TYPE=LVCMOS33; +LOCATE COMP "pmod2_6" SITE "H21"; +IOBUF PORT "pmod2_6" IO_TYPE=LVCMOS33; +LOCATE COMP "pmod2_7" SITE "D22"; +IOBUF PORT "pmod2_7" IO_TYPE=LVCMOS33; + +LOCATE COMP "pmod3_0" SITE "E4"; +IOBUF PORT "pmod3_0" IO_TYPE=LVCMOS33; +LOCATE COMP "pmod3_1" SITE "F4"; +IOBUF PORT "pmod3_1" IO_TYPE=LVCMOS33; +LOCATE COMP "pmod3_2" SITE "E6"; +IOBUF PORT "pmod3_2" IO_TYPE=LVCMOS33; +LOCATE COMP "pmod3_3" SITE "H4"; +IOBUF PORT "pmod3_3" IO_TYPE=LVCMOS33; +LOCATE COMP "pmod3_4" SITE "F3"; +IOBUF PORT "pmod3_4" IO_TYPE=LVCMOS33; +LOCATE COMP "pmod3_5" SITE "D4"; +IOBUF PORT "pmod3_5" IO_TYPE=LVCMOS33; +LOCATE COMP "pmod3_6" SITE "D5"; +IOBUF PORT "pmod3_6" IO_TYPE=LVCMOS33; +LOCATE COMP "pmod3_7" SITE "F5"; +IOBUF PORT "pmod3_7" IO_TYPE=LVCMOS33; + +LOCATE COMP "pmod4_0" SITE "E26"; +IOBUF PORT "pmod4_0" IO_TYPE=LVCMOS33; +LOCATE COMP "pmod4_1" SITE "D25"; +IOBUF PORT "pmod4_1" IO_TYPE=LVCMOS33; +LOCATE COMP "pmod4_2" SITE "F26"; +IOBUF PORT "pmod4_2" IO_TYPE=LVCMOS33; +LOCATE COMP "pmod4_3" SITE "F25"; +IOBUF PORT "pmod4_3" IO_TYPE=LVCMOS33; +LOCATE COMP "pmod4_4" SITE "C26"; +IOBUF PORT "pmod4_4" IO_TYPE=LVCMOS33; +LOCATE COMP "pmod4_5" SITE "C25"; +IOBUF PORT "pmod4_5" IO_TYPE=LVCMOS33; +LOCATE COMP "pmod4_6" SITE "A25"; +IOBUF PORT "pmod4_6" IO_TYPE=LVCMOS33; +LOCATE COMP "pmod4_7" SITE "A24"; +IOBUF PORT "pmod4_7" IO_TYPE=LVCMOS33; + +LOCATE COMP "pmod5_0" SITE "D19"; +IOBUF PORT "pmod5_0" IO_TYPE=LVCMOS33; +LOCATE COMP "pmod5_1" SITE "C21"; +IOBUF PORT "pmod5_1" IO_TYPE=LVCMOS33; +LOCATE COMP "pmod5_2" SITE "B21"; +IOBUF PORT "pmod5_2" IO_TYPE=LVCMOS33; +LOCATE COMP "pmod5_3" SITE "C22"; +IOBUF PORT "pmod5_3" IO_TYPE=LVCMOS33; +LOCATE COMP "pmod5_4" SITE "D21"; +IOBUF PORT "pmod5_4" IO_TYPE=LVCMOS33; +LOCATE COMP "pmod5_5" SITE "A21"; +IOBUF PORT "pmod5_5" IO_TYPE=LVCMOS33; +LOCATE COMP "pmod5_6" SITE "A22"; +IOBUF PORT "pmod5_6" IO_TYPE=LVCMOS33; +LOCATE COMP "pmod5_7" SITE "A23"; +IOBUF PORT "pmod5_7" IO_TYPE=LVCMOS33; + +LOCATE COMP "pmod6_0" SITE "C16"; +IOBUF PORT "pmod6_0" IO_TYPE=LVCMOS33; +LOCATE COMP "pmod6_1" SITE "B17"; +IOBUF PORT "pmod6_1" IO_TYPE=LVCMOS33; +LOCATE COMP "pmod6_2" SITE "C18"; +IOBUF PORT "pmod6_2" IO_TYPE=LVCMOS33; +LOCATE COMP "pmod6_3" SITE "B19"; +IOBUF PORT "pmod6_3" IO_TYPE=LVCMOS33; +LOCATE COMP "pmod6_4" SITE "A17"; +IOBUF PORT "pmod6_4" IO_TYPE=LVCMOS33; +LOCATE COMP "pmod6_5" SITE "A18"; +IOBUF PORT "pmod6_5" IO_TYPE=LVCMOS33; +LOCATE COMP "pmod6_6" SITE "A19"; +IOBUF PORT "pmod6_6" IO_TYPE=LVCMOS33; +LOCATE COMP "pmod6_7" SITE "C19"; +IOBUF PORT "pmod6_7" IO_TYPE=LVCMOS33; + +LOCATE COMP "pmod7_0" SITE "D14"; +IOBUF PORT "pmod7_0" IO_TYPE=LVCMOS33; +LOCATE COMP "pmod7_1" SITE "B14"; +IOBUF PORT "pmod7_1" IO_TYPE=LVCMOS33; +LOCATE COMP "pmod7_2" SITE "E14"; +IOBUF PORT "pmod7_2" IO_TYPE=LVCMOS33; +LOCATE COMP "pmod7_3" SITE "B16"; +IOBUF PORT "pmod7_3" IO_TYPE=LVCMOS33; +LOCATE COMP "pmod7_4" SITE "C14"; +IOBUF PORT "pmod7_4" IO_TYPE=LVCMOS33; +LOCATE COMP "pmod7_5" SITE "A14"; +IOBUF PORT "pmod7_5" IO_TYPE=LVCMOS33; +LOCATE COMP "pmod7_6" SITE "A15"; +IOBUF PORT "pmod7_6" IO_TYPE=LVCMOS33; +LOCATE COMP "pmod7_7" SITE "A16"; +IOBUF PORT "pmod7_7" IO_TYPE=LVCMOS33; diff --git a/fpga/top-ecpix5.vhdl b/fpga/top-ecpix5.vhdl index ee855dc..44623c3 100644 --- a/fpga/top-ecpix5.vhdl +++ b/fpga/top-ecpix5.vhdl @@ -55,7 +55,73 @@ entity toplevel is spi_flash_mosi : inout std_ulogic; spi_flash_miso : inout std_ulogic; spi_flash_wp_n : inout std_ulogic; - spi_flash_hold_n : inout std_ulogic + spi_flash_hold_n : inout std_ulogic; + + -- PMOD ports 0 - 7 + pmod0_0 : inout std_ulogic; + pmod0_1 : inout std_ulogic; + pmod0_2 : inout std_ulogic; + pmod0_3 : inout std_ulogic; + pmod0_4 : inout std_ulogic; + pmod0_5 : inout std_ulogic; + pmod0_6 : inout std_ulogic; + pmod0_7 : inout std_ulogic; + pmod1_0 : inout std_ulogic; + pmod1_1 : inout std_ulogic; + pmod1_2 : inout std_ulogic; + pmod1_3 : inout std_ulogic; + pmod1_4 : inout std_ulogic; + pmod1_5 : inout std_ulogic; + pmod1_6 : inout std_ulogic; + pmod1_7 : inout std_ulogic; + pmod2_0 : inout std_ulogic; + pmod2_1 : inout std_ulogic; + pmod2_2 : inout std_ulogic; + pmod2_3 : inout std_ulogic; + pmod2_4 : inout std_ulogic; + pmod2_5 : inout std_ulogic; + pmod2_6 : inout std_ulogic; + pmod2_7 : inout std_ulogic; + pmod3_0 : inout std_ulogic; + pmod3_1 : inout std_ulogic; + pmod3_2 : inout std_ulogic; + pmod3_3 : inout std_ulogic; + pmod3_4 : inout std_ulogic; + pmod3_5 : inout std_ulogic; + pmod3_6 : inout std_ulogic; + pmod3_7 : inout std_ulogic; + pmod4_0 : inout std_ulogic; -- 0n + pmod4_1 : inout std_ulogic; -- 0p + pmod4_2 : inout std_ulogic; -- 1n + pmod4_3 : inout std_ulogic; -- 1p + pmod4_4 : inout std_ulogic; -- 2n + pmod4_5 : inout std_ulogic; -- 2p + pmod4_6 : inout std_ulogic; -- 3n + pmod4_7 : inout std_ulogic; -- 3p + pmod5_0 : inout std_ulogic; + pmod5_1 : inout std_ulogic; + pmod5_2 : inout std_ulogic; + pmod5_3 : inout std_ulogic; + pmod5_4 : inout std_ulogic; + pmod5_5 : inout std_ulogic; + pmod5_6 : inout std_ulogic; + pmod5_7 : inout std_ulogic; + pmod6_0 : inout std_ulogic; + pmod6_1 : inout std_ulogic; + pmod6_2 : inout std_ulogic; + pmod6_3 : inout std_ulogic; + pmod6_4 : inout std_ulogic; + pmod6_5 : inout std_ulogic; + pmod6_6 : inout std_ulogic; + pmod6_7 : inout std_ulogic; + pmod7_0 : inout std_ulogic; + pmod7_1 : inout std_ulogic; + pmod7_2 : inout std_ulogic; + pmod7_3 : inout std_ulogic; + pmod7_4 : inout std_ulogic; + pmod7_5 : inout std_ulogic; + pmod7_6 : inout std_ulogic; + pmod7_7 : inout std_ulogic ); end entity toplevel;