diff --git a/fpga/arty_a7.xdc b/fpga/arty_a7.xdc
index 3fa99bb..3bd7c9c 100644
--- a/fpga/arty_a7.xdc
+++ b/fpga/arty_a7.xdc
@@ -162,6 +162,10 @@ set_property IOB true [get_cells -hierarchical -filter {NAME =~*.litesdcard2/sdp
 #set_property -dict { PACKAGE_PIN H2 IOSTANDARD LVCMOS33 } [get_ports { pmod_jd_9 }];
 #set_property -dict { PACKAGE_PIN G2 IOSTANDARD LVCMOS33 } [get_ports { pmod_jd_10 }];
 
+# connection to i2c RTC chip (Dallas DS3231) on JD
+set_property -dict { PACKAGE_PIN D2 IOSTANDARD LVCMOS33 PULLUP TRUE } [get_ports { i2c_rtc_d }];
+set_property -dict { PACKAGE_PIN H2 IOSTANDARD LVCMOS33 PULLUP TRUE } [get_ports { i2c_rtc_c }];
+
 ################################################################################
 # Arduino/chipKIT shield connector
 ################################################################################
@@ -188,8 +192,8 @@ set_property -dict { PACKAGE_PIN R11 IOSTANDARD LVCMOS33 PULLDOWN TRUE } [get_po
 set_property -dict { PACKAGE_PIN R13 IOSTANDARD LVCMOS33 PULLDOWN TRUE } [get_ports { shield_io31 }];
 set_property -dict { PACKAGE_PIN R15 IOSTANDARD LVCMOS33 PULLDOWN TRUE } [get_ports { shield_io32 }];
 set_property -dict { PACKAGE_PIN P15 IOSTANDARD LVCMOS33 PULLDOWN TRUE } [get_ports { shield_io33 }];
-set_property -dict { PACKAGE_PIN R16 IOSTANDARD LVCMOS33 PULLDOWN TRUE } [get_ports { shield_io34 }];
-set_property -dict { PACKAGE_PIN N16 IOSTANDARD LVCMOS33 PULLDOWN TRUE } [get_ports { shield_io35 }];
+#set_property -dict { PACKAGE_PIN R16 IOSTANDARD LVCMOS33 PULLDOWN TRUE } [get_ports { shield_io34 }];
+#set_property -dict { PACKAGE_PIN N16 IOSTANDARD LVCMOS33 PULLDOWN TRUE } [get_ports { shield_io35 }];
 set_property -dict { PACKAGE_PIN N14 IOSTANDARD LVCMOS33 PULLDOWN TRUE } [get_ports { shield_io36 }];
 set_property -dict { PACKAGE_PIN U17 IOSTANDARD LVCMOS33 PULLDOWN TRUE } [get_ports { shield_io37 }];
 set_property -dict { PACKAGE_PIN T18 IOSTANDARD LVCMOS33 PULLDOWN TRUE } [get_ports { shield_io38 }];
diff --git a/fpga/top-arty.vhdl b/fpga/top-arty.vhdl
index 43cea85..56060a2 100644
--- a/fpga/top-arty.vhdl
+++ b/fpga/top-arty.vhdl
@@ -90,8 +90,8 @@ entity toplevel is
         shield_io31      : inout std_ulogic;
         shield_io32      : inout std_ulogic;
         shield_io33      : inout std_ulogic;
-        shield_io34      : inout std_ulogic;
-        shield_io35      : inout std_ulogic;
+        --shield_io34      : inout std_ulogic;
+        --shield_io35      : inout std_ulogic;
         shield_io36      : inout std_ulogic;
         shield_io37      : inout std_ulogic;
         shield_io38      : inout std_ulogic;
@@ -128,6 +128,10 @@ entity toplevel is
         sdcard2_clk   : out   std_ulogic;
         sdcard2_cd    : in    std_ulogic;
 
+        -- I2C RTC chip
+        i2c_rtc_d : inout std_ulogic;
+        i2c_rtc_c : inout std_ulogic;
+
         -- DRAM wires
         ddram_a       : out std_ulogic_vector(13 downto 0);
         ddram_ba      : out std_ulogic_vector(2 downto 0);
@@ -844,8 +848,8 @@ begin
     gpio_in(19) <= shield_io31;
     gpio_in(20) <= shield_io32;
     gpio_in(21) <= shield_io33;
-    gpio_in(22) <= shield_io34;
-    gpio_in(23) <= shield_io35;
+    gpio_in(22) <= i2c_rtc_d;
+    gpio_in(23) <= i2c_rtc_c;
     gpio_in(24) <= shield_io36;
     gpio_in(25) <= shield_io37;
     gpio_in(26) <= shield_io38;
@@ -872,8 +876,8 @@ begin
     shield_io31 <= gpio_out(19) when gpio_dir(19) = '1' else 'Z';
     shield_io32 <= gpio_out(20) when gpio_dir(20) = '1' else 'Z';
     shield_io33 <= gpio_out(21) when gpio_dir(21) = '1' else 'Z';
-    shield_io34 <= gpio_out(22) when gpio_dir(22) = '1' else 'Z';
-    shield_io35 <= gpio_out(23) when gpio_dir(23) = '1' else 'Z';
+    i2c_rtc_d <= gpio_out(22) when gpio_dir(22) = '1' else 'Z';
+    i2c_rtc_c <= gpio_out(23) when gpio_dir(23) = '1' else 'Z';
     shield_io36 <= gpio_out(24) when gpio_dir(24) = '1' else 'Z';
     shield_io37 <= gpio_out(25) when gpio_dir(25) = '1' else 'Z';
     shield_io38 <= gpio_out(26) when gpio_dir(26) = '1' else 'Z';