From af462f0ca9ffdb50f29cd3562922f6c4abdcbdd6 Mon Sep 17 00:00:00 2001 From: Anton Blanchard Date: Mon, 22 Mar 2021 11:01:10 +1100 Subject: [PATCH] Reformat spi_flash_ctrl Signed-off-by: Anton Blanchard --- spi_flash_ctrl.vhdl | 16 ++++++++-------- 1 file changed, 8 insertions(+), 8 deletions(-) diff --git a/spi_flash_ctrl.vhdl b/spi_flash_ctrl.vhdl index e34a7c0..d45be90 100644 --- a/spi_flash_ctrl.vhdl +++ b/spi_flash_ctrl.vhdl @@ -232,10 +232,10 @@ begin if rst = '1' then wb_out.ack <= '0'; wb_out.stall <= '0'; - wb_stash.cyc <= '0'; - wb_stash.stb <= '0'; - wb_stash.sel <= (others => '0'); - wb_stash.we <= '0'; + wb_stash.cyc <= '0'; + wb_stash.stb <= '0'; + wb_stash.sel <= (others => '0'); + wb_stash.we <= '0'; else -- Latch wb responses as well for 1 cycle. Stall is updated -- below @@ -348,17 +348,17 @@ begin auto_sync: process(clk) begin if rising_edge(clk) then - if rst = '1' then + if rst = '1' then auto_last_addr <= (others => '0'); - auto_state <= AUTO_BOOT; - else + auto_state <= AUTO_BOOT; + else auto_state <= auto_next; auto_cnt <= auto_cnt_next; auto_data <= auto_data_next; if auto_latch_adr = '1' then auto_last_addr <= auto_lad_next; end if; - end if; + end if; end if; end process;