From ca792f3b1357e882df5dcb91c138e2d29e109b81 Mon Sep 17 00:00:00 2001 From: Paul Mackerras Date: Sat, 6 Dec 2025 18:09:20 +1100 Subject: [PATCH] FPU: Make convert-to-integer-word instructions behave like P9 The fctiw* instructions return a copy of the value in bits 31..0 in bits 63..32 of the result on P9, rather than a sign or zero extension of the word result. Make the FPU do the same. Signed-off-by: Paul Mackerras --- fpu.vhdl | 7 ++++++- 1 file changed, 6 insertions(+), 1 deletion(-) diff --git a/fpu.vhdl b/fpu.vhdl index 106cee6..daccc86 100644 --- a/fpu.vhdl +++ b/fpu.vhdl @@ -1625,6 +1625,7 @@ begin re_set_result <= '1'; rs_sel1 <= RSH1_B; rs_neg2 <= '1'; + v.single_prec := not r.insn(9); if r.b.exponent >= to_signed(64, EXP_BITS) or (r.insn(9) = '0' and r.b.exponent >= to_signed(32, EXP_BITS)) then @@ -3686,7 +3687,8 @@ begin if r.fp_rc = '1' then v.cr_result := v.fpscr(FPSCR_FX downto FPSCR_OX); end if; - v.sp_result := r.single_prec; + -- set sp_result for fctiw* + v.sp_result := r.single_prec and not r.integer_op; v.res_int := r.int_result or r.integer_op; v.illegal := illegal; v.nsnan_result := r.quieten_nan; @@ -3720,6 +3722,9 @@ begin -- This mustn't depend on any fields of r that are modified in IDLE state. if r.res_int = '1' then fp_result <= r.r; + if r.sp_result = '1' then + fp_result(63 downto 32) <= r.r(31 downto 0); + end if; else fp_result <= pack_dp(r.res_sign, r.result_class, r.result_exp, r.r, r.sp_result, r.nsnan_result);