From fe077a116aaec84a7cfdc5ae8cad077b7df891ab Mon Sep 17 00:00:00 2001 From: Paul Mackerras Date: Mon, 6 Apr 2020 12:20:36 +1000 Subject: [PATCH] Rename OP_MCRF to OP_CROP and trim insn_type_t OP_MCRF covers the CR logical ops as well as mcrf since commit c05441bf4793 ("Implement CRNOR and friends"), so this renames OP_MCRF to OP_CROP. The OP_* values for the individual CR logical ops (OP_CRAND, etc.) are not used, so remove them from insn_type_t. No functional change. Signed-off-by: Paul Mackerras --- decode1.vhdl | 2 +- decode_types.vhdl | 7 +++---- execute1.vhdl | 2 +- 3 files changed, 5 insertions(+), 6 deletions(-) diff --git a/decode1.vhdl b/decode1.vhdl index 5230fa4..8a62726 100644 --- a/decode1.vhdl +++ b/decode1.vhdl @@ -103,7 +103,7 @@ architecture behaviour of decode1 is -- unit internal in1 in2 in3 out CR CR inv inv cry cry ldst BR sgn upd rsrv 32b sgn rc lk sgl -- op in out A out in out len ext pipe -- mcrf; and cr logical ops - 2#000# => (ALU, OP_MCRF, NONE, NONE, NONE, NONE, '1', '1', '0', '0', ZERO, '0', NONE, '0', '0', '0', '0', '0', '0', NONE, '0', '0'), + 2#000# => (ALU, OP_CROP, NONE, NONE, NONE, NONE, '1', '1', '0', '0', ZERO, '0', NONE, '0', '0', '0', '0', '0', '0', NONE, '0', '0'), -- addpcis not implemented yet 2#001# => (ALU, OP_ILLEGAL, NONE, NONE, NONE, NONE, '0', '0', '0', '0', ZERO, '0', NONE, '0', '0', '0', '0', '0', '0', RC, '0', '1'), -- bclr, bcctr, bctar diff --git a/decode_types.vhdl b/decode_types.vhdl index b2d9846..f22e4b2 100644 --- a/decode_types.vhdl +++ b/decode_types.vhdl @@ -5,12 +5,11 @@ package decode_types is type insn_type_t is (OP_ILLEGAL, OP_NOP, OP_ADD, OP_ADDPCIS, OP_AND, OP_ATTN, OP_B, OP_BC, OP_BCREG, OP_BPERM, OP_CMP, OP_CMPB, OP_CMPEQB, OP_CMPRB, - OP_CNTZ, OP_CRAND, - OP_CRANDC, OP_CREQV, OP_CRNAND, OP_CRNOR, OP_CROR, OP_CRORC, - OP_CRXOR, OP_DARN, OP_DCBF, OP_DCBST, OP_DCBT, OP_DCBTST, + OP_CNTZ, OP_CROP, + OP_DARN, OP_DCBF, OP_DCBST, OP_DCBT, OP_DCBTST, OP_DCBZ, OP_DIV, OP_DIVE, OP_EXTS, OP_EXTSWSLI, OP_ICBI, OP_ICBT, OP_ISEL, OP_ISYNC, - OP_LOAD, OP_STORE, OP_MADDHD, OP_MADDHDU, OP_MADDLD, OP_MCRF, + OP_LOAD, OP_STORE, OP_MADDHD, OP_MADDHDU, OP_MADDLD, OP_MCRXR, OP_MCRXRX, OP_MFCR, OP_MFMSR, OP_MFSPR, OP_MOD, OP_MTCRF, OP_MTMSRD, OP_MTSPR, OP_MUL_L64, OP_MUL_H64, OP_MUL_H32, OP_OR, diff --git a/execute1.vhdl b/execute1.vhdl index 2668364..ffa9048 100644 --- a/execute1.vhdl +++ b/execute1.vhdl @@ -581,7 +581,7 @@ begin result := b_in; end if; result_en := '1'; - when OP_MCRF => + when OP_CROP => cr_op := insn_cr(e_in.insn); report "CR OP " & to_hstring(cr_op); if cr_op(0) = '0' then -- MCRF