/* Copyright 2013-2014 IBM Corp.
 *
 * Licensed under the Apache License, Version 2.0 (the "License");
 * you may not use this file except in compliance with the License.
 * You may obtain a copy of the License at
 *
 * 	http://www.apache.org/licenses/LICENSE-2.0
 *
 * Unless required by applicable law or agreed to in writing, software
 * distributed under the License is distributed on an "AS IS" BASIS,
 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or
 * implied.
 * See the License for the specific language governing permissions and
 * limitations under the License.
 */

#define STACK_TOP 0x2000

/* Load an immediate 64-bit value into a register */
#define LOAD_IMM64(r, e)			\
	lis	r,(e)@highest;			\
	ori	r,r,(e)@higher;			\
	rldicr	r,r, 32, 31;			\
	oris	r,r, (e)@h;			\
	ori	r,r, (e)@l;

	.section ".head","ax"

	/*
	 * Microwatt currently enters in LE mode at 0x0, so we don't need to
	 * do any endian fix ups
	 */
	. = 0
.global _start
_start:
	b	boot_entry

.global boot_entry
boot_entry:
	/* setup stack */
	LOAD_IMM64(%r1, STACK_TOP - 0x100)
	LOAD_IMM64(%r12, main)
	mtctr	%r12
	bctrl
	attn // terminate on exit
	b .

	.globl	read_sprn
read_sprn:
	nop
	nop
	mr	%r0,%r3
	mr	%r3,%r4
	cmpdi	%r0,0
	beq	0f
	cmpdi	%r0,1
	beq	1f
	cmpdi	%r0,4
	beq	4f
	cmpdi	%r0,5
	beq	5f
	cmpdi	%r0,6
	beq	6f
	mfspr	%r3,179
	blr
0:	mfspr	%r3,0
	blr
1:	mfspr	%r3,1
	blr
4:	mfspr	%r3,4
	blr
5:	mfspr	%r3,5
	blr
6:	mfspr	%r3,6
	blr

	.globl	write_sprn
write_sprn:
	nop
	nop
	mr	%r0,%r3
	li	%r3,0
	cmpdi	%r0,0
	beq	0f
	cmpdi	%r0,1
	beq	1f
	cmpdi	%r0,4
	beq	4f
	cmpdi	%r0,5
	beq	5f
	cmpdi	%r0,6
	beq	6f
	mtspr	179,%r3
	blr
0:	mtspr	0,%r3
	blr
1:	mtspr	1,%r3
	blr
4:	mtspr	4,%r3
	blr
5:	mtspr	5,%r3
	blr
6:	mtspr	6,%r3
	blr

#define EXCEPTION(nr)		\
	.= nr			;\
	li	%r3,nr		;\
	blr

	EXCEPTION(0x300)
	EXCEPTION(0x380)
	EXCEPTION(0x400)
	EXCEPTION(0x480)
	EXCEPTION(0x500)
	EXCEPTION(0x600)
	EXCEPTION(0x700)
	EXCEPTION(0x800)
	EXCEPTION(0x900)
	EXCEPTION(0x980)
	EXCEPTION(0xa00)
	EXCEPTION(0xb00)
	EXCEPTION(0xc00)
	EXCEPTION(0xd00)
	EXCEPTION(0xe00)
	EXCEPTION(0xe20)
	EXCEPTION(0xe40)
	EXCEPTION(0xe60)
	EXCEPTION(0xe80)
	EXCEPTION(0xf00)
	EXCEPTION(0xf20)
	EXCEPTION(0xf40)
	EXCEPTION(0xf60)
	EXCEPTION(0xf80)