From 139eb488cf017eb179c0814c9026b6638afe233f Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Jean-Fran=C3=A7ois=20Nguyen?= <jf@jfng.fr>
Date: Fri, 28 Oct 2022 17:05:57 +0200
Subject: [PATCH] cores/dinofly: drive dbus inputs.

---
 cores/dinofly/dinofly_cli/core.py | 5 +++++
 1 file changed, 5 insertions(+)

diff --git a/cores/dinofly/dinofly_cli/core.py b/cores/dinofly/dinofly_cli/core.py
index 36151fb..9a71120 100644
--- a/cores/dinofly/dinofly_cli/core.py
+++ b/cores/dinofly/dinofly_cli/core.py
@@ -14,6 +14,7 @@ class DinoflyWrapper(Elaboratable):
         self._cpu = DinoflyCPU(with_pfv=True)
         self.pfv  = self._cpu.pfv
         self.ibus = self._cpu.ibus
+        self.dbus = self._cpu.dbus
 
     def elaborate(self, platform):
         m = Module()
@@ -24,6 +25,10 @@ class DinoflyWrapper(Elaboratable):
             self.ibus.dat_r.eq(AnySeq(self.ibus.data_width)),
             self.ibus.ack  .eq(AnySeq(1)),
             self.ibus.err  .eq(AnySeq(1)),
+
+            self.dbus.dat_r.eq(AnySeq(self.dbus.data_width)),
+            self.dbus.ack  .eq(AnySeq(1)),
+            self.dbus.err  .eq(AnySeq(1)),
         ]
 
         return m