OpenPOWER Cores

Repositories Projects Packages

Sort

Newest Oldest Alphabetically Reverse alphabetically Recently updated Least recently updated Most stars Fewest stars Most forks Fewest forks

Search

a2p

Verilog 0 0

An experimental small core based on VexRiscv, written in Scala

Updated 9 months ago

microwatt

Verilog 1 1

A tiny Open POWER ISA softcore written in VHDL 2008

openpower

ppc64le

processor

vhdl

Updated 4 months ago

power-fv

Python 1 0

Updated 6 days ago

toy-sram

F* 1 0

High-specific-bandwidth memory design

Updated 7 months ago

a2o

Verilog 1 1

The A2O core was a follow-on to A2I, written in Verilog, and supported a lower thread count than A2I, but higher performance per thread, using out-of-order execution (register renaming, reservation stations, completion buffer) and a store queue

openpower

a2

a2o

power

powerisa

softcpu

Updated 2 months ago

a2i

VHDL 2 1

The A2I core was used as the general purpose processor for BlueGene/Q, the successor to BlueGene/L and BlueGene/P supercomputers

Updated 10 months ago

Members

0