%%% \section{Workgroup name} LibreBMC \acrfull{SIG} \section{Definitions} Reference the OpenPOWER Foundation \acrshort{IPR} Policy and OpenPOWER WorkGroup Process for additional term definitions. \begin{enumerate} \item ``Maintainer" is an Eligible or Non-Eligible participant of the workgroup that has been elected by Full Majority Vote to review and approve changes to the LibreBMC code in the git repository(ies) created by this \acrshort{SIG}. \end{enumerate} \section{Description} The LibreBMC \acrshort{SIG} is a project workgroup whose purpose is to create a reference design of an open source \acrfull{BMC} compatible with the \acrfull{OCP} \acrfull{DC-SCM} specification, named ``LibreBMC".\par The goal of the \acrshort{SIG} is advance the state of the open source hardware community through the design and implementation of LibreBMC. The SIG will use many open source tools and components, including open POWER \acrshort{ISA} processor soft core, \acrfull{RTL} for all required \acrshort{BMC} interfaces and controls, design and synthesis tools, \acrfull{PDK}'s, \acrshort{DC-SCM} board reference designs and \acrshort{BMC} software to design and implement LibreBMC in order to contribute to their growth and usability.\par The purpose of LibreBMC is to be a fully open source \acrshort{BMC} design which will enhance the security of server management control by utilizing open hardware and software, and designed with fully open source tooling.\par The requirement of a POWER \acrshort{ISA} core will drive the design and open release of a new or improved POWER soft-core. \section{Scope} The scope of the LibreBMC \acrshort{SIG} is the creation of a functional \acrshort{BMC} prototype. The prototype will include a \acrshort{DC-SCM} card design with a \acrfull{FPGA} controller. The \acrshort{FPGA} image will consist of a POWER \acrshort{ISA} core(s) that can run the OpenBMC stack (including \acrfull{LSB}) and manage the interface between system-management software and platform hardware. The \acrshort{FPGA} image will also have all controls and interfaces required of a typical \acrshort{BMC}.\par LibreBMC will be compatible with the \acrshort{OCP} \acrshort{DC-SCM} specification. Any changes to the \acrshort{OCP} \acrshort{DC-SCM} specification is outside the scope of this workgroup and will be handled through \acrshort{OCP}.\par LibreBMC should meet the requirements to manage a variety of server architectures, including but not limited to POWER, ARM, and x86 based systems. Any changes to system reference designs or specifications to use LibreBMC are outside the scope of this workgroup.\par The scope of the workgroup will require the use of Linux, OpenBMC, open source tools, interfaces, and components. Any modifications of these are outside the scope of the workgroup and will be handled through their respective bodies.\par \section{Similar Activities} \begin{itemize} \item Accelerator Workgroup : may work with to define the requirements for open tooling needed to complete the implementation of LibreBMC components. \item Compliance Workgroup : defines the compliancy requirements for the Power ISA core to be used in LibreBMC. \item HW Architecture Workgroup : maintains the hardware architecture specifications that may be needed by this workgroup to properly architect LibreBMC and functions use to manage and communicate with a system. \item System Software Workgroup : owns definition, documentation, and maintenance of the firmware required to boot, run, and manage Linux on OpenPOWER compliant systems that will run on LibreBMC. \item Development Platform Workgroup : defines the reference architecture of future OpenPower systems that may incorporate and use LibreBMC to manage the system. \end{itemize} \section{Users} \begin{itemize} \item Any system vendor, datacenter operator, or cloud provider that plans to use a \acrshort{BMC}, compatible with the \acrshort{OCP} \acrshort{DC-SCM} form factor to manage their system. \item Any third-party hardware manufacturer that choose to build \acrshort{BMC}s compatible with the \acrshort{DC-SCM} specification. \item Any monitoring / base software vendors. \end{itemize} \section{Work Product} \begin{itemize} \item \acrshort{FPGA} \acrshort{RTL} for a POWER \acrshort{ISA} soft-core \item \acrshort{FPGA} \acrshort{RTL} that includes the soft-core and all required interfaces and controls \item Working LibreBMC prototype \item Demonstration of LibreBMC managing a system \end{itemize} The \acrshort{FPGA} \acrshort{RTL} and reference material will be open to the general public and maintained in a public git repository(ies). \section{Projects} \begin{itemize} \item Design an \acrshort{FPGA} based POWER \acrshort{ISA} soft-core capable of running OpenBMC that meets reasonable performance requirements \item Design and build an \acrshort{FPGA} image for LibreBMC that contains one or more of the POWER \acrshort{ISA} soft cores, along with the required interfaces and controls, that is capable of managing a server. \item Create required material to properly document how to recreate and use the design. \item Build a prototype of LibreBMC. \item Demonstrate the operability of LibreBMC containing the above mentioned \acrshort{FPGA} image in a server. \end{itemize} \section{Participation} Public\par Participation and voting right requirements are as outlined per the OpenPOWER Work Group Process.\par A minimum of one participant will be required to be a Maintainer of the LibreBMC git repository(ies). Maintainer(s) will have the responsibility to review and approve any requested updates to the code in the repository(ies). Any disagreement with the decision of a Maintainer can be appealed to the Workgroup Chair and the Chair has the discretion to bring the issue to a vote of the Workgroup.\par \section{Work Group Convener} Paul Lecocq (IBM) \section{Meeting Plan:} Paul Lecocq will convene the first meeting.\par The first meeting will be at 5p CST on the second Wednesday after the TSC and BoD approve the formation of the SIG. Subsequent meetings will be held bi-weekly alternating between 5p CST Wednesday and 10a CST Thursday to accommodate participants in all time zones. \section{Participants} \begin{itemize} \item IBM \begin{itemize} \item Paul Lecocq (lecocq@us.ibm.com) \item Paul Mackerras (pmac@au1.ibm.com) \item Steve Roberts (robers@us.ibm.com) \end{itemize} \item Google \begin{itemize} \item Tim Ansel (tansell@google.com) \end{itemize} \item Antmicro \begin{itemize} \item Michael Gielda (mgielda@antmicro.com) \end{itemize} \item Raptor Computing Systems \begin{itemize} \item Timothy Pearson (tpearson@raptorengineering.com) \end{itemize} VanTosh \begin{itemize} \item Toshaan Bharvani (toshaan@vantosh.com) \end{itemize} Yadro \begin{itemize} \item Alexey Stepanov (a.stepanov@yadro.com) \end{itemize} \end{itemize} \section{Balloting Approval Requirements} While the WG aims to operate as a consensus based community from time to time a WG decision may require a vote to move a Project forward.\par Standard WG Process applies with the following specific requirements with respect to Maintainers : \begin{itemize} \item Election of repository Maintainer(s) will be by Full Majority Vote. A Maintainer can be removed from their position as Maintainer by Full Majority Vote as well. \item The initial Maintainer(s) will be voted in prior to setting up the git repository for the project. \end{itemize} \section{Member Organization Support} Member organization support will be confirmed as part of the approval process. \section{Anticipated Contributions} \begin{itemize} \item POWER \acrshort{ISA} Core \acrshort{RTL} \item \acrshort{RTL} created as part of the workgroup deliverable \item \acrshort{OCP} \acrshort{DC-SCM} compatible board schematics \end{itemize} \section{IPR, Confidentiality \& Licensing} The following sections may not be modified after chartering. Changes require closing and submitting a new charter. \subsection{Confidentiality Mode} Non-confidential \subsection{IPR Policy} Code Mode \subsection{Open Source Licensing Mode} Apache License, v2.0\par All Code contributed to the WG by a WG Member or WG Party shall be licensed to OpenPOWER under Apache License, V2.0 with the condition that the patent license granted in Section 3 of the License, as applied to the ``Work", hereby includes implementations of the Work in physical form.\par Code contributed to the WG by a WG member or WG party may be licensed to OpenPOWER under a future open hardware license with WG, TSC, and Board approval.\par All contributions to the WG's git repository must include a developer certificate of originality. Non-Eligible person contributions to the git repository are bound to a Guest Participation Agreement. The Guest Participation Agreement for this WG is agreement to the terms of the OS license as defined in the OS Licensing Mode and documented in the license file within the WG's git repository.\par The Guest Participation Agreement is agreed to automatically upon any contribution to the WG's git repository. Any contributions made outside the WG's git repository by a non-Eligible person must include a signed Contribution / Feedback License as defined in Section 7.1 and Appendix A of the OpenPOWER IPR Policy. Alternatively this WG can provide a Guest Participation Agreement to be signed per Section 7.2.\par The executed Contribution / Feedback License or Guest Participation Agreement must be sent to librebmc@openpowerfoundation.org.\par As a default position, all Code that is, or is made part of, an OpenPOWER Deliverable shall be licensed out by OpenPOWER under one of the following licenses and shall at least be provided in source code form. The selected license will include or be accompanied by a clarification that any necessary license rights for the Power \acrshort{ISA} comes from the POWER \acrshort{ISA} license and is not granted under the selected license for the OpenPOWER Deliverable. \begin{itemize} \item Apache License, V2.0 with the condition that the patent license granted in Section 3 of the License, as applied to the ``Work", hereby includes implementations of the Work in physical form. \item a future open hardware license with WG, TSC, and Board approval. \end{itemize} \subsection{Open Source Communities} This WG may accept Code from the following OS Communities under their respective licenses. \begin{itemize} \item LiteX \begin{itemize} \item https://github.com/enjoy-digital/litex \item 2-Clause BSD \end{itemize} \item Microwatt POWER ISA Core \begin{itemize} \item https://github.com/antonblanchard/microwatt \item Apache license, Version 2.0 \end{itemize} \item Antmicro DC-SCM board \begin{itemize} \item https://github.com/antmicro/artix-dc-scm (ecp5-dc-scm) \item Apache license, Version 2.0 \end{itemize} \end{itemize} This WG may accept other OS Code under a Permissive License such as Apache License, v2.0, 2 or 3 clause BSD, MIT, ISC, or other \acrshort{OS} license approved by this WG, TSC and Board.\par This WG may contribute Code to the following \acrshort{OS} Communities under either the respective \acrshort{OS} Communities required license or an approved WG deliverable license as defined in the above \acrshort{OS} Licensing Mode.\par \begin{itemize} \item OpenBMC \begin{itemize} \item https://github.com/openbmc \item Apache license, Version 2.0 \end{itemize} \item LiteX \begin{itemize} \item https://github.com/enjoy-digital/litex \item 2-Clause BSD \end{itemize} Microwatt POWER ISA Core \begin{itemize} \item https://github.com/antonblanchard/microwatt \item Apache License, Version 2.0 \end{itemize} Antmicro DC-SCM board \begin{itemize} \item o https://github.com/antmicro/artix-dc-scm or ecp5-dc-scm \item Apache license, Version 2.0 \end{itemize} SymbiFlow \begin{itemize} \item https://symbiflow.github.io/ \item ISC License \end{itemize} Yosys \begin{itemize} \item http://www.clifford.at/yosys/ \item ISC License \end{itemize} Project X-Ray \begin{itemize} \item https://github.com/SymbiFlow/prjxray \item ISC License \end{itemize} \end{itemize} This WG may accept or contribute Code from/to additional OS Communities with approval by the WG, TSC, and Board. Any code accepted from or contributed to approved OS Communities must be under a Permissive License such as Apache License, v2.0, 2 or 3 clause BSD, MIT, ISC, or other OS license approved by the WG, TSC, and Board.