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\section{Workgroup name}

LibreBMC Special Integration Work Group (SIG)

\section{Definitions}

Reference the OpenPOWER Foundation IPR Policy and OpenPOWER WorkGroup Process for additional term definitions.

\begin{itemize}
\item
``Maintainer" is an Eligible or Non-Eligible participant of the workgroup that has been elected by Full Majority Vote to review and
approve changes to the LibreBMC code in the git repository(ies) created by this SIG.
\end{itemize}

\section{Description}

The LibreBMC SIG is a project workgroup whose purpose is to create a reference design of an open source Baseboard Management Controller (BMC) compatible
with the Open Compute Project (OCP) Datacenter Secure Control Module (DC-SCM) specification, named ``LibreBMC".\par

The goal of the SIG is advance the state of the open source hardware community through the design and implementation of LibreBMC.
The SIG will use many open source tools and components, including open POWER ISA processor soft core,
Register-Transfer-Level (RTL) for all required BMC interfaces and controls, design and synthesis tools, PDKs, DC-SCM board reference designs and
BMC software to design and implement LibreBMC in order to contribute to their growth and usability.\par

The purpose of LibreBMC is to be a fully open source BMC design which will enhance the security of server management control by utilizing open hardware
and software, and designed with fully open source tooling.\par

The requirement of a POWER ISA core will drive the design and open release of a new or improved POWER soft-core.

\section{Scope}

The scope of the LibreBMC SIG is the creation of a functional BMC prototype.
The prototype will include a DC-SCM card design with a FPGA controller.
The FPGA image will consist of a POWER ISA core(s) that can run the OpenBMC stack (including LSB) and
manage the interface between system-management software and platform hardware.
The FPGA image will also have all controls and interfaces required of a typical BMC.\par

LibreBMC will be compatible with the OCP DC-SCM specification.
Any changes to the OCP DC-SCM specification is outside the scope of this workgroup and will be handled through OCP.\par

LibreBMC should meet the requirements to manage a variety of server architectures, including but not limited to POWER, ARM, and x86 based systems.
Any changes to system reference designs or specifications to use LibreBMC are outside the scope of this workgroup.\par

The scope of the workgroup will require the use of Linux, OpenBMC, open source tools, interfaces, and components.
Any modifications of these are outside the scope of the workgroup and will be handled through their respective bodies.\par

\section{Similar Activities}

\begin{enumerate}
\item
Accelerator Workgroup : may work with to define the requirements for open tooling needed to complete the implementation of LibreBMC components.
\item
Compliance Workgroup : defines the compliancy requirements for the Power ISA core to be used in LibreBMC.
\item
HW Architecture Workgroup : maintains the hardware architecture specifications that may be needed by this workgroup to properly architect
LibreBMC and functions use to manage and communicate with a system.
\item
System Software Workgroup : owns definition, documentation, and maintenance of the firmware required to boot, run, and manage Linux on
OpenPOWER compliant systems that will run on LibreBMC.
\item
Development Platform Workgroup : defines the reference architecture of future OpenPower systems that may incorporate and use LibreBMC to
manage the system.
\end{enumerate}

\section{Users}

Any system vendor, datacenter, or cloud that plans to use a BMC, compatible with the OCP DC-SCM form factor to manage their system.
Any third-party hardware manufacturers that choose to build BMC's compatible with the DC-SCM specification.
Any monitoring / base software vendors.

\section{Work Product}

\begin{enumerate}
\item
FPGA RTL for a POWER ISA soft-core
\item
FPGA RTL that includes the soft-core and all required interfaces and controls
\item
Working LibreBMC prototype
\item
Demonstration of LibreBMC managing a system
\end{enumerate}

The FPGA RTL and reference material will be open to the general public and maintained in a public git repository(ies).

\section{Projects}

\begin{enumerate}
\item
Design an FPGA based POWER ISA soft-core capable of running OpenBMC that meets reasonable performance requirements
\item
Design and build an FPGA image for LibreBMC that contains one or more of the POWER ISA soft cores, along with the required interfaces and
controls, that is capable of managing a server.
\item
Create required material to properly document how to recreate and use the design.
\item
Build a prototype of LibreBMC.
\item
Demonstrate the operability of LibreBMC containing the above mentioned FPGA image in a server.
\end{enumerate}

\section{Participation}

Public\par

Participation and voting right requirements are as outlined per the OpenPOWER Work Group Process.\par

A minimum of one participant will be required to be a Maintainer of the LibreBMC git repository(ies).
Maintainer(s) will have the responsibility to review and approve any requested updates to the code in the repository(ies).
Any disagreement with the decision of a Maintainer can be appealed to the Workgroup Chair and
the Chair has the discretion to bring the issue to a vote of the Workgroup.\par

\section{Work Group Convener}

Paul Lecocq (IBM)

\section{Meeting Plan:}

Paul Lecocq will convene the first meeting.\par

The first meeting will be at 5p CST on the second Wednesday after the TSC and BoD approve the formation of the SIG.
Subsequent meetings will be held bi-weekly alternating between 5p CST Wednesday and 10a CST Thursday to accommodate participants in all time zones.

\section{Participants}

\begin{enumerate}
\item
IBM
	\begin{enumerate}
	\item
	Paul Lecocq (lecocq@us.ibm.com)
	\item
	Paul Mackerras (pmac@au1.ibm.com)
	\item
	Steve Roberts (robers@us.ibm.com)
	\end{enumerate}
\item
Google
	\begin{enumerate}
	\item
	Tim Ansel (tansell@google.com)
	\end{enumerate}
\item
Antmicro
	\begin{enumerate}
	\item
	Michael Gielda (mgielda@antmicro.com)
	\end{enumerate}
\item
Raptor Computing Systems
	\begin{enumerate}
	\item
	Timothy Pearson (tpearson@raptorengineering.com)
	\end{enumerate}
VanTosh
	\begin{enumerate}
	\item
	Toshaan Bharvani (toshaan@vantosh.com)
	\end{enumerate}
Yadro
	\begin{enumerate}
	\item
	Alexey Stepanov (a.stepanov@yadro.com)
	\end{enumerate}
\end{enumerate}

\section{Balloting Approval Requirements}

While the WG aims to operate as a consensus based community from time to time a WG decision may require a vote to move a Project forward.\par

Standard WG Process applies with the following specific requirements with respect to Maintainers :
\begin{enumerate}
\item
Election of repository Maintainer(s) will be by Full Majority Vote.
A Maintainer can be removed from their position as Maintainer by Full Majority Vote as well.
\item
The initial Maintainer(s) will be voted in prior to setting up the git repository for the project.
\end{enumerate}

\section{Member Organization Support}

Member organization support will be confirmed as part of the approval process.

\section{Anticipated Contributions}

\begin{enumerate}
\item
Power ISA Core RTL
\item
RTL created as part of the workgroup deliverable
\item
OCP DC-SCM compatible board schematics
\end{enumerate}

\section{IPR, Confidentiality \& Licensing}

The following sections may not be modified after chartering. Changes require closing and submitting a new charter.

\subsection{Confidentiality Mode}

Non-confidential

\subsection{IPR Policy}

Code Mode

\subsection{Open Source Licensing Mode}

Apache License, v2.0\par

All Code contributed to the WG by a WG Member or WG Party shall be licensed to OpenPOWER under Apache License, V2.0
with the condition that the patent license granted in Section 3 of the License, as applied to the ``Work", hereby
includes implementations of the Work in physical form.\par

Code contributed to the WG by a WG member or WG party may be licensed to OpenPOWER under a future open hardware license with
WG, TSC, and Board approval.\par

All contributions to the WG's git repository must include a developer certificate of originality.
Non-Eligible person contributions to the git repository are bound to a Guest Participation Agreement.
The Guest Participation Agreement for this WG is agreement to the terms of the OS license as defined in the OS Licensing Mode and
documented in the license file within the WG's git repository.\par

The Guest Participation Agreement is agreed to automatically upon any contribution to the WG's git repository.
Any contributions made outside the WG's git repository by a non-Eligible person must include a signed
Contribution / Feedback License as defined in Section 7.1 and Appendix A of the OpenPOWER IPR Policy.
Alternatively this WG can provide a Guest Participation Agreement to be signed per Section 7.2.\par

The executed Contribution / Feedback License or Guest Participation Agreement must be sent to librebmc@openpowerfoundation.org.\par

As a default position, all Code that is, or is made part of, an OpenPOWER Deliverable shall be licensed out by OpenPOWER under one of the following
licenses and shall at least be provided in source code form.
The selected license will include or be accompanied by a clarification that any necessary license rights for the Power ISA comes from
the Power ISA license and is not granted under the selected license for the OpenPOWER Deliverable.
\begin{enumerate}
\item
Apache License, V2.0 with the condition that the patent license granted in Section 3 of the License, as applied to the ``Work",
hereby includes implementations of the Work in physical form.
\item
a future open hardware license with WG, TSC, and Board approval.

\subsection{Open Source Communities}

This WG may accept Code from the following OS Communities under their respective licenses.

\begin{enumerate}
\item
LiteX
	\begin{enumerate}
	\item
	https://github.com/enjoy-digital/litex
	\item
	2-Clause BSD
	\end{enumerate}
\item
Microwatt POWER ISA Core
	\begin{enumerate}
	\item
	https://github.com/antonblanchard/microwatt
	\item
	Apache license, Version 2.0
	\end{itemize}
\item
Antmicro DC-SCM board
	\begin{enumerate}
	\item
	https://github.com/antmicro/artix-dc-scm (ecp5-dc-scm)
	\item
	Apache license, Version 2.0
	\end{enumerate}
\end{enumerate}

This WG may accept other OS Code under a Permissive License such as Apache License, v2.0, 2 or 3 clause BSD, MIT, ISC,
or other OS license approved by this WG, TSC and Board.\par

This WG may contribute Code to the following OS Communities under either the respective OS Communities required license or an approved WG deliverable
license as defined in the above OS Licensing Mode.\par

\begin{enumerate}
\item
OpenBMC
	\begin{enumerate}
	\item
	https://github.com/openbmc
	\ite,
	Apache license, Version 2.0
	\end{enumerate}
\item
LiteX
	\begin{enumerate}
	\item
	https://github.com/enjoy-digital/litex
	\item
	2-Clause BSD
	\end{enumerate}
Microwatt POWER ISA Core
	\begin{enumerate}
	\item
	https://github.com/antonblanchard/microwatt
	\item
	Apache License, Version 2.0
	\end{enumerate}
Antmicro DC-SCM board
	\begin{enumerate}
	\item
	o https://github.com/antmicro/artix-dc-scm or ecp5-dc-scm
	\item
	Apache license, Version 2.0
	\end{enumerate}
SymbiFlow
	\begin{enumerate}
	\item
	https://symbiflow.github.io/
	\item
	ISC License
	\end{enumerate}
Yosys
	\begin{enumerate}
	\item
	http://www.clifford.at/yosys/
	\item
	ISC License
	\end{enumerate}
Project X-Ray
	\begin{enumerate}
	\item
	https://github.com/SymbiFlow/prjxray
	\item
	ISC License
	\end{enumerate}
\end{enumerate}

This WG may accept or contribute Code from/to additional OS Communities with approval by the WG, TSC, and Board.
Any code accepted from or contributed to approved OS Communities must be under a Permissive License such as
Apache License, v2.0, 2 or 3 clause BSD, MIT, ISC, or other OS license approved by the WG, TSC, and Board.
