From 7052ceef4accebf06d3c344e478a1ad77c9098a2 Mon Sep 17 00:00:00 2001 From: Paul Mackerras Date: Thu, 6 Aug 2020 20:31:09 +1000 Subject: [PATCH] core: Implement the wait instruction as a no-op Signed-off-by: Paul Mackerras --- decode1.vhdl | 1 + 1 file changed, 1 insertion(+) diff --git a/decode1.vhdl b/decode1.vhdl index 4e20706..69b50a6 100644 --- a/decode1.vhdl +++ b/decode1.vhdl @@ -364,6 +364,7 @@ architecture behaviour of decode1 is 2#0000000100# => (ALU, OP_TRAP, RA, RB, NONE, NONE, '0', '0', '0', '0', ZERO, '0', NONE, '0', '0', '0', '0', '1', '0', NONE, '0', '1'), -- tw 2#0100110010# => (LDST, OP_TLBIE, NONE, RB, RS, NONE, '0', '0', '0', '0', ZERO, '0', NONE, '0', '0', '0', '0', '0', '0', NONE, '0', '0'), -- tlbie 2#0100010010# => (LDST, OP_TLBIE, NONE, RB, RS, NONE, '0', '0', '0', '0', ZERO, '0', NONE, '0', '0', '0', '0', '0', '0', NONE, '0', '0'), -- tlbiel + 2#0000011110# => (ALU, OP_NOP, NONE, NONE, NONE, NONE, '0', '0', '0', '0', ZERO, '0', NONE, '0', '0', '0', '0', '0', '0', NONE, '0', '1'), -- wait 2#0100111100# => (ALU, OP_XOR, NONE, RB, RS, RA, '0', '0', '0', '0', ZERO, '0', NONE, '0', '0', '0', '0', '0', '0', RC, '0', '0'), -- xor others => illegal_inst );