From 84f24a4773804215d7f8857e3292497e9f3426d4 Mon Sep 17 00:00:00 2001 From: Anton Blanchard Date: Tue, 15 Dec 2020 09:20:10 +1100 Subject: [PATCH] tie off wb_ext_io_out --- fpga/top-caravel.vhdl | 8 +++++++- 1 file changed, 7 insertions(+), 1 deletion(-) diff --git a/fpga/top-caravel.vhdl b/fpga/top-caravel.vhdl index a0b736f..20512fd 100644 --- a/fpga/top-caravel.vhdl +++ b/fpga/top-caravel.vhdl @@ -58,7 +58,10 @@ entity toplevel is ib_pty : in std_ulogic; -- Add an I/O pin to select fetching from flash on reset - alt_reset : in std_ulogic + alt_reset : in std_ulogic; + + -- unused + wb_ext_io_out : out wb_io_slave_out ); end entity toplevel; @@ -84,6 +87,9 @@ begin system_rst <= not ext_rst when RESET_LOW else ext_rst; + -- Unused, but tie it off + wb_ext_io_out <= wb_io_slave_out_init; + -- Main SoC soc0: entity work.soc generic map(