diff --git a/fetch1.vhdl b/fetch1.vhdl
index 14ef8e8..ff7d64a 100644
--- a/fetch1.vhdl
+++ b/fetch1.vhdl
@@ -7,7 +7,7 @@ use work.common.all;
 
 entity fetch1 is
 	generic(
-		RESET_ADDRESS : std_logic_vector(63 downto 0)
+		RESET_ADDRESS : std_logic_vector(63 downto 0) := (others => '0')
 	);
 	port(
 		clk           : in std_ulogic;