From 9208276aa276c3e48af6ff758dc4e450d5e775ac Mon Sep 17 00:00:00 2001 From: Anton Blanchard Date: Mon, 22 Mar 2021 10:06:03 +1100 Subject: [PATCH] Reformat register_file Signed-off-by: Anton Blanchard --- register_file.vhdl | 30 +++++++++++++++--------------- 1 file changed, 15 insertions(+), 15 deletions(-) diff --git a/register_file.vhdl b/register_file.vhdl index 32c8490..b5e7246 100644 --- a/register_file.vhdl +++ b/register_file.vhdl @@ -134,21 +134,21 @@ begin -- Dump registers if core terminates sim_dump_test: if SIM generate - dump_registers: process(all) - begin - if sim_dump = '1' then - loop_0: for i in 0 to 31 loop - report "GPR" & integer'image(i) & " " & to_hstring(registers(i)); - end loop loop_0; - - report "LR " & to_hstring(registers(to_integer(unsigned(fast_spr_num(SPR_LR))))); - report "CTR " & to_hstring(registers(to_integer(unsigned(fast_spr_num(SPR_CTR))))); - report "XER " & to_hstring(registers(to_integer(unsigned(fast_spr_num(SPR_XER))))); - sim_dump_done <= '1'; - else - sim_dump_done <= '0'; - end if; - end process; + dump_registers: process(all) + begin + if sim_dump = '1' then + loop_0: for i in 0 to 31 loop + report "GPR" & integer'image(i) & " " & to_hstring(registers(i)); + end loop loop_0; + + report "LR " & to_hstring(registers(to_integer(unsigned(fast_spr_num(SPR_LR))))); + report "CTR " & to_hstring(registers(to_integer(unsigned(fast_spr_num(SPR_CTR))))); + report "XER " & to_hstring(registers(to_integer(unsigned(fast_spr_num(SPR_XER))))); + sim_dump_done <= '1'; + else + sim_dump_done <= '0'; + end if; + end process; end generate; -- Keep GHDL synthesis happy