From d3a7517318f0b729dcbd64370b074e1e9003a258 Mon Sep 17 00:00:00 2001 From: Anton Blanchard Date: Sun, 12 Jun 2022 10:34:20 +1000 Subject: [PATCH] divider: Fix d_out.overflow U state issue While we should only look at this when d_out.valid = 1, we may as remove some U state across interfaces. Signed-off-by: Anton Blanchard --- divider.vhdl | 2 ++ 1 file changed, 2 insertions(+) diff --git a/divider.vhdl b/divider.vhdl index a8bcdbe..3f9b312 100644 --- a/divider.vhdl +++ b/divider.vhdl @@ -42,6 +42,8 @@ begin quot <= (others => '0'); running <= '0'; count <= "0000000"; + is_32bit <= '0'; + overflow <= '0'; elsif d_in.valid = '1' then if d_in.is_extended = '1' then dend <= '0' & d_in.dividend & x"0000000000000000";