diff --git a/enable_capi_snap/bk_main.xml b/enable_capi_snap/bk_main.xml index 74f7426..570f22b 100644 --- a/enable_capi_snap/bk_main.xml +++ b/enable_capi_snap/bk_main.xml @@ -108,6 +108,7 @@ - + diff --git a/enable_capi_snap/ch_enable_snap.xml b/enable_capi_snap/ch_enable_snap.xml index fe94044..0d91bcf 100644 --- a/enable_capi_snap/ch_enable_snap.xml +++ b/enable_capi_snap/ch_enable_snap.xml @@ -70,7 +70,6 @@ xmlns:xlink="http://www.w3.org/1999/xlink" xml:id="chapter_enable_snap"> -
BSP (board support package) module
CAPI1.0: base_image (b_route_design.dcp) @@ -122,9 +121,8 @@ xmlns:xlink="http://www.w3.org/1999/xlink" xml:id="chapter_enable_snap">
- -
Enable a new card in SNAP - For a new FPGA card, the detailed items to update can be classified into following sections: +
Modifications to snap git repositories + For a new FPGA card, the detailed items to update are: Preparations Hardware RTL, setup, simulation @@ -134,7 +132,7 @@ xmlns:xlink="http://www.w3.org/1999/xlink" xml:id="chapter_enable_snap">
Preppartions - First, give a FPGACARD name. It should start from the company's name, following with the card ID and be short. For example. ADKU3 = Alpha-Data ADM-PCIE-KU3. Get follow information from the card vendor. (You can check the "Status" column to trace the progress.) + First, give a FPGACARD name. It should start from the company's name, following with the card ID and be short. For example. ADKU3 = Alpha-Data ADM-PCIE-KU3. Get follow information from the card vendor. Information to collect @@ -208,7 +206,7 @@ xmlns:xlink="http://www.w3.org/1999/xlink" xml:id="chapter_enable_snap"> - For CAPI1.0, you need to generate a new PSL checkpoint file and upload it to OpenPower Portal. Chapter TODO describes the details. + For CAPI1.0, you need to generate a new PSL checkpoint file and upload it to OpenPower Portal. Section describes the details. For CAPI2.0, you need to add a ${FPGACARD} directory in capi2-bsp git repository. Copy an existing folder as a start and follow the README file. Make sure the information in xdc/tcl files are permitted to be open-source. Send email to OpenPower Acceleration Workgroup or contact your representative to apply for a subsystem device ID for the new card. For example, ADKU3 uses 0x0605. S241 uses 0x0660. @@ -345,9 +343,74 @@ xmlns:xlink="http://www.w3.org/1999/xlink" xml:id="chapter_enable_snap">
-
+
Strategy to enable a new card + + To enable a new card on SNAP, please take following tasks one by one. + +
Stage 1: Verify PCIe interface + + Make modifications to snap git repository (and capi2-bsp) as described above. + Select an action example without DDR, for example: hls_helloworld. + Go through the "make model" and "make image" processes and get the bitstream files. + Plug the card onto Power8/Power9 server and power on. + Use Jtag to program the generated bitstream files (bin or mcs) to the card. You need a laptop or workstation installed Vivado Lab Edition, and connect a JTAG/USB cable to the card. Open Hardware Manager, open target, select the FPGA chip and right-click, choose "Add Configuration Memory Device..." and program the bitstream files. See in picture and + Wait it done, unplug the JTAG/USB cable, reboot the server. + When the server is booted, install snap, capi-utils, libcxl. Run lspci to see if the card is there. (Usually with ID 0x0477). Then go to snap directory, make apps and run the application. + + +
+ Vivado Lab Edition + + + + + +
+
+ Add Configuration Memory Device and Program the flash + + + + + +
+ + + When you download and install Vivado Lab Edition, please pick up as same version as the Vivado (SDx) that you are using to build images. + +
+
Stage 2: Verify Flash interface + Use capi-utils to program the bitstream files. If it succeeds, it proves that the Flash interface has been configured correctly. +
+ +
Stage 3: Verify DDR interface + + Select another action example (hdl_example with DDR) or hls_memcopy. + "make model" and "make sim". Make sure the DDR simulation model works well. + "make image" to generate the bitstream files. + Use capi-utils to program the bitstream files to the card. + Run the application to see if it works. + +
+ + + +
Stage 4: Verify Other IO interface + This step is decided by the card vendor and the specific IOs that the card provide. +
+ + +
Stage 5: Performance Validation + You can check the result of "snap/actions/hls_memcopy/tests/test_*_throughput.sh" for bandwidth and "snap/actions/hls_latency_eval/test/test*.sh" for latency. +
+ +
Stage 6: Pressure Test + Prepare bitstream files for basic tests, throughput tests, latency tests, max-power tests. Adding image flashing tests, card reset tests and others. Run them intensively. +
+
+ diff --git a/enable_capi_snap/ch_genpsl_capi10.xml b/enable_capi_snap/ch_genpsl_capi10.xml index 768bb63..d20ee6e 100644 --- a/enable_capi_snap/ch_genpsl_capi10.xml +++ b/enable_capi_snap/ch_genpsl_capi10.xml @@ -82,7 +82,7 @@ set speed "-2-e" 2. Build a whole FPGA image (including AFU).
-
Generate PSL Checkpoint (b_route_design.dcp) +
Generate PSL Checkpoint (b_route_design.dcp) In this section, we just talk about the first build flow - "build a PSL checkpoint". Read it when you need to enable a FPGA card on CAPI1.0 or to fix a bug and update b_routed_design.dcp. The controlling bits should be set as: ####flow control diff --git a/enable_capi_snap/ch_introduction.xml b/enable_capi_snap/ch_introduction.xml index d66f975..fb57fda 100644 --- a/enable_capi_snap/ch_introduction.xml +++ b/enable_capi_snap/ch_introduction.xml @@ -81,7 +81,6 @@ xmlns:xlink="http://www.w3.org/1999/xlink" xml:id="chapter_introduction"> For both CAPI1.0 and CAPI2.0, people can choose to work on HDK or on SNAP. The preferred way is to work on SNAP. In the following chapters, we will introduce: Enable a FPGA card in SNAP - Generate a PSL Checkpoint (CAPI1.0 only) Work with HDK (CAPI1.0) Work with HDK (CAPI2.0) diff --git a/enable_capi_snap/figures/jtag.png b/enable_capi_snap/figures/jtag.png new file mode 100644 index 0000000..6c90b23 Binary files /dev/null and b/enable_capi_snap/figures/jtag.png differ diff --git a/enable_capi_snap/figures/vivado-lab.png b/enable_capi_snap/figures/vivado-lab.png new file mode 100644 index 0000000..1b6ded4 Binary files /dev/null and b/enable_capi_snap/figures/vivado-lab.png differ