From ebabca797d435c8efd38ffb276ded0be04151f7a Mon Sep 17 00:00:00 2001 From: Bill Schmidt Date: Mon, 9 Jan 2017 12:53:02 -0600 Subject: [PATCH] Fix github issue #58, Miscellaneous corrections from Ian's review. Signed-off-by: Bill Schmidt --- specification/app_a.xml | 14 +++++----- specification/app_b.xml | 48 +++++++++++++++++----------------- specification/app_glossary.xml | 4 +-- specification/bk_main.xml | 2 +- specification/ch_1.xml | 4 +-- specification/ch_2.xml | 14 +++++----- 6 files changed, 43 insertions(+), 43 deletions(-) diff --git a/specification/app_a.xml b/specification/app_a.xml index 41d055e..f8bba6d 100644 --- a/specification/app_a.xml +++ b/specification/app_a.xml @@ -2943,8 +2943,8 @@ xml:id="dbdoclet.50655245_pgfId-1138128"> Each element of the returned integer vector is extracted from the exponent field of the corresponding floating-point vector element. - The extracted exponent of ARG1 is returned as a - right-justified unsigned integer containing a biased exponent, in + The extracted exponents of ARG1 are returned as + right-justified unsigned integers containing biased exponents, in accordance with the exponent representation specified by IEEE 754, without further processing. @@ -3224,7 +3224,7 @@ xml:id="dbdoclet.50655245_pgfId-1138128"> - VEC_FIRST_MISMATCH_INDEX(ARG1, ARG2) + VEC_FIRST_MISMATCH_INDEX (ARG1, ARG2) POWER ISA 3.0 @@ -3373,7 +3373,8 @@ xml:id="dbdoclet.50655245_pgfId-1138128"> single-precision floating-point numbers. Result value: Target elements are obtained by converting the respective - source elements to unsigned integers. + source elements to single-precision floating-point + numbers. @@ -3402,8 +3403,7 @@ xml:id="dbdoclet.50655245_pgfId-1138128"> Purpose: Converts an input vectora vector of integers - to a vector of single-precision - numbers floating-point numbers. + to a vector of single-precision numbers. Result value: Target elements are obtained by converting the source elements to single-precision numbers as follows: @@ -7122,7 +7122,7 @@ xml:id="dbdoclet.50655245_pgfId-1138128"> This function might not follow the strict operation definition of the resolution of a tie during a round if the -qstrict=nooperationprecision compiler option is - specified. + specified to the XLC compiler. diff --git a/specification/app_b.xml b/specification/app_b.xml index 73154f6..98dcc69 100644 --- a/specification/app_b.xml +++ b/specification/app_b.xml @@ -69,7 +69,7 @@ xml:id="dbdoclet.50655245_pgfId-1450875" revisionflag="added"> - ___BUILTIN_BCDADD (a, b, ps) + __BUILTIN_BCDADD (a, b, ps) Purpose: @@ -148,7 +148,7 @@ xml:id="dbdoclet.50655245_pgfId-1450875" revisionflag="added"> vector unsigned char __builtin_bcdsub (vector unsigned - char, vector unsigned char, long); + char, vector unsigned char, const int); @@ -173,7 +173,7 @@ xml:id="dbdoclet.50655245_pgfId-1450875" revisionflag="added"> - int __ builtin_bcdadd_ofl (vector unsigned char, vector + int __builtin_bcdadd_ofl (vector unsigned char, vector unsigned char); @@ -192,13 +192,13 @@ xml:id="dbdoclet.50655245_pgfId-1450875" revisionflag="added"> - int __ builtin_bcdsub_ofl (vector unsigned char, vector + int __builtin_bcdsub_ofl (vector unsigned char, vector unsigned char); - __ BUILTIN_BCD_INVALID (a) + __BUILTIN_BCD_INVALID (a) Purpose: @@ -212,7 +212,7 @@ xml:id="dbdoclet.50655245_pgfId-1450875" revisionflag="added"> - int __ builtin_bcd_invalid (vector unsigned char); + int __builtin_bcd_invalid (vector unsigned char); @@ -224,7 +224,7 @@ xml:id="dbdoclet.50655245_pgfId-1450875" revisionflag="added"> - __ BUILTIN_BCDCMPEQ (a, b) + __BUILTIN_BCDCMPEQ (a, b) Purpose: @@ -238,13 +238,13 @@ xml:id="dbdoclet.50655245_pgfId-1450875" revisionflag="added"> - int __ builtin_bcdcmpeq (vector unsigned char, vector + int __builtin_bcdcmpeq (vector unsigned char, vector unsigned char); - __ BUILTIN_BCDCMPGE (a, b) + __BUILTIN_BCDCMPGE (a, b) Purpose: @@ -258,7 +258,7 @@ xml:id="dbdoclet.50655245_pgfId-1450875" revisionflag="added"> - int __ builtin_bcdcmpge (vector unsigned char, vector + int __builtin_bcdcmpge (vector unsigned char, vector unsigned char); @@ -278,7 +278,7 @@ xml:id="dbdoclet.50655245_pgfId-1450875" revisionflag="added"> - int __ builtin_bcdcmpgt (vector unsigned char, vector + int __builtin_bcdcmpgt (vector unsigned char, vector unsigned char); @@ -298,13 +298,13 @@ xml:id="dbdoclet.50655245_pgfId-1450875" revisionflag="added"> - int __ builtin_bcdcmple (vector unsigned char, vector + int __builtin_bcdcmple (vector unsigned char, vector unsigned char); - __ BUILTIN_BCDCMPLT (a, b) + __BUILTIN_BCDCMPLT (a, b) Purpose: @@ -318,7 +318,7 @@ xml:id="dbdoclet.50655245_pgfId-1450875" revisionflag="added"> - int __ builtin_bcdcmplt (vector unsigned char, vector + int __builtin_bcdcmplt (vector unsigned char, vector unsigned char); @@ -334,7 +334,7 @@ xml:id="dbdoclet.50655245_pgfId-1450875" revisionflag="added"> - __ BUILTIN_BCD2DFP (a) + __BUILTIN_BCD2DFP (a) Purpose: @@ -357,13 +357,13 @@ xml:id="dbdoclet.50655245_pgfId-1450875" revisionflag="added"> - _Decimal128 __ builtin_bcd2dfp (vector unsigned + _Decimal128 __builtin_bcd2dfp (vector unsigned char); - __ BUILTIN_BCDMUL10 (ARG1) + __BUILTIN_BCDMUL10 (ARG1) Purpose: @@ -382,7 +382,7 @@ xml:id="dbdoclet.50655245_pgfId-1450875" revisionflag="added"> - __ BUILTIN_BCDDIV10 (ARG1) + __BUILTIN_BCDDIV10 (ARG1) Purpose: @@ -424,7 +424,7 @@ xml:id="dbdoclet.50655245_pgfId-1450875" revisionflag="added"> typedef bcd vector unsigned char; The header file also defines a bcd_default_format as follows: #ifndef bcd_default_format -#define bcd_default_format __BCD_SIGN_IBM +#define bcd_default_format __BCD_FORMAT_IBM #endif BCD Functions Defined by bcd.h @@ -679,7 +679,7 @@ xml:id="dbdoclet.50655245_pgfId-1450875" revisionflag="added"> - bcd __bcd_mul (bcd, bcd, long) + bcd __bcd_mul (bcd, bcd, const int) @@ -713,7 +713,7 @@ xml:id="dbdoclet.50655245_pgfId-1450875" revisionflag="added"> - bcd __builtin_bcddiv (bcd, bcd, long); + bcd __builtin_bcddiv (bcd, bcd, const int); @@ -742,7 +742,7 @@ xml:id="dbdoclet.50655245_pgfId-1450875" revisionflag="added"> - bcd __bcd_string2bcd (char *, long); + bcd __bcd_string2bcd (char *, const int); @@ -829,13 +829,13 @@ typedef bcd vector unsigned char; #define BCD_FORMAT_NCR 1 #ifndef bcd_default_format -#define bcd_default_format __BCD_SIGN_IBM +#define bcd_default_format __BCD_FORMAT_IBM #endif #define bcd_add(a,b) ((bcd)__builtin_bcdadd (a,b,bcd_default_format)) #define bcd_sub(A,b) ((bcd)__builtin_bcdsub (a,b,bcd_default_format)) #define bcd_add_ofl(a,b) ((_Bool)__builtin_bcdadd_ofl (a,b)) -#define bcd_add_ofl(a,b) ((_Bool)__builtin_bcdsub_ofl (a,b)) +#define bcd_sub_ofl(a,b) ((_Bool)__builtin_bcdsub_ofl (a,b)) #define bcd_invalid(a) ((_Bool)__builtin_bcd_invalid (a)) #define bcd_cmpeq(a,b) ((_Bool)__builtin_bcdcmpeq (a,b)) #define bcd_cmpge(a,b) ((_Bool)__builtin_bcdcmpge (a,b)) diff --git a/specification/app_glossary.xml b/specification/app_glossary.xml index f1725b7..98b9d58 100644 --- a/specification/app_glossary.xml +++ b/specification/app_glossary.xml @@ -444,7 +444,7 @@ xml:id="dbdoclet.50655246_33489"> RN - The Binary Floating-Point Rounding Control field [of the + The Binary Floating-Point Rounding Control field of the FPSCR register. @@ -533,7 +533,7 @@ xml:id="dbdoclet.50655246_33489"> UE - The Floating-Point Underflow Exception Enable bit [of the + The Floating-Point Underflow Exception Enable bit of the FPSCR register. diff --git a/specification/bk_main.xml b/specification/bk_main.xml index edb218e..58f1bb4 100644 --- a/specification/bk_main.xml +++ b/specification/bk_main.xml @@ -94,7 +94,7 @@ - 2016-12-05 + 2017-01-09 diff --git a/specification/ch_1.xml b/specification/ch_1.xml index 88bcd27..15c143f 100644 --- a/specification/ch_1.xml +++ b/specification/ch_1.xml @@ -66,8 +66,8 @@ - Power Instruction Set Architecture, Version 3.0, - IBM, 2016. + Power Instruction Set Architecture, Versions 2.7 + and 3.0, IBM, 2013-2016. http://www.power.org diff --git a/specification/ch_2.xml b/specification/ch_2.xml index b674c86..c01c63d 100644 --- a/specification/ch_2.xml +++ b/specification/ch_2.xml @@ -20,7 +20,7 @@ xml:id="dbdoclet.50655240_pgfId-1156194"> 64-bit features to implement the ELF ABI version 2.
Processor Architecture - This ABI is predicated on, at a minimum, Power ISA version 3.0 and + This ABI is predicated on, at a minimum, Power ISA version 2.7 and contains additional implementation characteristics. All OpenPOWER instructions that are defined by the Power Architecture can be assumed to be implemented and to work as specified. @@ -354,16 +354,16 @@ xml:id="dbdoclet.50655240_pgfId-1156194"> 6 - 15 + - + 5 - 5 + @@ -474,7 +474,7 @@ xml:id="dbdoclet.50655240_pgfId-1156194"> - 2 + 1 @@ -483,7 +483,7 @@ xml:id="dbdoclet.50655240_pgfId-1156194"> - 1 + 0 @@ -2763,7 +2763,7 @@ xml:id="dbdoclet.50655240_pgfId-1156194"> - vector __Float16 + vector _Float16 16