ABI Application binary interface AES Advanced Encryption Standard API Application programming interface ASCII American Standard Code for Information Interchange BCD Binary-coded decimal BE Big-endian COBOL Common Business Oriented Language CR Condition Register CTR Count Register DFP Decimal floating-point DP Double precision DRN The DFP Rounding Control field [DRN] of the 64-bit FPSCR register. DSCR Data Stream Control Register DSO Dynamic shared object DTV Dynamic thread vector DWARF Debug with arbitrary record format EA Effective address ELF Executable and Linking Format EOS End-of-string FPR Floating-Point Register FPSCR Floating-Point Status and Control Register GCC GNU Compiler Collection GEP Global entry point GOT Global offset table GPR General Purpose Register HTM Hardware trace monitor ID Identification IEC International Electrotechnical Commission IEEE Institute of Electrical and Electronics Engineers INF Infinity ISA Instruction Set Architecture ISO International Organization for Standardization KB Kilobyte LE Little-endian LEP Local entry point LR Link Register LSB Least-significant byte MB Megabyte MSB Most-significant byte MSR Machine State Register N/A Not applicable NaN Not-a-Number NOP No operation. A single-cycle operation that does not affect registers or generate bus activity. NOR In Boolean logic, the negation of a logical OR. OE The Floating-Point Overflow Exception Enable bit of the FPSCR register. PIC Position-independent code PIE Position-independent executable PIM Programming Interface Manual PLT Procedure linkage table PMR Performance Monitor Registers POSIX Portable Operating System Interface PS Positive sign RN The Binary Floating-Point Rounding Control field [of the FPSCR register. RPG Report Program Generator SHA Secure Hash Algorithm SIMD Single instruction, multiple data SP Stack pointer SPR Special Purpose Register SVID System V Interface Definition TCB Thread control block TLS Thread local storage TOC Table of contents TP Thread pointer UE The Floating-Point Underflow Exception Enable bit [of the FPSCR register. ULP Unit of least precision VDSO Virtual dynamic shared object VE The Floating-Point Invalid Operation Exception Enable bit of the FPSCR register. VMX Vector multimedia extension VSCR Vector Status and Control Register VSX Vector scalar extension XE The Floating-Point Inexact Exception Enable bit of the FPSCR register. XER Fixed-Point Exception Register XNOR Exclusive NOR XOR Exclusive OR ZE The Floating-Point Zero Divide Exception Enable bit of the FPSCR register.