Terms This standard uses technical terms as they are defined in the IEEE Std 1275-1994 Standard and other documents cited in “References”, plus the following terms: core, core specification, core document Refers to IEEE Std 1275-1994 Standard for Boot (Initialization, Configuration) Firmware, Core Practices and Requirements core errata Refers to Core Errata, IEEE P1275.7 effective address The 64- or 32-bit address computed by the processor when executing a Storage Access or Branch instruction, or when fetching the next sequential instruction. If address translation is disabled, the real address is the same as the effective address. If address translation is enabled, the real address is determined by, but not necessarily identical to, the effective address. linkage area An area within the stack that is reserved for saving certain registers across procedure calls in PA run-time models. This area is reserved by the caller and is allocated above the current stack pointer (%r1). Open Firmware (OF) The firmware architecture defined by and , or, when used as an adjective, a software component compliant with the core specification and errata. procedure descriptor A data structure used by some PA run-time models to represent a C “pointer to procedure”. The first word of this structure contains the actual address of the procedure. processor bus The bus that connects the CPU chip to the system. real address An address that the processor presents on the processor bus. real-mode The mode in which OF and its client are running with translation disabled; all addresses passed between the client and OF are real (i.e., hardware) addresses. segmented address translation The process whereby an Effective Address (EA) is translated into a Virtual Address (VA) and the virtual address is translated into a Real Address (RA). (see and Book III of for more detail.) suspend A form of Power Management characterized by a fast recovery to full operation. Typically, system memory will not be powered off while in the suspend state. Table of Contents (TOC) A data structure used by some PA run-time models that is used for access to global variables and for inter-module linkage. When a TOC is used, %r2 contains its base address. Virtual Address In IEEE 1275 parlance, the address that a program uses to access a memory location or memory-mapped device register. Depending on the presence or absence of memory mapping hardware in the system, and whether or not that mapping hardware is enabled, a virtual address may or may not be the same as the physical (real) address that appears on an external bus. The IEEE 1275 definition of “virtual address” corresponds to The PA's definition of “effective address.” Except as noted, this document uses the IEEE 1275 definition of virtual address. In PA parlance, an internal address within the PA address translation mechanism, used as in intermediate term in the translation of an effective address to the corresponding real address. virtual-mode The mode in which OF and its client share a single virtual address space, and address translation is enabled; all addresses passed between the client and OF are virtual (translated) addresses.