R1--1. Platform Implementation: Platforms must display firmware progress codes (4 hex digits) on the operator panel display. On 2x16 LCD displays, the progress codes are displayed left-justified on the first line. R1--2. Platform Implementation: Platforms must display firmware error codes (8 hex digits) on the system console (graphic or tty), and left-justified on the first line of a 2x16 LCD operator panel display (if available). R1--3. Platform Implementation: When a platform displays firmware error codes, associated location codes must be displayed on the following line on the system console (graphic or tty), and left-justified on the second line of a 2x16 LCD operator panel display (if available). The following describes in more detail the standard platform usage of operator panel LEDs or LCDs for the display of firmware progress and error codes. Progress codes: Progress codes from the system firmware and service processor firmware are 4 hex digits in the range from 0x8000 through 0xFFFF. Codes are displayed in the 4 character positions of a 1x4 LED, or left justified in the first line of a 2x16 LCD. Subsequent progress codes are displayed on top of (overlaying) the previous one. If the system “hangs”, the last displayed progress code is left on the display. Error codes: Error codes are 8 hex digits, as defined in . These codes are displayed by either boot ROM Power On Self Test (POST) or the service processor. If a critical error is detected which prevents a successful boot or results in system halt condition, the error code will be displayed left justified on the first line of a 2x16 LCD. The error code is left on the LCD until the system is reset or powered down. Error codes are not displayed on the operator panel of platforms with only a 4-digit LED. On all platforms, however, POST error codes are displayed on any system console (graphic or tty). For non-critical errors where the system can boot and operate normally or in a degraded mode, the associated error codes are not displayed, but are reported to the OS via the POST error log and the RTAS event-scan service. Location Codes: Location codes describe the physical location of the most probable failing part associated with an error code. When an error code is displayed on the first line of a 2x16 LCD, the location code, if known, is displayed left justified on the second line. The location code will remain on the LCD along with the error code until the system is reset or powered down. Location codes for POST errors are also displayed on any system console (graphic or tty), on the next line below the error code.

The error code is an 8-character (4-byte) hexadecimal code produced by firmware to identify the potential failing function or FRU in a system. It consists of 5 source code characters and 3 reason code characters. Individual characters within the error code have specific field definitions, as defined in the following tables. R1--1. Platform Implementation: To indicate the occurrence of a critical platform error, platforms must display (either on an operator panel or console) an 8-digit hex error code as defined in and . Source Code Reason Code Byte 0 Byte 1 Byte 2 Byte 3 S1 S2 S3 S4 S5 R1 R2 R3 Field Description S1 Maintenance Package Source that produced the SRN 0: Reserved 1: Reserved 2: POST, Firmware 3: BIST 4: Service processor, base system controller, etc. 5: Reserved (potentially for use by AIX Diagnostics) 8: Product-Specific Service Guide, MAPs 9: Reserved (potentially for use by the Problem Solving Guide) A-F: Reserved for future extension S2 Where applicable, use the lower nibble of the base class code for the IOA definition (see ). Only 00 to 0C are currently defined in Revision 2.1, therefore the high nibble is always zero. (There is a potential exposure that the high nibble will be defined in the future, but currently there are 13 base classes defined which include every device class, with 3 remaining characters for future extension by the PCI SIG. Therefore the exposure is in the far future.) For non-PCI devices, use base class 0 to extend the definition (see ). S3-S4 Where applicable, use the subclass code for IOA definition (see ). Also, extend the definition to include non-PCI devices where it is not fully utilized by PCI specification (see ). S5 Unique version of the device/FRU type for a particular product R1 Device/FRU unique failure reason codes. For POST: assigned by Firmware Developer. For AIX Diagnostics (S1 = 5, not currently supported): 1-7: Use in combination with R2,R3 for diagnostic test failure when maximum isolation was obtained. 8-9: Use in combination with R2,R3 for diagnostic test failure when maximum isolation was NOT obtained. A: Log analysis of POST error log B: Log analysis of machine check or checkstop error log C: Log analysis of AIX device driver error log D: diagnostic detected missing resource E-F: Reserved For others: assigned by respective developers. R2-R3 Device/FRU unique failure reason codes. For POST: assigned by Firmware Developer For others: assigned by respective developers. PCI Base Class (lower nibble)S2 PCI Sub-ClassS3-S4 Description 0 Devices that were built before the class code field was defined 00 All currently implemented IOAs except VGA-compatible IOAs. 01 VGA-compatible IOAs. 1 Mass storage controller. 00 SCSI bus controller. 01 IDE controller. 02 Floppy disk controller. 03 Intelligent Peripheral Interface (IPI) bus controller. 04 Redundant Array of Independent Disks (RAID) controller. 80 Other mass storage controller. 2 Network controller. 00 Ethernet controller. 01 Token Ring controller. 02 FDDI controller. 03 ATM controller. 80 Other Network controller. 3 Display controller. 00 VGA-Compatible controller. 01 Extended Graphics Array (XGA) controller. 80 Other display controller. 4 Multimedia device 00 Video device 01 Audio device 80 Other multimedia device 5 Memory controller. 00 RAM 01 Flash 80 Other memory controller. 6 Bridge IOAs. 00 Host bridge 01 Reserved 02 Reserved 03 Reserved 04 PCI-to-PCI bridge 05 Reserved 06 Reserved 07 Reserved 80 Other bridge device. 7 Simple communication controllers. 00 Serial controllers. 01 Parallel port. 80 Other communication controllers. 8 Generic system peripherals 00 PIC 01 DMA Controller. 02 System timer 03 Real-Time Clock (RTC) controller 80 Other system peripherals 9 Input devices 00 Keyboard controller 01 Digitizer (pen). 02 Mouse controller 80 Other input controllers. A Docking stations 00 Generic docking station 80 Other type of docking station B Processors 20 PA compliant (PowerPC and successors) 40 Co-processor C Serial bus controllers 03 Universal Serial Bus (USB) 04 Fibre Channel Base ClassS2 Sub-ClassS3-S4 Description 0 10 AC Power 11 DC Power 20 Temperature Related Problem 21 Fans 30-3x Cables 40-4x Terminators 50 Operator panels 60-6x Reserved 70-7x Reserved 90-9x Reserved A0 Boot firmware Heartbeat B0 O/S Heartbeat D0 Unknown device E0 Security 1 A0 SCSI Drives (generic) B0 IDE Drives C0 RAID Drives D0 SSA Drives E0 Tapes SCSI E1 Tapes IDE ED SCSI Changer EE Other SCSI Device EF Diskette drive F0 CDROM SCSI F1 CDROM IDE F2 Read/Write Optical SCSI F3 Read/Write Optical IDE F4-FF Reserved for other media devices 5 A0 L2 Cache Controller including integrated SRAM A1 L2 Cache SRAM A8 NVRAM A9 CMOS AA Quartz/EEPROM B0-Bx Memory cards Cyy Memory DIMMs (yy = memory PD bits) 7 A0 I2C bus 8 A0 Power Management Functions 9 A0-Ax Keyboards B0-Bx Mouse(s) C0-Cx Dials D0 Tablet D1-Dx Reserved for other input devices B A0 Service processor