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38974 lines 1.2 MiB Raw Normal View History Unescape Escape

 ``` ``` ``` ``` ``` ``` ``` ``` ``` Vector Intrinsic Reference ``` ``` ``` ```
``` ``` How to Use This Reference ``` ``` ``` ``` Brief description of the format of the entries, the cross-reference ``` ``` index, and so forth. ``` ``` ``` ```
``` ``` ``` ``` ``` ```
``` ``` Built-In Vector Functions ``` ``` ``` ``` ``` ``` vec_abs ``` ``` Vector Absolute Value ``` ``` ``` ``` r = vec_abs (a) ``` ``` ``` ``` ``` ``` Purpose: ``` ``` Returns a vector r that contains the ``` ``` absolute values of the contents of the given vector ``` ``` a. ``` ``` ``` ``` Result value: ``` ``` The value of each element of r is the ``` ``` absolute value of the corresponding element of ``` ``` a. For integer vectors, the arithmetic ``` ``` is modular. ``` ``` ``` ``` Endian considerations: ``` ``` None. ``` ``` ``` ``` ``` ``` ``` ``` vspltisw ``` ``` vec_abs ``` ``` ``` ``` ``` ``` vsububm ``` ``` vec_abs ``` ``` ``` ``` ``` ``` vmaxsb ``` ``` vec_abs ``` ``` ``` ``` ``` ``` vsubuwm ``` ``` vec_abs ``` ``` ``` ``` ``` ``` vmaxsw ``` ``` vec_abs ``` ``` ``` ``` ``` ``` vsubudm ``` ``` vec_abs ``` ``` ``` ``` ``` ``` vmaxsd ``` ``` vec_abs ``` ``` ``` ``` ``` ``` xvabssp ``` ``` vec_abs ``` ``` ``` ``` ``` ``` xvabsdp ``` ``` vec_abs ``` ``` ``` ``` ``` ``` ``` ``` Supported type signatures for vec_abs ``` ``` ``` ``` ``` ``` ``` ``` ``` ```
``` ``` ``` ``` ``` ``` ``` ``` r ``` ``` ``` ``` ``` ``` ``` ``` ``` ``` a ``` ``` ``` ``` ``` ``` ``` ``` ``` ``` Example Implementation ``` ``` ``` ``` ``` ``` ``` ``` ``` ``` ``` ``` ``` ``` ``` ``` vector signed char ``` ``` ``` ``` ``` ``` vector signed char ``` ``` ``` ``` ``` ``` ``` ``` vspltisw t,0 ``` ``` vsububm t,t,a ``` ``` vmaxsb r,t,a ``` ``` ``` ``` ``` ``` ``` ``` ``` ``` ``` ``` vector signed short ``` ``` ``` ``` ``` ``` vector signed short ``` ``` ``` ``` ``` ``` ``` ``` vspltisw t,0 ``` ``` vsubuhm t,t,a ``` ``` vmaxsh r,t,a ``` ``` ``` ``` ``` ``` ``` ``` ``` ``` ``` ``` vector signed int ``` ``` ``` ``` ``` ``` vector signed int ``` ``` ``` ``` ``` ``` ``` ``` vspltisw t,0 ``` ``` vsubuwm t,t,a ``` ``` vmaxsw r,t,a ``` ``` ``` ``` ``` ``` ``` ``` ``` ``` ``` ``` vector signed long long ``` ``` ``` ``` ``` ``` vector signed long long ``` ``` ``` ``` ``` ``` ``` ``` vspltisw t,0 ``` ``` vsubudm t,t,a ``` ``` vmaxsd r,t,a ``` ``` ``` ``` ``` ``` ``` ``` ``` ``` ``` ``` vector float ``` ``` ``` ``` ``` ``` vector float ``` ``` ``` ``` ``` ``` ``` ``` xvabssp r,a ``` ``` ``` ``` ``` ``` ``` ``` ``` ``` ``` ``` vector double ``` ``` ``` ``` ``` ``` vector double ``` ``` ``` ``` ``` ``` ``` ``` xvabsdp r,a ``` ``` ``` ``` ``` ``` ``` ``` ``` ``` ``` ``` ``` ``` ``` ``` ``` ``` ``` ``` ``` ``` ``` ``` vec_absd ``` ``` Vector Absolute Difference ``` ``` ``` ``` r = vec_absd (a, b) ``` ``` ``` ``` ``` ``` Purpose: ``` ``` Computes the absolute difference of two vectors. ``` ``` ``` ``` Result value: ``` ``` The value of each element of r is the ``` ``` absolute difference of the corresponding elements of a and b, using ``` ``` modulo arithmetic. ``` ``` ``` ``` Endian considerations: ``` ``` None. ``` ``` ``` ``` ``` ``` ``` ``` vabsdub ``` ``` vec_absd ``` ``` ``` ``` ``` ``` vabsduh ``` ``` vec_absd ``` ``` ``` ``` ``` ``` vabsduw ``` ``` vec_absd ``` ``` ``` ``` ``` ``` ``` ``` Supported type signatures for vec_absd ``` ``` ``` ``` ``` ``` ``` ``` ``` ``` ``` ``` ``` ``` ``` ``` ``` ``` ``` ``` ``` ``` r ``` ``` ``` ``` ``` ``` ``` ``` ``` ``` a ``` ``` ``` ``` ``` ``` ``` ``` ``` ``` b ``` ``` ``` ``` ``` ``` ``` ``` ``` ``` Example Implementation ``` ``` ``` ``` ``` ``` ``` ``` ``` ``` Restrictions ``` ``` ``` ``` ``` ``` ``` ``` ``` ``` ``` ``` ``` ``` ``` ``` vector unsigned char ``` ``` ``` ``` ``` ``` vector unsigned char ``` ``` ``` ``` ``` ``` vector unsigned char ``` ``` ``` ``` ``` ``` ``` ``` vabsdub r,a,b ``` ``` ``` ``` ``` ``` ``` ``` ISA 3.0 or later ``` ``` ``` ``` ``` ``` ``` ``` ``` ``` vector unsigned short ``` ``` ``` ``` ``` ``` vector unsigned short ``` ``` ``` ``` ``` ``` vector unsigned short ``` ``` ``` ``` ``` ``` ``` ``` vabsduh r,a,b ``` ``` ``` ``` ``` ``` ``` ``` ISA 3.0 or later ``` ``` ``` ``` ``` ``` ``` ``` ``` ``` vector unsigned int ``` ``` ``` ``` ``` ``` vector unsigned int ``` ``` ``` ``` ``` ``` vector unsigned int ``` ``` ``` ``` ``` ``` ``` ``` vabsduw r,a,b ``` ``` ``` ``` ``` ``` ``` ``` ISA 3.0 or later ``` ``` ``` ``` ``` ``` ``` ``` ``` ``` ``` ``` ``` ``` ``` ``` ``` ``` ``` ``` ``` ``` vec_abss ``` ``` Vector Absolute Value Saturated ``` ``` ``` ``` r = vec_abss (a) ``` ``` ``` ``` ``` ``` Purpose: ``` ``` Returns a vector r that contains the ``` ``` saturated absolute values of the contents of the given vector ``` ``` a. ``` ``` ``` ``` Result value: ``` ``` The value of each element of r is the ``` ``` saturated absolute value of the corresponding element of ``` ``` a. ``` ``` ``` ``` Endian considerations: ``` ``` None. ``` ``` ``` ``` ``` ``` ``` ``` vspltisb ``` ``` vec_abss ``` ``` ``` ``` ``` ``` vsubsbs ``` ``` vec_abss ``` ``` ``` ``` ``` ``` vmaxsb ``` ``` vec_abss ``` ``` ``` ``` ``` ``` vspltish ``` ``` vec_abss ``` ``` ``` ``` ``` ``` vsubshs ``` ``` vec_abss ``` ``` ``` ``` ``` ``` vmaxsh ``` ``` vec_abss ``` ``` ``` ``` ``` ``` vspltisw ``` ``` vec_abss ``` ``` ``` ``` ``` ``` vsubsws ``` ``` vec_abss ``` ``` ``` ``` ``` ``` vmaxsw ``` ``` vec_abss ``` ``` ``` ``` ``` ``` ``` ``` ``` ``` Supported type signatures for vec_abss ``` ``` ``` ``` ``` ``` ``` ``` ``` ``` ``` ``` ``` ``` ``` ``` ``` ``` r ``` ``` ``` ``` ``` ``` ``` ``` ``` ``` a ``` ``` ``` ``` ``` ``` ``` ``` ``` ``` Example Implementation ``` ``` ``` ``` ``` ``` ``` ``` ``` ``` ``` ``` ``` ``` ``` ``` vector signed char ``` ``` ``` ``` ``` ``` vector signed char ``` ``` ``` ``` ``` ``` ``` ``` vspltisb t,0 ``` ``` vsubsbs t,t,a ``` ``` vmaxsb r,t,a ``` ``` ``` ``` ``` ``` ``` ``` ``` ``` ``` ``` vector signed short ``` ``` ``` ``` ``` ``` vector signed short ``` ``` ``` ``` ``` ``` ``` ``` vspltish t,0 ``` ``` vsubshs t,t,a ``` ``` vmaxsh r,t,a ``` ``` ``` ``` ``` ``` ``` ``` ``` ``` ``` ``` vector signed int ``` ``` ``` ``` ``` ``` vector signed int ``` ``` ``` ``` ``` ``` ``` ``` vspltisw t,0 ``` ``` vsubsws t,t,a ``` ``` vmaxsw r,t,a ``` ``` ``` ``` ``` ``` ``` ``` ``` ``` ``` ``` ``` ``` ``` ``` ``` ``` ``` ``` ``` ``` ``` ``` vec_add ``` ``` Vector Addition ``` ``` ``` ``` r = vec_add (a, b) ``` ``` ``` ``` ``` ``` Purpose: ``` ``` Computes the sum of two vectors. ``` ``` ``` ``` Result value: ``` ``` The value of each element of r is the ``` ``` sum of the corresponding elements of a and b. Modular ``` ``` arithmetic is used for both signed and unsigned integers. ``` ``` ``` ``` Endian considerations: ``` ``` None. ``` ``` ``` ``` ``` ``` ``` ``` vaddubm ``` ``` vec_add ``` ``` ``` ``` ``` ``` vadduhm ``` ``` vec_add ``` ``` ``` ``` ``` ``` vadduwm ``` ``` vec_add ``` ``` ``` ``` ``` ``` vaddudm ``` ``` vec_add ``` ``` ``` ``` ``` ``` vadduqm ``` ``` vec_add ``` ``` ``` ``` ``` ``` xvaddsp ``` ``` vec_add ``` ``` ``` ``` ``` ``` xvadddp ``` ``` vec_add ``` ``` ``` ``` ``` ``` ``` ``` Supported type signatures for vec_add ``` ``` ``` ``` ``` ``` ``` ``` ``` ``` ``` ``` ``` ``` ``` ``` ``` ``` ``` ``` r ``` ``` ``` ``` ``` ``` ``` ``` ``` ``` a ``` ``` ``` ``` ``` ``` ``` ``` ``` ``` b ``` ``` ``` ``` ``` ``` ``` ``` ``` ``` Example Implementation ``` ``` ``` ``` ``` ``` ``` ``` ``` ``` ``` ``` ``` ``` ``` ``` vector signed char ``` ``` ``` ``` ``` ``` vector signed char ``` ``` ``` ``` ``` ``` vector signed char ``` ``` ``` ``` ``` ``` ``` ``` vaddubm r,a,b ``` ``` ``` ``` ``` ``` ``` ``` ``` ``` ``` ``` vector unsigned char ``` ``` ``` ``` ``` ``` vector unsigned char ``` ``` ``` ``` ``` ``` vector unsigned char ``` ``` ``` ``` ``` ``` ``` ``` vaddubm r,a,b ``` ``` ``` ``` ``` ``` ``` ``` ``` ``` ``` ``` vector signed short ``` ``` ``` ``` ``` ``` vector signed short ``` ``` ``` ``` ``` ``` vector signed short ``` ``` ``` ``` ``` ``` ``` ``` vadduhm r,a,b ``` ``` ``` ``` ``` ``` ``` ``` ``` ``` ``` ``` vector unsigned short ``` ``` ``` ``` ``` ``` vector unsigned short ``` ``` ``` ``` ``` ``` vector unsigned short ``` ``` ``` ``` ``` ``` ``` ``` vadduhm r,a,b ``` ``` ``` ``` ``` ``` ``` ``` ``` ``` ``` ``` vector signed int ``` ``` ``` ``` ``` ``` vector signed int ``` ``` ``` ``` ``` ``` vector signed int ``` ``` ``` ``` ``` ``` ``` ``` vadduwm r,a,b ``` ``` ``` ``` ``` ``` ``` ``` ``` ``` ``` ``` vector unsigned int ``` ``` ``` ``` ``` ``` vector unsigned int ``` ``` ``` ``` ``` ``` vector unsigned int ``` ``` ``` ``` ``` ``` ``` ``` vadduwm r,a,b ``` ``` ``` ``` ``` ``` ``` ``` ``` ``` ``` ``` vector signed long long ``` ``` ``` ``` ``` ``` vector signed long long ``` ``` ``` ``` ``` ``` vector signed long long ``` ``` ``` ``` ``` ``` ``` ``` vaddudm r,a,b ``` ``` ``` ``` ``` ``` ``` ``` ``` ``` ``` ``` vector unsigned long long ``` ``` ``` ``` ``` ``` vector unsigned long long ``` ``` ``` ``` ``` ``` vector unsigned long long ``` ``` ``` ``` ``` ``` ``` ``` vaddudm r,a,b ``` ``` ``` ``` ``` ``` ``` ``` ``` ``` ``` ``` vector signed __int128 ``` ``` ``` ``` ``` ``` vector signed __int128 ``` ``` ``` ``` ``` ``` vector signed __int128 ``` ``` ``` ``` ``` ``` ``` ``` vadduqm r,a,b ``` ``` ``` ``` ``` ``` ``` ``` ``` ``` ``` ``` vector unsigned __int128 ``` ``` ``` ``` ``` ``` vector unsigned __int128 ``` ``` ``` ``` ``` ``` vector unsigned __int128 ``` ``` ``` ``` ``` ``` ``` ``` vadduqm r,a,b ``` ``` ``` ``` ``` ``` ``` ``` ``` ``` ``` ``` vector float ``` ``` ``` ``` ``` ``` vector float ``` ``` ``` ``` ``` ``` vector float ``` ``` ``` ``` ``` ``` ``` ``` xvaddsp r,a,b ``` ``` ``` ``` ``` ``` ``` ``` ``` ``` ``` ``` vector double ``` ``` ``` ``` ``` ``` vector double ``` ``` ``` ``` ``` ``` vector double ``` ``` ``` ``` ``` ``` ``` ``` xvadddp r,a,b ``` ``` ``` ``` ``` ``` ``` ``` ``` ``` ``` ``` ``` ``` ``` ``` ``` ``` ``` ``` ``` ``` ``` ``` vec_addc ``` ``` Vector Add Carrying ``` ``` ``` ``` r = vec_addc (a, b) ``` ``` ``` ``` ``` ``` Purpose: ``` ``` Returns a vector of carry bits produced by adding two vectors. ``` ``` ``` ``` Result value: ``` ``` The value of each element of r is the ``` ``` carry produced by adding the corresponding elements of a and b (1 ``` ``` if there is a carry, 0 otherwise). ``` ``` ``` ``` Endian considerations: ``` ``` None. ``` ``` ``` ``` ``` ``` ``` ``` vaddcuw ``` ``` vec_addc ``` ``` ``` ``` ``` ``` vaddcuq ``` ``` vec_addc ``` ``` ``` ``` ``` ``` ``` ``` Supported type signatures for vec_addc ``` ``` ``` ``` ``` ``` ``` ``` ``` ``` ``` ``` ``` ``` ``` ``` ``` ``` ``` ``` r ``` ``` ``` ``` ``` ``` ``` ``` ``` ``` a ``` ``` ``` ``` ``` ``` ``` ``` ``` ``` b ``` ``` ``` ``` ``` ``` ``` ``` ``` ``` Example Implementation ``` ``` ``` ``` ``` ``` ``` ``` ``` ``` ``` ``` ``` ``` ``` ``` vector signed int ``` ``` ``` ``` ``` ``` vector signed int ``` ``` ``` ``` ``` ``` vector signed int ``` ``` ``` ``` ``` ``` ``` ``` vaddcuw r,a,b ``` ``` ``` ``` ``` ``` ``` ``` ``` ``` ``` ``` vector unsigned int ``` ``` ``` ``` ``` ``` vector unsigned int ``` ``` ``` ``` ``` ``` vector unsigned int ``` ``` ``` ``` ``` ``` ``` ``` vaddcuw r,a,b ``` ``` ``` ``` ``` ``` ``` ``` ``` ``` ``` ``` vector signed __int128 ``` ``` ``` ``` ``` ``` vector signed __int128 ``` ``` ``` ``` ``` ``` vector signed __int128 ``` ``` ``` ``` ``` ``` ``` ``` vaddcuq r,a,b ``` ``` ``` ``` ``` ``` ``` ``` ``` ``` ``` ``` vector unsigned __int128 ``` ``` ``` ``` ``` ``` vector unsigned __int128 ``` ``` ``` ``` ``` ``` vector unsigned __int128 ``` ``` ``` ``` ``` ``` ``` ``` vaddcuq r,a,b ``` ``` ``` ``` ``` ``` ``` ``` ``` ``` ``` ``` ``` ``` ``` ``` ``` ``` ``` ``` ``` ``` ``` ``` vec_adde ``` ``` Vector Add Extended ``` ``` ``` ``` r = vec_adde (a, b, c) ``` ``` ``` ``` ``` ``` Purpose: ``` ``` Returns a vector formed as the sum of two vectors and a carry vector. ``` ``` ``` ``` Result value: ``` ``` The value of each element of r is ``` ``` produced by adding the corresponding elements of a and b with ``` ``` a carry specified in the corresponding element of c (1 if there is a carry, 0 otherwise). ``` ``` ``` ``` Endian considerations: ``` ``` None. ``` ``` ``` ``` ``` ``` ``` ``` vspltisw ``` ``` vec_adde ``` ``` ``` ``` ``` ``` vadduwm ``` ``` vec_adde ``` ``` ``` ``` ``` ``` xxland ``` ``` vec_adde ``` ``` ``` ``` ``` ``` vaddeuqm ``` ``` vec_adde ``` ``` ``` ``` ``` ``` ``` ``` Supported type signatures for vec_adde ``` ``` ``` ``` ``` ``` ``` ``` ``` ``` ``` ``` ``` ``` ``` ``` ``` ``` ``` ``` ``` ``` r ``` ``` ``` ``` ``` ``` ``` ``` ``` ``` a ``` ``` ``` ``` ``` ``` ``` ``` ``` ``` b ``` ``` ``` ``` ``` ``` ``` ``` ``` ``` c ``` ``` ``` ``` ``` ``` ``` ``` ``` ``` Example Implementation ``` ``` ``` ``` ``` ``` ``` ``` ``` ``` ``` ``` ``` ``` ``` ``` vector signed int ``` ``` ``` ``` ``` ``` vector signed int ``` ``` ``` ``` ``` ``` vector signed int ``` ``` ``` ``` ``` ``` vector signed int ``` ``` ``` ``` ``` ``` ``` ``` vspltisw t,1 ``` ``` vadduwm r,a,b ``` ``` xxland c,c,t ``` ``` vadduwm r,r,c ``` ``` ``` ``` ``` ``` ``` ``` ``` ``` ``` ``` vector unsigned int ``` ``` ``` ``` ``` ``` vector unsigned int ``` ``` ``` ``` ``` ``` vector unsigned int ``` ``` ``` ``` ``` ``` vector unsigned int ``` ``` ``` ``` ``` ``` ``` ``` vspltisw t,1 ``` ``` vadduwm r,a,b ``` ``` xxland c,c,t ``` ``` vadduwm r,r,c ``` ``` ``` ``` ``` ``` ``` ``` ``` ``` ``` ``` vector signed __int128 ``` ``` ``` ``` ``` ``` vector signed __int128 ``` ``` ``` ``` ``` ``` vector signed __int128 ``` ``` ``` ``` ``` ``` vector signed __int128 ``` ``` ``` ``` ``` ``` ``` ``` vaddeuqm r,a,b,c ``` ``` ``` ``` ``` ``` ``` ``` ``` ``` ``` ``` vector unsigned __int128 ``` ``` ``` ``` ``` ``` vector unsigned __int128 ``` ``` ``` ``` ``` ``` vector unsigned __int128 ``` ``` ``` ``` ``` ``` vector unsigned __int128 ``` ``` ``` ``` ``` ``` ``` ``` vaddeuqm r,a,b,c ``` ``` ``` ``` ``` ``` ``` ``` ``` ``` ``` ``` ``` ``` ``` ``` ``` ``` ``` ``` ``` ``` ``` ``` vec_addec ``` ``` Vector Add Extended Carrying ``` ``` ``` ``` r = vec_addec (a, b, c) ``` ``` ``` ``` ``` ``` Purpose: ``` ``` Returns a vector of carry bits produced by adding two vectors and ``` ``` a carry vector. ``` ``` ``` ``` Result value: ``` ``` The value of each element of r is ``` ``` the carry produced by adding the corresponding elements of a and b and ``` ``` a carry specified in the corresponding element of c (1 if there is a carry, 0 otherwise). ``` ``` ``` ``` Endian considerations: ``` ``` None. ``` ``` ``` ``` ``` ``` ``` ``` vspltisw ``` ``` vec_addec ``` ``` ``` ``` ``` ``` xxland ``` ``` vec_addec ``` ``` ``` ``` ``` ``` vadduwm ``` ``` vec_addec ``` ``` ``` ``` ``` ``` vaddcuw ``` ``` vec_addec ``` ``` ``` ``` ``` ``` xxlor ``` ``` vec_addec ``` ``` ``` ``` ``` ``` vaddecuq ``` ``` vec_addec ``` ``` ``` ``` ``` ``` ``` ``` Supported type signatures for vec_addec ``` ``` ``` ``` ``` ``` ``` ``` ``` ``` ``` ``` ``` ``` ``` ``` ``` ``` ``` ``` ``` ``` r ``` ``` ``` ``` ``` ``` ``` ``` ``` ``` a ``` ``` ``` ``` ``` ``` ``` ``` ``` ``` b ``` ``` ``` ``` ``` ``` ``` ``` ``` ``` c ``` ``` ``` ``` ``` ``` ``` ``` ``` ``` Example Implementation ``` ``` ``` ``` ``` ``` ``` ``` ``` ``` ``` ``` ``` ``` ``` ``` vector signed int ``` ``` ``` ``` ``` ``` vector signed int ``` ``` ``` ``` ``` ``` vector signed int ```