diff --git a/Intrinsics_Reference/ch_intro.xml b/Intrinsics_Reference/ch_intro.xml
index 7f7da4e..e173b04 100644
--- a/Intrinsics_Reference/ch_intro.xml
+++ b/Intrinsics_Reference/ch_intro.xml
@@ -381,7 +381,7 @@ xmlns:xlink="http://www.w3.org/1999/xlink" xml:id="section_intro">
AIX, POWER7, POWER8, POWER9, and Power10 are trademarks or
registered trademarks of International Business Machines
Corporation. Linux is a registered trademark of Linus
- Torvalds. Intel is s registered trademark of Intel Corporation
+ Torvalds. Intel is a registered trademark of Intel Corporation
or its subsidiaries. AltiVec is a trademark of Freescale
Semiconductor, Inc.
diff --git a/Intrinsics_Reference/ch_techniques.xml b/Intrinsics_Reference/ch_techniques.xml
index b636b3d..b433a41 100644
--- a/Intrinsics_Reference/ch_techniques.xml
+++ b/Intrinsics_Reference/ch_techniques.xml
@@ -254,9 +254,9 @@ xmlns:xlink="http://www.w3.org/1999/xlink" xml:id="section_techniques">
Access to the portability APIs occurs automatically when
including one of the corresponding Intel header files, such as
<mmintrin.h>
. You must also compile with
- -DNO_WARN_X86_INTRINSICS
to opt into using the
- headers.
+ revisionflag="added">To enable the portability headers, you
+ must compile with
+ -DNO_WARN_X86_INTRINSICS
.
diff --git a/Intrinsics_Reference/ch_vec_reference.xml b/Intrinsics_Reference/ch_vec_reference.xml
index e75ee44..8b941c3 100644
--- a/Intrinsics_Reference/ch_vec_reference.xml
+++ b/Intrinsics_Reference/ch_vec_reference.xml
@@ -10255,7 +10255,7 @@ xmlns:xlink="http://www.w3.org/1999/xlink" xml:id="VIPR.vec-ref">
None.
Review status:
- Not yet reviewed.
+ Reviewed by Will Schmidt.
@@ -19618,7 +19618,7 @@ xmlns:xlink="http://www.w3.org/1999/xlink" xml:id="VIPR.vec-ref">
not address an element boundary.
Review status:
- Not yet reviewed.
+ Reviewed by Will Schmidt.
@@ -41617,11 +41617,11 @@ xmlns:xlink="http://www.w3.org/1999/xlink" xml:id="VIPR.vec-ref">
a and b, with a on the left. Let v' be v
+ role="bold">w be v
shifted left by the number of bits specified by c. Then r is set to the leftmost 128 bits of
- v'.
+ w.
Endian considerations:
The semantics of this built-in function differ for big-endian
@@ -41632,7 +41632,7 @@ xmlns:xlink="http://www.w3.org/1999/xlink" xml:id="VIPR.vec-ref">
0 and 7, inclusive.
Review status:
- Not yet reviewed.
+ Reviewed by Will Schmidt.
@@ -43843,7 +43843,7 @@ xmlns:xlink="http://www.w3.org/1999/xlink" xml:id="VIPR.vec-ref">
None.
Review status:
- Not yet reviewed.
+ Reviewed by Will Schmidt.
@@ -43952,7 +43952,7 @@ xmlns:xlink="http://www.w3.org/1999/xlink" xml:id="VIPR.vec-ref">
targets, and right-to-left for little-endian targets.
Review status:
- Not yet reviewed.
+ Reviewed by Will Schmidt.
@@ -45129,11 +45129,11 @@ xmlns:xlink="http://www.w3.org/1999/xlink" xml:id="VIPR.vec-ref">
a and b, with a on the left. Let v' be v
+ role="bold">w be v
shifted right by the number of bits specified by c. Then r is set to the rightmost 128 bits of
- v'.
+ w.
Endian considerations:
The semantics of this built-in function differ for big-endian
@@ -45144,7 +45144,7 @@ xmlns:xlink="http://www.w3.org/1999/xlink" xml:id="VIPR.vec-ref">
0 and 7, inclusive.
Review status:
- Not yet reviewed.
+ Reviewed by Will Schmidt.