From 3d79fb03c1ce3635446c6e38ce2b38c3ca51cbea Mon Sep 17 00:00:00 2001 From: "Paul A. Clarke" Date: Thu, 30 Apr 2020 11:13:45 -0500 Subject: [PATCH] Add examples to vec_vslv and vec_vsrv vec_vslv and vec_vsrv are confusing in their own right and even more so because they operate only with big-endian semantics. Some examples are warranted. Note that the respective examples are arranged such that the impact of shifting in zero bits has a visible impact. Signed-off-by: Paul A. Clarke --- Intrinsics_Reference/ch_vec_reference.xml | 373 +++++++++++++++++++++- 1 file changed, 371 insertions(+), 2 deletions(-) diff --git a/Intrinsics_Reference/ch_vec_reference.xml b/Intrinsics_Reference/ch_vec_reference.xml index 4db517b..a02f004 100644 --- a/Intrinsics_Reference/ch_vec_reference.xml +++ b/Intrinsics_Reference/ch_vec_reference.xml @@ -29410,12 +29410,197 @@ xmlns:xlink="http://www.w3.org/1999/xlink" xml:id="VIPR.vec-ref"> Then each byte element i of r is determined as follows. The start bit sb is obtained from bits 5:7 of byte element - i of a. Then + i of b. Then the contents of bits sb:sb+7 of the halfword in byte elements i:i+1 of v are placed into byte element i of r. + An example follows: + + + + + + + + + + + + + + + + + + + + + + + a + + + 0F + + + 0F + + + 0F + + + 0F + + + 0F + + + 0F + + + 0F + + + 0F + + + 0F + + + 0F + + + 0F + + + 0F + + + 0F + + + 0F + + + 0F + + + 0F + + + + + b + + + 00 + + + 01 + + + 02 + + + 03 + + + 04 + + + 05 + + + 06 + + + 07 + + + 08 + + + 09 + + + 0A + + + 0B + + + 0C + + + 0D + + + 0E + + + 0F + + + + + r + + + 0F + + + 1E + + + 3C + + + 78 + + + F0 + + + E1 + + + C3 + + + 87 + + + 0F + + + 1E + + + 3C + + + 78 + + + F0 + + + E1 + + + C3 + + + 80 + + + + + + + Endian considerations: All bit and byte element numbers are specified in big-endian order. This intrinsic is not endian-neutral. @@ -31644,11 +31829,195 @@ xmlns:xlink="http://www.w3.org/1999/xlink" xml:id="VIPR.vec-ref"> r is determined as follows. The start bit sb is obtained from bits 5:7 of byte element i of a. Then the contents of bits + role="bold">b. Then the contents of bits (8 – sb):(15 – sb) of the halfword in byte elements i:i+1 of v are placed into byte element i of r. + An example follows: + + + + + + + + + + + + + + + + + + + + + + + a + + + 0F + + + 0F + + + 0F + + + 0F + + + 0F + + + 0F + + + 0F + + + 0F + + + 0F + + + 0F + + + 0F + + + 0F + + + 0F + + + 0F + + + 0F + + + 0F + + + + + b + + + 0F + + + 0E + + + 0D + + + 0C + + + 0B + + + 0A + + + 09 + + + 08 + + + 07 + + + 06 + + + 05 + + + 04 + + + 03 + + + 02 + + + 01 + + + 00 + + + + + r + + + 00 + + + 3C + + + 78 + + + F0 + + + E1 + + + C3 + + + 87 + + + 0F + + + 1E + + + 3C + + + 78 + + + F0 + + + E1 + + + C3 + + + 87 + + + 0F + + + + + + Endian considerations: All bit and byte element numbers are specified in big-endian order. This intrinsic is not endian-neutral.