From 5ab9ef6ccef78e0bb95ae8149f6618bd06ae566e Mon Sep 17 00:00:00 2001 From: "Paul A. Clarke" Date: Fri, 1 May 2020 23:01:26 -0500 Subject: [PATCH] s/insruction/instruction/g Signed-off-by: Paul A. Clarke --- Intrinsics_Reference/ch_vec_reference.xml | 14 +++++++------- 1 file changed, 7 insertions(+), 7 deletions(-) diff --git a/Intrinsics_Reference/ch_vec_reference.xml b/Intrinsics_Reference/ch_vec_reference.xml index cb48091..5868dce 100644 --- a/Intrinsics_Reference/ch_vec_reference.xml +++ b/Intrinsics_Reference/ch_vec_reference.xml @@ -8172,7 +8172,7 @@ xmlns:xlink="http://www.w3.org/1999/xlink" xml:id="VIPR.vec-ref"> Endian considerations: All element and bit numberings of the AES cipher operation use big-endian (i.e., left-to-right) order, reflecting the underlying - hardware insruction. Unlike most of the vector intrinsics in this + hardware instruction. Unlike most of the vector intrinsics in this chapter, vec_cipher_be does not follow the bi-endian programming model. @@ -8257,7 +8257,7 @@ xmlns:xlink="http://www.w3.org/1999/xlink" xml:id="VIPR.vec-ref"> Endian considerations: All element and bit numberings of the AES cipher-last operation use big-endian (i.e., left-to-right) order, reflecting the underlying - hardware insruction. Unlike most of the vector intrinsics in this + hardware instruction. Unlike most of the vector intrinsics in this chapter, vec_cipherlast_be does not follow the bi-endian programming model. @@ -21529,7 +21529,7 @@ xmlns:xlink="http://www.w3.org/1999/xlink" xml:id="VIPR.vec-ref"> Endian considerations: All element and bit numberings of the AES inverse cipher operation use big-endian (i.e., left-to-right) order, reflecting the underlying - hardware insruction. Unlike most of the vector intrinsics in this + hardware instruction. Unlike most of the vector intrinsics in this chapter, vec_ncipher_be does not follow the bi-endian programming model. @@ -21614,7 +21614,7 @@ xmlns:xlink="http://www.w3.org/1999/xlink" xml:id="VIPR.vec-ref"> Endian considerations: All element and bit numberings of the AES inverse cipher-last operation use big-endian (i.e., left-to-right) order, reflecting the underlying - hardware insruction. Unlike most of the vector intrinsics in this + hardware instruction. Unlike most of the vector intrinsics in this chapter, vec_ncipherlast_be does not follow the bi-endian programming model. @@ -25331,7 +25331,7 @@ xmlns:xlink="http://www.w3.org/1999/xlink" xml:id="VIPR.vec-ref"> Endian considerations: All element numberings in the above description denote big-endian (i.e., left-to-right) order, reflecting the underlying hardware - insruction. Unlike most of the vector intrinsics in this chapter, + instruction. Unlike most of the vector intrinsics in this chapter, vec_pmsum_be does not follow the bi-endian programming model. @@ -27458,7 +27458,7 @@ xmlns:xlink="http://www.w3.org/1999/xlink" xml:id="VIPR.vec-ref"> Endian considerations: All element numberings of the SubBytes operation use big-endian (i.e., left-to-right) order, reflecting the underlying - hardware insruction. Unlike most of the vector intrinsics in this + hardware instruction. Unlike most of the vector intrinsics in this chapter, vec_sbox_be does not follow the bi-endian programming model. @@ -28214,7 +28214,7 @@ xmlns:xlink="http://www.w3.org/1999/xlink" xml:id="VIPR.vec-ref"> Endian considerations: All element numberings in the above description denote big-endian (i.e., left-to-right) order, reflecting the underlying hardware - insruction. Unlike most of the vector intrinsics in this chapter, + instruction. Unlike most of the vector intrinsics in this chapter, vec_pmsum_be does not follow the bi-endian programming model.