diff --git a/Intrinsics_Reference/ch_vec_reference.xml b/Intrinsics_Reference/ch_vec_reference.xml
index 082cfb6..05f537a 100644
--- a/Intrinsics_Reference/ch_vec_reference.xml
+++ b/Intrinsics_Reference/ch_vec_reference.xml
@@ -9003,6 +9003,10 @@ xmlns:xlink="http://www.w3.org/1999/xlink" xml:id="VIPR.vec-ref">
Endian considerations:
None.
+
+ Review status:
+ Not yet reviewed.
+
vcmpequb
@@ -9020,6 +9024,10 @@ xmlns:xlink="http://www.w3.org/1999/xlink" xml:id="VIPR.vec-ref">
vcmpequd
vec_cmpeq
+
+ vcmpequq
+ vec_cmpeq
+
xvcmpeqsp
vec_cmpeq
@@ -9031,33 +9039,39 @@ xmlns:xlink="http://www.w3.org/1999/xlink" xml:id="VIPR.vec-ref">
Supported type signatures for vec_cmpeq
-
+
+
-
+
r
-
+
a
-
+
b
-
+
Example Implementation
+
+
+ Restrictions
+
+
@@ -9076,6 +9090,10 @@ xmlns:xlink="http://www.w3.org/1999/xlink" xml:id="VIPR.vec-ref">
vcmpequb r,a,b
+
+
+
+
@@ -9092,6 +9110,10 @@ xmlns:xlink="http://www.w3.org/1999/xlink" xml:id="VIPR.vec-ref">
vcmpequb r,a,b
+
+
+
+
@@ -9108,6 +9130,10 @@ xmlns:xlink="http://www.w3.org/1999/xlink" xml:id="VIPR.vec-ref">
vcmpequb r,a,b
+
+
+
+
@@ -9124,6 +9150,10 @@ xmlns:xlink="http://www.w3.org/1999/xlink" xml:id="VIPR.vec-ref">
vcmpequh r,a,b
+
+
+
+
@@ -9140,6 +9170,10 @@ xmlns:xlink="http://www.w3.org/1999/xlink" xml:id="VIPR.vec-ref">
vcmpequh r,a,b
+
+
+
+
@@ -9156,6 +9190,10 @@ xmlns:xlink="http://www.w3.org/1999/xlink" xml:id="VIPR.vec-ref">
vcmpequh r,a,b
+
+
+
+
@@ -9172,6 +9210,10 @@ xmlns:xlink="http://www.w3.org/1999/xlink" xml:id="VIPR.vec-ref">
vcmpequw r,a,b
+
+
+
+
@@ -9188,6 +9230,10 @@ xmlns:xlink="http://www.w3.org/1999/xlink" xml:id="VIPR.vec-ref">
vcmpequw r,a,b
+
+
+
+
@@ -9204,6 +9250,10 @@ xmlns:xlink="http://www.w3.org/1999/xlink" xml:id="VIPR.vec-ref">
vcmpequw r,a,b
+
+
+
+
@@ -9220,6 +9270,10 @@ xmlns:xlink="http://www.w3.org/1999/xlink" xml:id="VIPR.vec-ref">
vcmpequd r,a,b
+
+
+
+
@@ -9236,6 +9290,10 @@ xmlns:xlink="http://www.w3.org/1999/xlink" xml:id="VIPR.vec-ref">
vcmpequd r,a,b
+
+
+
+
@@ -9252,6 +9310,73 @@ xmlns:xlink="http://www.w3.org/1999/xlink" xml:id="VIPR.vec-ref">
vcmpequd r,a,b
+
+
+
+
+
+
+
+ vector bool __int128
+
+
+ vector bool __int128
+
+
+ vector bool __int128
+
+
+
+ vcmpequq r,a,b
+
+
+
+
+ ISA 3.1 or later
+
+
+
+
+
+ vector bool __int128
+
+
+ vector signed __int128
+
+
+ vector signed __int128
+
+
+
+ vcmpequq r,a,b
+
+
+
+
+ ISA 3.1 or later
+
+
+
+
+
+ vector bool __int128
+
+
+ vector unsigned __int128
+
+
+ vector unsigned __int128
+
+
+
+ vcmpequq r,a,b
+
+
+
+
+ ISA 3.1 or later
+
+
@@ -9268,6 +9393,10 @@ xmlns:xlink="http://www.w3.org/1999/xlink" xml:id="VIPR.vec-ref">
xvcmpeqsp r,a,b
+
+
+
+
@@ -9284,6 +9413,10 @@ xmlns:xlink="http://www.w3.org/1999/xlink" xml:id="VIPR.vec-ref">
xvcmpeqdp r,a,b
+
+
+
+
@@ -9314,6 +9447,10 @@ xmlns:xlink="http://www.w3.org/1999/xlink" xml:id="VIPR.vec-ref">
Endian considerations:
None.
+
+ Review status:
+ Not yet reviewed.
+
vcmpgtsb
@@ -9351,6 +9488,14 @@ xmlns:xlink="http://www.w3.org/1999/xlink" xml:id="VIPR.vec-ref">
vcmpgtud
vec_cmpge
+
+ vcmpgtsq
+ vec_cmpge
+
+
+ vcmpgtuq
+ vec_cmpge
+
xvcmpgesp
vec_cmpge
@@ -9362,33 +9507,39 @@ xmlns:xlink="http://www.w3.org/1999/xlink" xml:id="VIPR.vec-ref">
Supported type signatures for vec_cmpge
-
+
+
-
+
r
-
+
a
-
+
b
-
+
Example Implementation
+
+
+ Restrictions
+
+
@@ -9402,12 +9553,16 @@ xmlns:xlink="http://www.w3.org/1999/xlink" xml:id="VIPR.vec-ref">
vector signed char
-
+
vcmpgtsb t,b,a
xxlnor r,t,t
+
+
+
+
@@ -9419,12 +9574,16 @@ xmlns:xlink="http://www.w3.org/1999/xlink" xml:id="VIPR.vec-ref">
vector unsigned char
-
+
vcmpgtub t,b,a
xxlnor r,t,t
+
+
+
+
@@ -9436,12 +9595,16 @@ xmlns:xlink="http://www.w3.org/1999/xlink" xml:id="VIPR.vec-ref">
vector signed short
-
+
vcmpgtsh t,b,a
xxlnor r,t,t
+
+
+
+
@@ -9453,12 +9616,16 @@ xmlns:xlink="http://www.w3.org/1999/xlink" xml:id="VIPR.vec-ref">
vector unsigned short
-
+
vcmpgtuh t,b,a
xxlnor r,t,t
+
+
+
+
@@ -9470,12 +9637,16 @@ xmlns:xlink="http://www.w3.org/1999/xlink" xml:id="VIPR.vec-ref">
vector signed int
-
+
vcmpgtsw t,b,a
xxlnor r,t,t
+
+
+
+
@@ -9487,12 +9658,16 @@ xmlns:xlink="http://www.w3.org/1999/xlink" xml:id="VIPR.vec-ref">
vector unsigned int
-
+
vcmpgtuw t,b,a
xxlnor r,t,t
+
+
+
+
@@ -9504,12 +9679,16 @@ xmlns:xlink="http://www.w3.org/1999/xlink" xml:id="VIPR.vec-ref">
vector signed long long
-
+
vcmpgtsd t,b,a
xxlnor r,t,t
+
+
+
+
@@ -9521,12 +9700,60 @@ xmlns:xlink="http://www.w3.org/1999/xlink" xml:id="VIPR.vec-ref">
vector unsigned long long
-
+
vcmpgtud t,b,a
xxlnor r,t,t
+
+
+
+
+
+
+
+ vector bool __int128
+
+
+ vector signed __int128
+
+
+ vector signed __int128
+
+
+
+ vcmpgtsq t,b,a
+ xxlnor r,t,t
+
+
+
+
+ ISA 3.1 or later
+
+
+
+
+
+ vector bool __int128
+
+
+ vector unsigned __int128
+
+
+ vector unsigned __int128
+
+
+
+ vcmpgtuq t,b,a
+ xxlnor r,t,t
+
+
+
+
+ ISA 3.1 or later
+
+
@@ -9543,6 +9770,10 @@ xmlns:xlink="http://www.w3.org/1999/xlink" xml:id="VIPR.vec-ref">
xvcmpgesp r,a,b
+
+
+
+
@@ -9559,6 +9790,10 @@ xmlns:xlink="http://www.w3.org/1999/xlink" xml:id="VIPR.vec-ref">
xvcmpgedp r,a,b
+
+
+
+
@@ -9589,6 +9824,10 @@ xmlns:xlink="http://www.w3.org/1999/xlink" xml:id="VIPR.vec-ref">
Endian considerations:
None.
+
+ Review status:
+ Not yet reviewed.
+
vcmpgtsb
@@ -9622,6 +9861,14 @@ xmlns:xlink="http://www.w3.org/1999/xlink" xml:id="VIPR.vec-ref">
vcmpgtud
vec_cmpgt
+
+ vcmpgtsq
+ vec_cmpgt
+
+
+ vcmpgtuq
+ vec_cmpgt
+
xvcmpgtsp
vec_cmpgt
@@ -9633,33 +9880,39 @@ xmlns:xlink="http://www.w3.org/1999/xlink" xml:id="VIPR.vec-ref">
Supported type signatures for vec_cmpgt
-
+
+
-
+
r
-
+
a
-
+
b
-
+
Example Implementation
+
+
+ Restrictions
+
+
@@ -9678,6 +9931,10 @@ xmlns:xlink="http://www.w3.org/1999/xlink" xml:id="VIPR.vec-ref">
vcmpgtsb r,a,b
+
+
+
+
@@ -9694,6 +9951,10 @@ xmlns:xlink="http://www.w3.org/1999/xlink" xml:id="VIPR.vec-ref">
vcmpgtub r,a,b
+
+
+
+
@@ -9710,6 +9971,10 @@ xmlns:xlink="http://www.w3.org/1999/xlink" xml:id="VIPR.vec-ref">
vcmpgtsh r,a,b
+
+
+
+
@@ -9726,6 +9991,10 @@ xmlns:xlink="http://www.w3.org/1999/xlink" xml:id="VIPR.vec-ref">
vcmpgtuh r,a,b
+
+
+
+
@@ -9742,6 +10011,10 @@ xmlns:xlink="http://www.w3.org/1999/xlink" xml:id="VIPR.vec-ref">
vcmpgtsw r,a,b
+
+
+
+
@@ -9758,6 +10031,10 @@ xmlns:xlink="http://www.w3.org/1999/xlink" xml:id="VIPR.vec-ref">
vcmpgtuw r,a,b
+
+
+
+
@@ -9774,6 +10051,10 @@ xmlns:xlink="http://www.w3.org/1999/xlink" xml:id="VIPR.vec-ref">
vcmpgtsd r,a,b
+
+
+
+
@@ -9790,6 +10071,52 @@ xmlns:xlink="http://www.w3.org/1999/xlink" xml:id="VIPR.vec-ref">
vcmpgtud r,a,b
+
+
+
+
+
+
+
+ vector bool __int128
+
+
+ vector signed __int128
+
+
+ vector signed __int128
+
+
+
+ vcmpgtsq r,a,b
+
+
+
+
+ ISA 3.1 or later
+
+
+
+
+
+ vector bool __int128
+
+
+ vector unsigned __int128
+
+
+ vector unsigned __int128
+
+
+
+ vcmpgtuq r,a,b
+
+
+
+
+ ISA 3.1 or later
+
+
@@ -9806,6 +10133,10 @@ xmlns:xlink="http://www.w3.org/1999/xlink" xml:id="VIPR.vec-ref">
xvcmpgtsp r,a,b
+
+
+
+
@@ -9822,6 +10153,10 @@ xmlns:xlink="http://www.w3.org/1999/xlink" xml:id="VIPR.vec-ref">
xvcmpgtdp r,a,b
+
+
+
+
@@ -10127,6 +10462,10 @@ xmlns:xlink="http://www.w3.org/1999/xlink" xml:id="VIPR.vec-ref">
Endian considerations:
None.
+
+ Review status:
+ Not yet reviewed.
+
vcmpgtsb
@@ -10160,6 +10499,14 @@ xmlns:xlink="http://www.w3.org/1999/xlink" xml:id="VIPR.vec-ref">
vcmpgtud
vec_cmplt
+
+ vcmpgtsq
+ vec_cmplt
+
+
+ vcmpgtuq
+ vec_cmplt
+
xvcmpgtsp
vec_cmplt
@@ -10171,33 +10518,39 @@ xmlns:xlink="http://www.w3.org/1999/xlink" xml:id="VIPR.vec-ref">
Supported type signatures for vec_cmplt
-
+
+
-
+
r
-
+
a
-
+
b
-
+
Example Implementation
+
+
+ Restrictions
+
+
@@ -10216,6 +10569,10 @@ xmlns:xlink="http://www.w3.org/1999/xlink" xml:id="VIPR.vec-ref">
vcmpgtsb r,b,a
+
+
+
+
@@ -10232,6 +10589,10 @@ xmlns:xlink="http://www.w3.org/1999/xlink" xml:id="VIPR.vec-ref">
vcmpgtub r,b,a
+
+
+
+
@@ -10248,6 +10609,10 @@ xmlns:xlink="http://www.w3.org/1999/xlink" xml:id="VIPR.vec-ref">
vcmpgtsh r,b,a
+
+
+
+
@@ -10264,6 +10629,10 @@ xmlns:xlink="http://www.w3.org/1999/xlink" xml:id="VIPR.vec-ref">
vcmpgtuh r,b,a
+
+
+
+
@@ -10280,6 +10649,10 @@ xmlns:xlink="http://www.w3.org/1999/xlink" xml:id="VIPR.vec-ref">
vcmpgtsw r,b,a
+
+
+
+
@@ -10296,6 +10669,10 @@ xmlns:xlink="http://www.w3.org/1999/xlink" xml:id="VIPR.vec-ref">
vcmpgtuw r,b,a
+
+
+
+
@@ -10312,6 +10689,10 @@ xmlns:xlink="http://www.w3.org/1999/xlink" xml:id="VIPR.vec-ref">
vcmpgtsd r,b,a
+
+
+
+
@@ -10328,6 +10709,52 @@ xmlns:xlink="http://www.w3.org/1999/xlink" xml:id="VIPR.vec-ref">
vcmpgtud r,b,a
+
+
+
+
+
+
+
+ vector bool __int128
+
+
+ vector signed __int128
+
+
+ vector signed __int128
+
+
+
+ vcmpgtsq r,b,a
+
+
+
+
+ ISA 3.1 or later
+
+
+
+
+
+ vector bool __int128
+
+
+ vector unsigned __int128
+
+
+ vector unsigned __int128
+
+
+
+ vcmpgtuq r,b,a
+
+
+
+
+ ISA 3.1 or later
+
+
@@ -10344,6 +10771,10 @@ xmlns:xlink="http://www.w3.org/1999/xlink" xml:id="VIPR.vec-ref">
xvcmpgtsp r,b,a
+
+
+
+
@@ -10360,6 +10791,10 @@ xmlns:xlink="http://www.w3.org/1999/xlink" xml:id="VIPR.vec-ref">
xvcmpgtdp r,b,a
+
+
+
+
@@ -10388,6 +10823,10 @@ xmlns:xlink="http://www.w3.org/1999/xlink" xml:id="VIPR.vec-ref">
Endian considerations:
None.
+
+ Review status:
+ Not yet reviewed.
+
vcmpneb
@@ -10405,6 +10844,10 @@ xmlns:xlink="http://www.w3.org/1999/xlink" xml:id="VIPR.vec-ref">
vcmpequd
vec_cmpne
+
+ vcmpequq
+ vec_cmpne
+
xxlnor
vec_cmpne
@@ -10420,33 +10863,39 @@ xmlns:xlink="http://www.w3.org/1999/xlink" xml:id="VIPR.vec-ref">
Supported type signatures for vec_cmpne
-
+
+
-
+
r
-
+
a
-
+
b
-
+
Example Implementation
+
+
+ Restrictions
+
+
@@ -10465,6 +10914,10 @@ xmlns:xlink="http://www.w3.org/1999/xlink" xml:id="VIPR.vec-ref">
vcmpneb r,a,b
+
+
+
+
@@ -10481,6 +10934,10 @@ xmlns:xlink="http://www.w3.org/1999/xlink" xml:id="VIPR.vec-ref">
vcmpneb r,a,b
+
+
+
+
@@ -10497,6 +10954,10 @@ xmlns:xlink="http://www.w3.org/1999/xlink" xml:id="VIPR.vec-ref">
vcmpneb r,a,b
+
+
+
+
@@ -10513,6 +10974,10 @@ xmlns:xlink="http://www.w3.org/1999/xlink" xml:id="VIPR.vec-ref">
vcmpneh r,a,b
+
+
+
+
@@ -10529,6 +10994,10 @@ xmlns:xlink="http://www.w3.org/1999/xlink" xml:id="VIPR.vec-ref">
vcmpneh r,a,b
+
+
+
+
@@ -10545,6 +11014,10 @@ xmlns:xlink="http://www.w3.org/1999/xlink" xml:id="VIPR.vec-ref">
vcmpneh r,a,b
+
+
+
+
@@ -10561,6 +11034,10 @@ xmlns:xlink="http://www.w3.org/1999/xlink" xml:id="VIPR.vec-ref">
vcmpnew r,a,b
+
+
+
+
@@ -10577,6 +11054,10 @@ xmlns:xlink="http://www.w3.org/1999/xlink" xml:id="VIPR.vec-ref">
vcmpnew r,a,b
+
+
+
+
@@ -10593,6 +11074,10 @@ xmlns:xlink="http://www.w3.org/1999/xlink" xml:id="VIPR.vec-ref">
vcmpnew r,a,b
+
+
+
+
@@ -10610,6 +11095,10 @@ xmlns:xlink="http://www.w3.org/1999/xlink" xml:id="VIPR.vec-ref">
xxlnor r,t,t
+
+
+
+
@@ -10627,6 +11116,10 @@ xmlns:xlink="http://www.w3.org/1999/xlink" xml:id="VIPR.vec-ref">
xxlnor r,t,t
+
+
+
+
@@ -10644,6 +11137,76 @@ xmlns:xlink="http://www.w3.org/1999/xlink" xml:id="VIPR.vec-ref">
xxlnor r,t,t
+
+
+
+
+
+
+
+ vector bool __int128
+
+
+ vector bool __int128
+
+
+ vector bool __int128
+
+
+
+ vcmpequq t,a,b
+ xxlnor r,t,t
+
+
+
+
+ ISA 3.1 or later
+
+
+
+
+
+ vector bool __int128
+
+
+ vector signed __int128
+
+
+ vector signed __int128
+
+
+
+ vcmpequq t,a,b
+ xxlnor r,t,t
+
+
+
+
+ ISA 3.1 or later
+
+
+
+
+
+ vector bool __int128
+
+
+ vector unsigned __int128
+
+
+ vector unsigned __int128
+
+
+
+ vcmpequq t,a,b
+ xxlnor r,t,t
+
+
+
+
+ ISA 3.1 or later
+
+
@@ -10661,6 +11224,10 @@ xmlns:xlink="http://www.w3.org/1999/xlink" xml:id="VIPR.vec-ref">
xxlnor r,t,t
+
+
+
+
@@ -10678,6 +11245,10 @@ xmlns:xlink="http://www.w3.org/1999/xlink" xml:id="VIPR.vec-ref">
xxlnor r,t,t
+
+
+
+
@@ -12744,8 +13315,9 @@ xmlns:xlink="http://www.w3.org/1999/xlink" xml:id="VIPR.vec-ref">
Review status:
- Reviewed by Paul Clarke and Jinsong Ji. Added 0x8000_0000
- example per Jinsong's comment.
+ Changes other than __int128 reviewed by Paul Clarke and
+ Jinsong Ji. Added 0x8000_0000 example per Jinsong's comment.
+ Changes for __int128 have not yet been reviewed.
@@ -12792,6 +13364,14 @@ xmlns:xlink="http://www.w3.org/1999/xlink" xml:id="VIPR.vec-ref">
vdivud
vec_div
+
+ vdivsq
+ vec_div
+
+
+ vdivuq
+ vec_div
+
Supported type signatures for vec_div
@@ -12952,6 +13532,50 @@ xmlns:xlink="http://www.w3.org/1999/xlink" xml:id="VIPR.vec-ref">
+
+
+ vector signed __int128
+
+
+ vector signed __int128
+
+
+ vector signed __int128
+
+
+ Not required
+
+
+
+ vdivsq r,a,b
+
+
+
+ ISA 3.1 or later
+
+
+
+
+ vector unsigned __int128
+
+
+ vector unsigned __int128
+
+
+ vector unsigned __int128
+
+
+ Not required
+
+
+
+ vdivuq r,a,b
+
+
+
+ ISA 3.1 or later
+
+
vector float
@@ -13041,8 +13665,10 @@ xmlns:xlink="http://www.w3.org/1999/xlink" xml:id="VIPR.vec-ref">
Review status:
- Reviewed by Paul Clarke and Jinsong Ji. Updated language
- about the shift amount per Jinsong's comment.
+ Changes other than __int128 were reviewed by Paul Clarke and
+ Jinsong Ji. Updated language about the shift amount per
+ Jinsong's comment. Changes for __int128 have not yet been
+ reviewed.
@@ -13061,6 +13687,14 @@ xmlns:xlink="http://www.w3.org/1999/xlink" xml:id="VIPR.vec-ref">
vdiveud
vec_dive
+
+ vdivesq
+ vec_dive
+
+
+ vdiveuq
+ vec_dive
+
Supported type signatures for vec_dive
@@ -13180,6 +13814,46 @@ xmlns:xlink="http://www.w3.org/1999/xlink" xml:id="VIPR.vec-ref">
ISA 3.1 or later
+
+
+ vector signed __int128
+
+
+ vector signed __int128
+
+
+ vector signed __int128
+
+
+
+
+ vdivesq r,a,b
+
+
+
+
+ ISA 3.1 or later
+
+
+
+
+ vector unsigned __int128
+
+
+ vector unsigned __int128
+
+
+ vector unsigned __int128
+
+
+
+ vdiveuq r,a,b
+
+
+
+ ISA 3.1 or later
+
+
@@ -22647,7 +23321,8 @@ xmlns:xlink="http://www.w3.org/1999/xlink" xml:id="VIPR.vec-ref">
Review status:
- Reviewed by Paul Clarke and Jinsong Ji.
+ Changes other than __int128 were reviewed by Paul Clarke and
+ Jinsong Ji. Changes for __int128 have not yet been reviewed.
@@ -22666,6 +23341,14 @@ xmlns:xlink="http://www.w3.org/1999/xlink" xml:id="VIPR.vec-ref">
vmodud
vec_mod
+
+ vmodsq
+ vec_mod
+
+
+ vmoduq
+ vec_mod
+
Supported type signatures for vec_mod
@@ -22778,7 +23461,47 @@ xmlns:xlink="http://www.w3.org/1999/xlink" xml:id="VIPR.vec-ref">
- vmodud r,a,b
+ vmodud r,a,b
+
+
+
+ ISA 3.1 or later
+
+
+
+
+ vector signed __int128
+
+
+ vector signed __int128
+
+
+ vector signed __int128
+
+
+
+
+ vmodsq r,a,b
+
+
+
+
+ ISA 3.1 or later
+
+
+
+
+ vector unsigned __int128
+
+
+ vector unsigned __int128
+
+
+ vector unsigned __int128
+
+
+
+ vmoduq r,a,b
@@ -23209,6 +23932,111 @@ xmlns:xlink="http://www.w3.org/1999/xlink" xml:id="VIPR.vec-ref">
+
+ vec_msumc
+ Vector Multiply-Sum Carryout
+
+ r = vec_msumc (a, b, c)
+
+
+ Purpose:
+ Returns the carryout from adding the products of the
+ elements of the first two source vectors together with the
+ value in the third source vector.
+
+ Result value: Let
+ x be the product of a[0] and b[0], and let y be the product of a[1] and b[1]. Then r is equal to the carryout from x + y +
+ c. The carryout is found by
+ shifting the sum right by the size of c in bits.
+
+ Endian considerations:
+ None.
+
+ Review status:
+ Changes have not been reviewed.
+
+
+
+ vmsumcud
+ vec_msumc
+
+
+
+ Supported type signatures for vec_msumc
+
+
+
+
+
+
+
+
+
+
+
+ r
+
+
+
+
+ a
+
+
+
+
+ b
+
+
+
+
+ c
+
+
+
+ Example Implementation
+
+
+
+ Restrictions
+
+
+
+
+
+
+
+ vector unsigned __int128
+
+
+ vector unsigned long long
+
+
+ vector unsigned long long
+
+
+ vector unsigned __int128
+
+
+
+ vmsumcud r,a,b,c
+
+
+
+
+
+
+
+
+
+
vec_msums
Vector Multiply-Sum Saturated
@@ -23568,25 +24396,25 @@ xmlns:xlink="http://www.w3.org/1999/xlink" xml:id="VIPR.vec-ref">
-
+
r
-
+
a
-
+
b
-
+
Example Implementation
-
+
Restrictions
@@ -23817,6 +24645,10 @@ xmlns:xlink="http://www.w3.org/1999/xlink" xml:id="VIPR.vec-ref">
The element numbering within a register is left-to-right for big-endian
targets, and right-to-left for little-endian targets.
+ Review
+ status:
+ Changes not yet reviewed.
+
vmulosh
@@ -23866,15 +24698,32 @@ xmlns:xlink="http://www.w3.org/1999/xlink" xml:id="VIPR.vec-ref">
vmuleub
vec_mule
+
+ vmulosd
+ vec_mule
+
+
+ vmulesd
+ vec_mule
+
+
+ vmuloud
+ vec_mule
+
+
+ vmuleud
+ vec_mule
+
Supported type signatures for vec_mule
-
+
+
@@ -23898,6 +24747,11 @@ xmlns:xlink="http://www.w3.org/1999/xlink" xml:id="VIPR.vec-ref">
Example BE Implementation
+
+
+ Restrictions
+
+
@@ -23921,6 +24775,9 @@ xmlns:xlink="http://www.w3.org/1999/xlink" xml:id="VIPR.vec-ref">
vmulesb r,a,b
+
+
+
@@ -23942,6 +24799,9 @@ xmlns:xlink="http://www.w3.org/1999/xlink" xml:id="VIPR.vec-ref">
vmuleub r,a,b
+
+
+
@@ -23963,6 +24823,9 @@ xmlns:xlink="http://www.w3.org/1999/xlink" xml:id="VIPR.vec-ref">
vmulesh r,a,b
+
+
+
@@ -23984,6 +24847,9 @@ xmlns:xlink="http://www.w3.org/1999/xlink" xml:id="VIPR.vec-ref">
vmuleuh r,a,b
+
+
+
@@ -24005,6 +24871,9 @@ xmlns:xlink="http://www.w3.org/1999/xlink" xml:id="VIPR.vec-ref">
vmulesw r,a,b
+
+
+
@@ -24026,6 +24895,57 @@ xmlns:xlink="http://www.w3.org/1999/xlink" xml:id="VIPR.vec-ref">
vmuleuw r,a,b
+
+
+
+
+
+
+ vector signed __int128
+
+
+ vector signed long long
+
+
+ vector signed long long
+
+
+
+ vmulosd r,a,b
+
+
+
+
+ vmulesd r,a,b
+
+
+
+ ISA 3.1 or later
+
+
+
+
+ vector unsigned __int128
+
+
+ vector unsigned long long
+
+
+ vector unsigned long long
+
+
+
+ vmuloud r,a,b
+
+
+
+
+ vmuleud r,a,b
+
+
+
+ ISA 3.1 or later
+
@@ -24211,6 +25131,10 @@ xmlns:xlink="http://www.w3.org/1999/xlink" xml:id="VIPR.vec-ref">
The element numbering within a register is left-to-right for big-endian
targets, and right-to-left for little-endian targets.
+ Review
+ status:
+ Changes not yet reviewed.
+
vmulesh
@@ -24260,15 +25184,32 @@ xmlns:xlink="http://www.w3.org/1999/xlink" xml:id="VIPR.vec-ref">
vmuloub
vec_mulo
+
+ vmulesd
+ vec_mulo
+
+
+ vmulosd
+ vec_mulo
+
+
+ vmuleud
+ vec_mulo
+
+
+ vmuloud
+ vec_mulo
+
Supported type signatures for vec_mulo
-
+
+
@@ -24292,6 +25233,11 @@ xmlns:xlink="http://www.w3.org/1999/xlink" xml:id="VIPR.vec-ref">
Example BE Implementation
+
+
+ Restrictions
+
+
@@ -24315,6 +25261,9 @@ xmlns:xlink="http://www.w3.org/1999/xlink" xml:id="VIPR.vec-ref">
vmulosb r,a,b
+
+
+
@@ -24336,6 +25285,9 @@ xmlns:xlink="http://www.w3.org/1999/xlink" xml:id="VIPR.vec-ref">
vmuloub r,a,b
+
+
+
@@ -24357,6 +25309,9 @@ xmlns:xlink="http://www.w3.org/1999/xlink" xml:id="VIPR.vec-ref">
vmulosh r,a,b
+
+
+
@@ -24378,6 +25333,9 @@ xmlns:xlink="http://www.w3.org/1999/xlink" xml:id="VIPR.vec-ref">
vmulouh r,a,b
+
+
+
@@ -24399,27 +25357,81 @@ xmlns:xlink="http://www.w3.org/1999/xlink" xml:id="VIPR.vec-ref">
vmulosw r,a,b
+
+
+
vector unsigned long long
- vector unsigned int
+ vector unsigned int
+
+
+ vector unsigned int
+
+
+
+ vmuleuw r,a,b
+
+
+
+
+ vmulouw r,a,b
+
+
+
+
+
+
+
+
+ vector signed __int128
+
+
+ vector signed long long
+
+
+ vector signed long long
+
+
+
+ vmulesd r,a,b
+
+
+
+
+ vmulosd r,a,b
+
+
+
+ ISA 3.1 or later
+
+
+
+
+ vector unsigned __int128
+
+
+ vector unsigned long long
- vector unsigned int
+ vector unsigned long long
- vmuleuw r,a,b
+ vmuleud r,a,b
- vmulouw r,a,b
+ vmuloud r,a,b
+
+ ISA 3.1 or later
+
@@ -32440,6 +33452,315 @@ xmlns:xlink="http://www.w3.org/1999/xlink" xml:id="VIPR.vec-ref">
+
+ vec_signexti
+ Vector Sign Extend to Integer
+
+ r = vec_signexti (a)
+
+
+ Purpose:
+ Sign-extend smaller elements of a source vector to word length
+ in the result vector.
+
+ Result value: Each word
+ element of r is computed by
+ sign-extending the element of a
+ found in the least significant position of the corresponding
+ word of a. For example, a
+ sign-extension of a vector signed char
to a
+ vector signed int
will sign-extend the rightmost
+ byte of each word.
+
+ Endian considerations:
+ Discuss with team.
+
+ Review status:
+ Not yet reviewed.
+
+
+
+ vextsb2w
+ vec_signexti
+
+
+ vextsh2w
+ vec_signexti
+
+
+
+ Supported type signatures for vec_signexti
+
+
+
+
+
+
+
+
+
+ r
+
+
+
+
+ a
+
+
+
+ Example
+ Implementation
+
+
+ Restrictions
+
+
+
+
+
+
+ vector signed int
+
+
+ vector signed char
+
+
+
+ vextsb2w r,a
+
+
+
+ ISA 3.0 or later
+
+
+
+
+ vector signed int
+
+
+ vector signed short
+
+
+
+ vextsh2w r,a
+
+
+
+ ISA 3.0 or later
+
+
+
+
+
+
+
+
+
+
+ vec_signextll
+ Vector Sign Extend to Long Long
+
+ r = vec_signextll (a)
+
+
+ Purpose:
+ Sign-extend smaller elements of a source vector to doubleword
+ length in the result vector.
+
+ Result value: Each
+ doubleword element of r is
+ computed by sign-extending the element of a found in the least significant position
+ of the corresponding doubleword of a. For example, a sign-extension of a
+ vector signed char
to a vector signed long
+ long
will sign-extend the rightmost byte of each
+ doubleword.
+
+ Endian considerations:
+ Discuss with team.
+
+ Review status:
+ Not yet reviewed.
+
+
+
+ vextsb2d
+ vec_signextll
+
+
+ vextsh2d
+ vec_signextll
+
+
+ vextsw2d
+ vec_signextll
+
+
+
+ Supported type signatures for vec_signextll
+
+
+
+
+
+
+
+
+
+ r
+
+
+
+
+ a
+
+
+
+ Example
+ Implementation
+
+
+ Restrictions
+
+
+
+
+
+
+ vector signed long long
+
+
+ vector signed char
+
+
+
+ vextsb2d r,a
+
+
+
+ ISA 3.0 or later
+
+
+
+
+ vector signed long long
+
+
+ vector signed short
+
+
+
+ vextsh2d r,a
+
+
+
+ ISA 3.0 or later
+
+
+
+
+ vector signed long long
+
+
+ vector signed int
+
+
+
+ vextsw2d r,a
+
+
+
+ ISA 3.0 or later
+
+
+
+
+
+
+
+
+
+
+ vec_signextq
+ Vector Sign Extend to Quadword Integer
+
+ r = vec_signextq (a)
+
+
+ Purpose:
+ Sign-extend a doubleword integer in a source vector to quadword
+ length in the result vector.
+
+ Result value:
+ r is computed by sign-extending
+ the rightmost doubleword element of a.
+
+ Endian considerations:
+ Discuss with team.
+
+ Review status:
+ Not yet reviewed.
+
+
+
+ vextsd2q
+ vec_signextq
+
+
+
+ Supported type signatures for vec_signextq
+
+
+
+
+
+
+
+
+
+ r
+
+
+
+
+ a
+
+
+
+ Example
+ Implementation
+
+
+ Restrictions
+
+
+
+
+
+
+ vector signed __int128
+
+
+ vector signed long long
+
+
+
+ vextsd2q r,a
+
+
+
+ ISA 3.1 or later
+
+
+
+
+
+
+
+
+