From b1151856bb93a17f742001596db9f9896406494b Mon Sep 17 00:00:00 2001 From: Bill Schmidt Date: Thu, 6 May 2021 10:41:21 -0500 Subject: [PATCH] Fix issue #66 Signed-off-by: Bill Schmidt --- Intrinsics_Reference/ch_vec_reference.xml | 74 +++++++++++++++++++++++ 1 file changed, 74 insertions(+) diff --git a/Intrinsics_Reference/ch_vec_reference.xml b/Intrinsics_Reference/ch_vec_reference.xml index 83b7e45..9104fe3 100644 --- a/Intrinsics_Reference/ch_vec_reference.xml +++ b/Intrinsics_Reference/ch_vec_reference.xml @@ -15716,11 +15716,31 @@ xmlns:xlink="http://www.w3.org/1999/xlink" xml:id="VIPR.vec-ref"> Endian considerations: None. + + Review status: + Not yet reviewed. + + + Notes: + The example implementation when a is a vector double assumes that the + constant 2 to the power of b + has been loaded into floating-point register c. + vctsxs vec_cts + + xvcvdpsxds + vec_cts + + + xvmuldp + vec_cts + Supported type signatures for vec_cts @@ -15770,6 +15790,23 @@ xmlns:xlink="http://www.w3.org/1999/xlink" xml:id="VIPR.vec-ref"> + + + vector signed long long + + + vector double + + + 5-bit unsigned literal + + + + xvmuldp t,a,c + xvcvdpsxds r,t + + +
@@ -15797,11 +15834,31 @@ xmlns:xlink="http://www.w3.org/1999/xlink" xml:id="VIPR.vec-ref"> Endian considerations: None. + + Review status: + Not yet reviewed. + + + Notes: + The example implementation when a is a vector double assumes that the + constant 2 to the power of b + has been loaded into floating-point register c. + vctuxs vec_ctu + + xvcvdpuxds + vec_ctu + + + xvmuldp + vec_ctu + Supported type signatures for vec_ctu @@ -15851,6 +15908,23 @@ xmlns:xlink="http://www.w3.org/1999/xlink" xml:id="VIPR.vec-ref"> + + + vector unsigned long long + + + vector double + + + 5-bit unsigned literal + + + + xvmuldp t,a,c + xvcvdpuxds r,t + + +