diff --git a/Intrinsics_Reference/ch_vec_reference.xml b/Intrinsics_Reference/ch_vec_reference.xml
index bf8e5b7..0dccfd4 100644
--- a/Intrinsics_Reference/ch_vec_reference.xml
+++ b/Intrinsics_Reference/ch_vec_reference.xml
@@ -13210,9 +13210,16 @@ xmlns:xlink="http://www.w3.org/1999/xlink" xml:id="VIPR.vec-ref">
single-precision IEEE numbers.
Endian considerations:
The element numbering within a register is left-to-right for big-endian
- targets, and right-to-left for little-endian targets. Thus the
- permute control vector at address pcv
- in the example implementation will differ for big- and little-endian.
+ targets, and right-to-left for little-endian targets.
+
+ Notes: The example
+ implementation assumes that the vperm instruction is used for
+ big-endian, and the vpermr instruction is used for
+ little-endian. The permute control vector for the vperm or
+ vpermr instruction is in a memory location identified by pcv.
+ The value located at pcv is identical in natural element order
+ for big- and little-endian: { 15, 14, 0, 0, 13, 12, 0, 0, 11,
+ 10, 0, 0, 9, 8, 0, 0 }.
@@ -13223,6 +13230,10 @@ xmlns:xlink="http://www.w3.org/1999/xlink" xml:id="VIPR.vec-ref">
vperm
vec_extract_fp32_from_shorth
+
+ vpermr
+ vec_extract_fp32_from_shorth
+
xvcvhpsp
vec_extract_fp32_from_shorth
@@ -13266,7 +13277,7 @@ xmlns:xlink="http://www.w3.org/1999/xlink" xml:id="VIPR.vec-ref">
lxv t,0(pcv)
- vperm u,a,a,t
+ vperm[r] u,a,a,t
xvcvhpsp r,u
@@ -13300,9 +13311,16 @@ xmlns:xlink="http://www.w3.org/1999/xlink" xml:id="VIPR.vec-ref">
single-precision IEEE numbers.
Endian considerations:
The element numbering within a register is left-to-right for big-endian
- targets, and right-to-left for little-endian targets. Thus the
- permute control vector at address pcv
- in the example implementation will differ for big- and little-endian.
+ targets, and right-to-left for little-endian targets.
+
+ Notes: The example
+ implementation assumes that the vperm instruction is used for
+ big-endian, and the vpermr instruction is used for
+ little-endian. The permute control vector for the vperm or
+ vpermr instruction is in a memory location identified by pcv.
+ The value located at pcv is identical in natural element order
+ for big- and little-endian: { 7, 6, 0, 0, 5, 4, 0, 0, 3, 2, 0,
+ 0, 1, 0, 0, 0 }.
@@ -13313,6 +13331,10 @@ xmlns:xlink="http://www.w3.org/1999/xlink" xml:id="VIPR.vec-ref">
vperm
vec_extract_fp32_from_shortl
+
+ vpermr
+ vec_extract_fp32_from_shortl
+
xvcvhpsp
vec_extract_fp32_from_shortl
@@ -13356,7 +13378,7 @@ xmlns:xlink="http://www.w3.org/1999/xlink" xml:id="VIPR.vec-ref">
lxv t,0(pcv)
- vperm u,a,a,t
+ vperm[r] u,a,a,t
xvcvhpsp r,u
@@ -25636,8 +25658,81 @@ xmlns:xlink="http://www.w3.org/1999/xlink" xml:id="VIPR.vec-ref">
Notes: The example
implementations assume that the permute control vector for the
vperm or vpermr instruction is in a register identified by pcv.
- The value of pcv differs based on the element size.
+ The value of pcv differs based on the element size, and is the
+ same (in natural element order) for big- and little-endian,
+ assuming the use of vperm for big-endian and vpermr for
+ little-endian.
+
+
+
+
+
+
+
+ Vector types
+
+
+ Permute control vector
+
+
+
+
+
+
+
+ vector char
+
+
+
+
+ { 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1,
+ 0 }
+
+
+
+
+
+
+ vector short
+
+
+
+
+ { 14, 15, 12, 13, 10, 11, 8, 9, 6, 7, 4, 5, 2, 3, 0,
+ 1 }
+
+
+
+
+
+
+ vector int, vector float
+
+
+
+
+ { 12, 13, 14, 15, 8, 9, 10, 11, 4, 5, 6, 7, 0, 1, 2,
+ 3 }
+
+
+
+
+
+
+ vector long long, vector double
+
+
+
+
+ { 8, 9, 10, 11, 12, 13, 14, 15, 0, 1, 2, 3, 4, 5, 6,
+ 7 }
+
+
+
+
+
+
vperm