From ea380443b8dd49c0e11cfb23ec5e09dd1586bae8 Mon Sep 17 00:00:00 2001
From: Bill Schmidt
Date: Tue, 17 Jul 2018 16:18:44 0500
Subject: [PATCH] Add roughedin pages for the intrinsics from tables A.3, A.4,
A.5, and A.6 of the original ABI, generated by Bill Seurer's doctool.
Signedoffby: Bill Schmidt

Intrinsics_Reference/ch_vec_reference.xml  5203 +++++++++++++++++++
1 file changed, 4811 insertions(+), 392 deletions()
diff git a/Intrinsics_Reference/ch_vec_reference.xml b/Intrinsics_Reference/ch_vec_reference.xml
index 16270dd..09fdce9 100644
 a/Intrinsics_Reference/ch_vec_reference.xml
+++ b/Intrinsics_Reference/ch_vec_reference.xml
@@ 1220,636 +1220,4266 @@ xmlns:xlink="http://www.w3.org/1999/xlink" xml:id="section_vec_intrinsics">

 vec_and
 Vector AND
+
+
+ vec_all_eq
+ Vector ... Spelled Out Name TBD
 r = vec_and (a, b)
+ r = vec_all_eq (ARG1, ARG2)
Purpose:
 Performs a bitwise AND of two vectors.

 Result value:
 The value of r is the bitwise AND
 of a and b.
+ Tests whether all sets of corresponding elements of the given vectors are equal.
+ Result value: The result is 1 if each element of ARG1 is equal to the corresponding element of ARG2. Otherwise, the result is 0.
Endian considerations:
None.
 Supported type signatures for vec_and

+ Supported type signatures for vec_all_eq
+



+
+
r

+


 a

+
+
+ ARG1
+
+
+
+
+ ARG2
+
+
+
+ Example Implementation
+
+
+
+

 b

+ int

 Example Implementation

+ vector bool char

 Restrictions

+ vector bool char
+
+
+ sample implementation TBD


 vector bool char
+ int
 vector bool char
+ vector signed char
 vector bool char
+ vector signed char

 xxland r,a,b

+ sample implementation TBD


 vector signed char
+ int
 vector signed char
+ vector unsigned char
 vector signed char
+ vector unsigned char

 xxland r,a,b

+ sample implementation TBD


 vector unsigned char
+ int
 vector unsigned char
+ vector bool int
 vector unsigned char
+ vector bool int

 xxland r,a,b

+ sample implementation TBD


 vector bool short
+ int
 vector bool short
+ vector signed int
 vector bool short
+ vector signed int

 xxland r,a,b

+ sample implementation TBD


 vector signed short
+ int
 vector signed short
+ vector unsigned int
 vector signed short
+ vector unsigned int

 xxland r,a,b

+ sample implementation TBD


 vector unsigned short
+ int
 vector unsigned short
+ vector bool long long
 vector unsigned short
+ vector bool long long

 xxland r,a,b

+ sample implementation TBD
 vector signed int
+ int
 vector signed int
+ vector signed long long
 vector signed int
+ vector signed long long

 xxland r,a,b

+ sample implementation TBD


 vector bool int
+ int
 vector bool int
+ vector unsigned long long
 vector bool int
+ vector unsigned long long

 xxland r,a,b

+ sample implementation TBD


 vector unsigned int
+ int
 vector unsigned int
+ vector pixel
 vector unsigned int
+ vector pixel

 xxland r,a,b

+ sample implementation TBD


 vector bool long long
+ int
 vector bool long long
+ vector bool short
 vector bool long long
+ vector bool short

 xxland r,a,b

+ sample implementation TBD

 Phased in

 vector signed long long
+ int
 vector signed long long
+ vector signed short
 vector signed long long
+ vector signed short

 xxland r,a,b

+ sample implementation TBD

 Phased in

 vector unsigned long long
+ int
 vector unsigned long long
+ vector unsigned short
 vector unsigned long long
+ vector unsigned short

 xxland r,a,b

+ sample implementation TBD

 Phased in

 vector float
+ int
 vector float
+ vector double
 vector float
+ vector double

 xxland r,a,b

+ sample implementation TBD


 vector double
+ int
 vector double
+ vector float
 vector double
+ vector float

 xxland r,a,b

+ sample implementation TBD



+


 vec_andc
 Vector AND with Complement
+
+
+ vec_all_ge
+ Vector ... Spelled Out Name TBD
 r = vec_andc (a, b)
+ r = vec_all_ge (ARG1, ARG2)
Purpose:
 Performs a bitwise AND of one vector with the bitwise complement of
 another vector.

 Result value:
 The value of r is the bitwise AND
 of a with the bitwise complement
 of b.
+ Tests whether all elements of the first argument are greater than or equal to the corresponding elements of the second argument.
+ Result value: The result is 1 if all elements of ARG1 are greater than or equal to the corresponding elements of ARG2. Otherwise, the result is 0.
Endian considerations:
None.
 Supported type signatures for vec_andc

+ Supported type signatures for vec_all_ge
+



+
+
r

+


 a

+
+
+ ARG1
+


 b

+
+
+ ARG2
+


 Example Implementation




 Restrictions

+
+ Example Implementation
 vector bool char
+ int
 vector bool char
+ vector signed char
 vector bool char
+ vector signed char

 xxlandc r,a,b

+ sample implementation TBD


 vector signed char
+ int
 vector signed char
+ vector unsigned char
 vector signed char
+ vector unsigned char

 xxlandc r,a,b

+ sample implementation TBD


 vector unsigned char
+ int
 vector unsigned char
+ vector signed int
 vector unsigned char
+ vector signed int

 xxlandc r,a,b

+ sample implementation TBD


 vector bool short
+ int
 vector bool short
+ vector unsigned int
 vector bool short
+ vector unsigned int

 xxlandc r,a,b

+ sample implementation TBD


 vector signed short
+ int
 vector signed short
+ vector signed long long
 vector signed short
+ vector signed long long

 xxlandc r,a,b

+ sample implementation TBD


 vector unsigned short
+ int
 vector unsigned short
+ vector unsigned long long
 vector unsigned short
+ vector unsigned long long

 xxlandc r,a,b

+ sample implementation TBD
 vector signed int
+ int
 vector signed int
+ vector signed short
 vector signed int
+ vector signed short

 xxlandc r,a,b

+ sample implementation TBD


 vector bool int
+ int
 vector bool int
+ vector unsigned short
 vector bool int
+ vector unsigned short

 xxlandc r,a,b

+ sample implementation TBD


 vector unsigned int
+ int
 vector unsigned int
+ vector double
 vector unsigned int
+ vector double

 xxlandc r,a,b

+ sample implementation TBD
+
+
+
+
+ int
+
+
+ vector float
+
+
+ vector float
+
+
+ sample implementation TBD
+
+
+
+
+
+
+
+
+
+
+ vec_all_gt
+ Vector ... Spelled Out Name TBD
+
+ r = vec_all_gt (ARG1, ARG2)
+
+
+ Purpose:
+ Tests whether all elements of the first argument are greater than the corresponding elements of the second argument.
+
+ Result value: The result is 1 if all elements of ARG1 are greater than the corresponding elements of ARG2. Otherwise, the result is 0.
+ Endian considerations:
+ None.
+
+
+
+ Supported type signatures for vec_all_gt
+
+
+
+
+
+
+
+
+
+ r
+
+
+
+
+ ARG1
+
+
+
+
+ ARG2
+
+
+
+ Example Implementation
+
+
+
+
+
+
+ int
+
+
+ vector signed char
+
+
+ vector signed char
+
+
+ sample implementation TBD
+
+
+
+
+ int
+
+
+ vector unsigned char
+
+
+ vector unsigned char
+
+
+ sample implementation TBD



 vector bool long long


 vector bool long long
+
+ int
+
+
+ vector signed int
+
+
+ vector signed int
+
+
+ sample implementation TBD
+
+
+
+
+ int
+
+
+ vector unsigned int
+
+
+ vector unsigned int
+
+
+ sample implementation TBD
+
+
+
+
+ int
+
+
+ vector signed long long
+
+
+ vector signed long long
+
+
+ sample implementation TBD
+
+
+
+
+ int
+
+
+ vector unsigned long long
+
+
+ vector unsigned long long
+
+
+ sample implementation TBD
+
+
+
+
+ int
+
+
+ vector signed short
+
+
+ vector signed short
+
+
+ sample implementation TBD
+
+
+
+
+ int
+
+
+ vector unsigned short
+
+
+ vector unsigned short
+
+
+ sample implementation TBD
+
+
+
+
+ int
+
+
+ vector double
+
+
+ vector double
+
+
+ sample implementation TBD
+
+
+
+
+ int
+
+
+ vector float
+
+
+ vector float
+
+
+ sample implementation TBD
+
+
+
+
+
+
+
+
+
+
+ vec_all_in
+ Vector ... Spelled Out Name TBD
+
+ r = vec_all_in (ARG1, ARG2)
+
+
+ Purpose:
+ Tests whether each element of a given vector is within a given range.
+
+ Result value: The result is 1 if all elements of ARG1 have values less than or equal to the value of the corresponding element of ARG2, and greater than or equal to the negative of the value of the corresponding element of ARG2. Otherwise, the result is 0.
+ Endian considerations:
+ None.
+
+
+
+ Supported type signatures for vec_all_in
+
+
+
+
+
+
+
+
+
+ r
+
+
+
+
+ ARG1
+
+
+
+
+ ARG2
+
+
+
+ Example Implementation
+
+
+
+
+
+
+ int
+
+
+ vector float
+
+
+ vector float
+
+
+ sample implementation TBD
+
+
+
+
+
+
+
+
+
+
+ vec_all_le
+ Vector ... Spelled Out Name TBD
+
+ r = vec_all_le (ARG1, ARG2)
+
+
+ Purpose:
+ Tests whether all elements of the first argument are less than or equal to the corresponding elements of the second argument.
+
+ Result value: The result is 1 if all elements of ARG1 are less than or equal to the corresponding elements of ARG2. Otherwise, the result is 0.
+ Endian considerations:
+ None.
+
+
+
+ Supported type signatures for vec_all_le
+
+
+
+
+
+
+
+
+
+ r
+
+
+
+
+ ARG1
+
+
+
+
+ ARG2
+
+
+
+ Example Implementation
+
+
+
+
+
+
+ int
+
+
+ vector signed char
+
+
+ vector signed char
+
+
+ sample implementation TBD
+
+
+
+
+ int
+
+
+ vector unsigned char
+
+
+ vector unsigned char
+
+
+ sample implementation TBD
+
+
+
+
+ int
+
+
+ vector signed int
+
+
+ vector signed int
+
+
+ sample implementation TBD
+
+
+
+
+ int
+
+
+ vector unsigned int
+
+
+ vector unsigned int
+
+
+ sample implementation TBD
+
+
+
+
+ int
+
+
+ vector signed long long
+
+
+ vector signed long long
+
+
+ sample implementation TBD
+
+
+
+
+ int
+
+
+ vector unsigned long long
+
+
+ vector unsigned long long
+
+
+ sample implementation TBD
+
+
+
+
+ int
+
+
+ vector signed short
+
+
+ vector signed short
+
+
+ sample implementation TBD
+
+
+
+
+ int
+
+
+ vector unsigned short
+
+
+ vector unsigned short
+
+
+ sample implementation TBD
+
+
+
+
+ int
+
+
+ vector double
+
+
+ vector double
+
+
+ sample implementation TBD
+
+
+
+
+ int
+
+
+ vector float
+
+
+ vector float
+
+
+ sample implementation TBD
+
+
+
+
+
+
+
+
+
+
+ vec_all_lt
+ Vector ... Spelled Out Name TBD
+
+ r = vec_all_lt (ARG1, ARG2)
+
+
+ Purpose:
+ Tests whether all elements of the first argument are less than the corresponding elements of the second argument.
+
+ Result value: The result is 1 if all elements of ARG1 are less than the corresponding elements of ARG2. Otherwise, the result is 0.
+ Endian considerations:
+ None.
+
+
+
+ Supported type signatures for vec_all_lt
+
+
+
+
+
+
+
+
+
+ r
+
+
+
+
+ ARG1
+
+
+
+
+ ARG2
+
+
+
+ Example Implementation
+
+
+
+
+
+
+ int
+
+
+ vector signed char
+
+
+ vector signed char
+
+
+ sample implementation TBD
+
+
+
+
+ int
+
+
+ vector unsigned char
+
+
+ vector unsigned char
+
+
+ sample implementation TBD
+
+
+
+
+ int
+
+
+ vector signed int
+
+
+ vector signed int
+
+
+ sample implementation TBD
+
+
+
+
+ int
+
+
+ vector unsigned int
+
+
+ vector unsigned int
+
+
+ sample implementation TBD
+
+
+
+
+ int
+
+
+ vector signed long long
+
+
+ vector signed long long
+
+
+ sample implementation TBD
+
+
+
+
+ int
+
+
+ vector unsigned long long
+
+
+ vector unsigned long long
+
+
+ sample implementation TBD
+
+
+
+
+ int
+
+
+ vector signed short
+
+
+ vector signed short
+
+
+ sample implementation TBD
+
+
+
+
+ int
+
+
+ vector unsigned short
+
+
+ vector unsigned short
+
+
+ sample implementation TBD
+
+
+
+
+ int
+
+
+ vector double
+
+
+ vector double
+
+
+ sample implementation TBD
+
+
+
+
+ int
+
+
+ vector float
+
+
+ vector float
+
+
+ sample implementation TBD
+
+
+
+
+
+
+
+
+
+
+ vec_all_nan
+ Vector ... Spelled Out Name TBD
+
+ r = vec_all_nan (ARG1)
+
+
+ Purpose:
+ Tests whether each element of the given vector is a notanumber (NaN).
+
+ Result value: The result is 1 if each element of ARG1 is a NaN. Otherwise, the result is 0.
+ Endian considerations:
+ None.
+
+
+
+ Supported type signatures for vec_all_nan
+
+
+
+
+
+
+
+
+ r
+
+
+
+
+ ARG1
+
+
+
+ Example Implementation
+
+
+
+
+
+
+ int
+
+
+ vector double
+
+
+ sample implementation TBD
+
+
+
+
+ int
+
+
+ vector float
+
+
+ sample implementation TBD
+
+
+
+
+
+
+
+
+
+
+ vec_all_ne
+ Vector ... Spelled Out Name TBD
+
+ r = vec_all_ne (ARG1, ARG2)
+
+
+ Purpose:
+ Tests whether all sets of corresponding elements of the given vectors are not equal.
+
+ Result value: The result is 1 if each element of ARG1 is not equal to the corresponding element of ARG2. Otherwise, the result is 0.
+ Endian considerations:
+ None.
+
+
+
+ Supported type signatures for vec_all_ne
+
+
+
+
+
+
+
+
+
+ r
+
+
+
+
+ ARG1
+
+
+
+
+ ARG2
+
+
+
+ Example Implementation
+
+
+
+
+
+
+ int
+
+
+ vector bool char
+
+
+ vector bool char
+
+
+ sample implementation TBD
+
+
+
+
+ int
+
+
+ vector signed char
+
+
+ vector signed char
+
+
+ sample implementation TBD
+
+
+
+
+ int
+
+
+ vector unsigned char
+
+
+ vector unsigned char
+
+
+ sample implementation TBD
+
+
+
+
+ int
+
+
+ vector bool int
+
+
+ vector bool int
+
+
+ sample implementation TBD
+
+
+
+
+ int
+
+
+ vector signed int
+
+
+ vector signed int
+
+
+ sample implementation TBD
+
+
+
+
+ int
+
+
+ vector unsigned int
+
+
+ vector unsigned int
+
+
+ sample implementation TBD
+
+
+
+
+ int
+
+
+ vector bool long long
+
+
+ vector bool long long
+
+
+ sample implementation TBD
+
+
+
+
+ int
+
+
+ vector signed long long
+
+
+ vector signed long long
+
+
+ sample implementation TBD
+
+
+
+
+ int
+
+
+ vector unsigned long long
+
+
+ vector unsigned long long
+
+
+ sample implementation TBD
+
+
+
+
+ int
+
+
+ vector pixel
+
+
+ vector pixel
+
+
+ sample implementation TBD
+
+
+
+
+ int
+
+
+ vector bool short
+
+
+ vector bool short
+
+
+ sample implementation TBD
+
+
+
+
+ int
+
+
+ vector signed short
+
+
+ vector signed short
+
+
+ sample implementation TBD
+
+
+
+
+ int
+
+
+ vector unsigned short
+
+
+ vector unsigned short
+
+
+ sample implementation TBD
+
+
+
+
+ int
+
+
+ vector double
+
+
+ vector double
+
+
+ sample implementation TBD
+
+
+
+
+ int
+
+
+ vector float
+
+
+ vector float
+
+
+ sample implementation TBD
+
+
+
+
+
+
+
+
+
+
+ vec_all_nge
+ Vector ... Spelled Out Name TBD
+
+ r = vec_all_nge (ARG1, ARG2)
+
+
+ Purpose:
+ Tests whether each element of the first argument is not greater than or equal to the corresponding element of the second argument.
+
+ Result value: The result is 1 if each element of ARG1 is not greater than or equal to the corresponding element of ARG2. Otherwise, the result is 0.
+ Endian considerations:
+ None.
+
+
+
+ Supported type signatures for vec_all_nge
+
+
+
+
+
+
+
+
+
+ r
+
+
+
+
+ ARG1
+
+
+
+
+ ARG2
+
+
+
+ Example Implementation
+
+
+
+
+
+
+ int
+
+
+ vector double
+
+
+ vector double
+
+
+ sample implementation TBD
+
+
+
+
+ int
+
+
+ vector float
+
+
+ vector float
+
+
+ sample implementation TBD
+
+
+
+
+
+
+
+
+
+
+ vec_all_ngt
+ Vector ... Spelled Out Name TBD
+
+ r = vec_all_ngt (ARG1, ARG2)
+
+
+ Purpose:
+ Tests whether each element of the first argument is not greater than the corresponding element of the second argument.
+
+ Result value: The result is 1 if each element of ARG1 is not greater than the corresponding element of ARG2. Otherwise, the result is 0.
+ Endian considerations:
+ None.
+
+
+
+ Supported type signatures for vec_all_ngt
+
+
+
+
+
+
+
+
+
+ r
+
+
+
+
+ ARG1
+
+
+
+
+ ARG2
+
+
+
+ Example Implementation
+
+
+
+
+
+
+ int
+
+
+ vector double
+
+
+ vector double
+
+
+ sample implementation TBD
+
+
+
+
+ int
+
+
+ vector float
+
+
+ vector float
+
+
+ sample implementation TBD
+
+
+
+
+
+
+
+
+
+
+ vec_all_nle
+ Vector ... Spelled Out Name TBD
+
+ r = vec_all_nle (ARG1, ARG2)
+
+
+ Purpose:
+ Tests whether each element of the first argument is not less than or equal to the corresponding element of the second argument.
+
+ Result value: The result is 1 if each element of ARG1 is not less than or equal to the corresponding element of ARG2. Otherwise, the result is 0.
+ Endian considerations:
+ None.
+
+
+
+ Supported type signatures for vec_all_nle
+
+
+
+
+
+
+
+
+
+ r
+
+
+
+
+ ARG1
+
+
+
+
+ ARG2
+
+
+
+ Example Implementation
+
+
+
+
+
+
+ int
+
+
+ vector double
+
+
+ vector double
+
+
+ sample implementation TBD
+
+
+
+
+ int
+
+
+ vector float
+
+
+ vector float
+
+
+ sample implementation TBD
+
+
+
+
+
+
+
+
+
+
+ vec_all_nlt
+ Vector ... Spelled Out Name TBD
+
+ r = vec_all_nlt (ARG1, ARG2)
+
+
+ Purpose:
+ Tests whether each element of the first argument is not less than the corresponding element of the second argument.
+
+ Result value: The result is 1 if each element of ARG1 is not less than the corresponding element of ARG2. Otherwise, the result is 0.
+ Endian considerations:
+ None.
+
+
+
+ Supported type signatures for vec_all_nlt
+
+
+
+
+
+
+
+
+
+ r
+
+
+
+
+ ARG1
+
+
+
+
+ ARG2
+
+
+
+ Example Implementation
+
+
+
+
+
+
+ int
+
+
+ vector double
+
+
+ vector double
+
+
+ sample implementation TBD
+
+
+
+
+ int
+
+
+ vector float
+
+
+ vector float
+
+
+ sample implementation TBD
+
+
+
+
+
+
+
+
+
+
+ vec_all_numeric
+ Vector ... Spelled Out Name TBD
+
+ r = vec_all_numeric (ARG1)
+
+
+ Purpose:
+ Tests whether each element of the given vector is numeric (not a NaN).
+
+ Result value: The result is 1 if each element of ARG1 is numeric (not a NaN). Otherwise, the result is 0.
+ Endian considerations:
+ None.
+
+
+
+ Supported type signatures for vec_all_numeric
+
+
+
+
+
+
+
+
+ r
+
+
+
+
+ ARG1
+
+
+
+ Example Implementation
+
+
+
+
+
+
+ int
+
+
+ vector double
+
+
+ sample implementation TBD
+
+
+
+
+ int
+
+
+ vector float
+
+
+ sample implementation TBD
+
+
+
+
+
+
+
+
+
+
+ vec_and
+ Vector AND
+
+ r = vec_and (a, b)
+
+
+ Purpose:
+ Performs a bitwise AND of two vectors.
+
+ Result value:
+ The value of r is the bitwise AND
+ of a and b.
+
+ Endian considerations:
+ None.
+
+
+
+ Supported type signatures for vec_and
+
+
+
+
+
+
+
+
+
+
+ r
+
+
+
+
+ a
+
+
+
+
+ b
+
+
+
+
+ Example Implementation
+
+
+
+
+ Restrictions
+
+
+
+
+
+
+
+ vector bool char
+
+
+ vector bool char
+
+
+ vector bool char
+
+
+
+ xxland r,a,b
+
+
+
+
+
+
+
+ vector signed char
+
+
+ vector signed char
+
+
+ vector signed char
+
+
+
+ xxland r,a,b
+
+
+
+
+
+
+
+ vector unsigned char
+
+
+ vector unsigned char
+
+
+ vector unsigned char
+
+
+
+ xxland r,a,b
+
+
+
+
+
+
+
+ vector bool short
+
+
+ vector bool short
+
+
+ vector bool short
+
+
+
+ xxland r,a,b
+
+
+
+
+
+
+
+ vector signed short
+
+
+ vector signed short
+
+
+ vector signed short
+
+
+
+ xxland r,a,b
+
+
+
+
+
+
+
+ vector unsigned short
+
+
+ vector unsigned short
+
+
+ vector unsigned short
+
+
+
+ xxland r,a,b
+
+
+
+
+
+ vector signed int
+
+
+ vector signed int
+
+
+ vector signed int
+
+
+
+ xxland r,a,b
+
+
+
+
+
+
+
+ vector bool int
+
+
+ vector bool int
+
+
+ vector bool int
+
+
+
+ xxland r,a,b
+
+
+
+
+
+
+
+ vector unsigned int
+
+
+ vector unsigned int
+
+
+ vector unsigned int
+
+
+
+ xxland r,a,b
+
+
+
+
+
+
+
+ vector bool long long
+
+
+ vector bool long long
+
+
+ vector bool long long
+
+
+
+ xxland r,a,b
+
+
+
+ Phased in
+
+
+
+
+ vector signed long long
+
+
+ vector signed long long
+
+
+ vector signed long long
+
+
+
+ xxland r,a,b
+
+
+
+ Phased in
+
+
+
+
+ vector unsigned long long
+
+
+ vector unsigned long long
+
+
+ vector unsigned long long
+
+
+
+ xxland r,a,b
+
+
+
+ Phased in
+
+
+
+
+ vector float
+
+
+ vector float
+
+
+ vector float
+
+
+
+ xxland r,a,b
+
+
+
+
+
+
+
+ vector double
+
+
+ vector double
+
+
+ vector double
+
+
+
+ xxland r,a,b
+
+
+
+
+
+
+
+
+
+
+
+
+
+ vec_andc
+ Vector AND with Complement
+
+ r = vec_andc (a, b)
+
+
+ Purpose:
+ Performs a bitwise AND of one vector with the bitwise complement of
+ another vector.
+
+ Result value:
+ The value of r is the bitwise AND
+ of a with the bitwise complement
+ of b.
+
+ Endian considerations:
+ None.
+
+
+
+ Supported type signatures for vec_andc
+
+
+
+
+
+
+
+
+
+
+ r
+
+
+
+
+ a
+
+
+
+
+ b
+
+
+
+
+ Example Implementation
+
+
+
+
+ Restrictions
+
+
+
+
+
+
+
+ vector bool char
+
+
+ vector bool char
+
+
+ vector bool char
+
+
+
+ xxlandc r,a,b
+
+
+
+
+
+
+
+ vector signed char
+
+
+ vector signed char
+
+
+ vector signed char
+
+
+
+ xxlandc r,a,b
+
+
+
+
+
+
+
+ vector unsigned char
+
+
+ vector unsigned char
+
+
+ vector unsigned char
+
+
+
+ xxlandc r,a,b
+
+
+
+
+
+
+
+ vector bool short
+
+
+ vector bool short
+
+
+ vector bool short
+
+
+
+ xxlandc r,a,b
+
+
+
+
+
+
+
+ vector signed short
+
+
+ vector signed short
+
+
+ vector signed short
+
+
+
+ xxlandc r,a,b
+
+
+
+
+
+
+
+ vector unsigned short
+
+
+ vector unsigned short
+
+
+ vector unsigned short
+
+
+
+ xxlandc r,a,b
+
+
+
+
+
+ vector signed int
+
+
+ vector signed int
+
+
+ vector signed int
+
+
+
+ xxlandc r,a,b
+
+
+
+
+
+
+
+ vector bool int
+
+
+ vector bool int
+
+
+ vector bool int
+
+
+
+ xxlandc r,a,b
+
+
+
+
+
+
+
+ vector unsigned int
+
+
+ vector unsigned int
+
+
+ vector unsigned int
+
+
+
+ xxlandc r,a,b
+
+
+
+
+
+
+
+ vector bool long long
+
+
+ vector bool long long
+
+
+ vector bool long long
+
+
+
+ xxlandc r,a,b
+
+
+
+ Phased in
+
+
+
+
+ vector signed long long
+
+
+ vector signed long long
+
+
+ vector signed long long
+
+
+
+ xxlandc r,a,b
+
+
+
+ Phased in
+
+
+
+
+ vector unsigned long long
+
+
+ vector unsigned long long
+
+
+ vector unsigned long long
+
+
+
+ xxlandc r,a,b
+
+
+
+ Phased in
+
+
+
+
+ vector float
+
+
+ vector float
+
+
+ vector float
+
+
+
+ xxlandc r,a,b
+
+
+
+
+
+
+
+ vector double
+
+
+ vector double
+
+
+ vector double
+
+
+
+ xxlandc r,a,b
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+ vec_any_eq
+ Vector ... Spelled Out Name TBD
+
+ r = vec_any_eq (ARG1, ARG2)
+
+
+ Purpose:
+ Tests whether any set of corresponding elements of the given vectors is equal.
+
+ Result value: The result is 1 if any element of ARG1 is equal to the corresponding element of ARG2. Otherwise, the result is 0.
+ Endian considerations:
+ None.
+
+
+
+ Supported type signatures for vec_any_eq
+
+
+
+
+
+
+
+
+
+ r
+
+
+
+
+ ARG1
+
+
+
+
+ ARG2
+
+
+
+ Example Implementation
+
+
+
+
+
+
+ int
+
+
+ vector bool char
+
+
+ vector bool char
+
+
+ sample implementation TBD
+
+
+
+
+ int
+
+
+ vector signed char
+
+
+ vector signed char
+
+
+ sample implementation TBD
+
+
+
+
+ int
+
+
+ vector unsigned char
+
+
+ vector unsigned char
+
+
+ sample implementation TBD
+
+
+
+
+ int
+
+
+ vector bool int
+
+
+ vector bool int
+
+
+ sample implementation TBD
+
+
+
+
+ int
+
+
+ vector signed int
+
+
+ vector signed int
+
+
+ sample implementation TBD
+
+
+
+
+ int
+
+
+ vector unsigned int
+
+
+ vector unsigned int
+
+
+ sample implementation TBD
+
+
+
+
+ int
+
+
+ vector bool long long
+
+
+ vector bool long long
+
+
+ sample implementation TBD
+
+
+
+
+ int
+
+
+ vector signed long long
+
+
+ vector signed long long
+
+
+ sample implementation TBD
+
+
+
+
+ int
+
+
+ vector unsigned long long
+
+
+ vector unsigned long long
+
+
+ sample implementation TBD
+
+
+
+
+ int
+
+
+ vector pixel
+
+
+ vector pixel
+
+
+ sample implementation TBD
+
+
+
+
+ int
+
+
+ vector bool short
+
+
+ vector bool short
+
+
+ sample implementation TBD
+
+
+
+
+ int
+
+
+ vector signed short
+
+
+ vector signed short
+
+
+ sample implementation TBD
+
+
+
+
+ int
+
+
+ vector unsigned short
+
+
+ vector unsigned short
+
+
+ sample implementation TBD
+
+
+
+
+ int
+
+
+ vector double
+
+
+ vector double
+
+
+ sample implementation TBD
+
+
+
+
+ int
+
+
+ vector float
+
+
+ vector float
+
+
+ sample implementation TBD
+
+
+
+
+
+
+
+
+
+
+ vec_any_ge
+ Vector ... Spelled Out Name TBD
+
+ r = vec_any_ge (ARG1, ARG2)
+
+
+ Purpose:
+ Tests whether any element of the first argument is greater than or equal to the corresponding element of the second argument.
+
+ Result value: The result is 1 if any element of ARG1 is greater than or equal to the corresponding element of ARG2. Otherwise, the result is 0.
+ Endian considerations:
+ None.
+
+
+
+ Supported type signatures for vec_any_ge
+
+
+
+
+
+
+
+
+
+ r
+
+
+
+
+ ARG1
+
+
+
+
+ ARG2
+
+
+
+ Example Implementation
+
+
+
+
+
+
+ int
+
+
+ vector signed char
+
+
+ vector signed char
+
+
+ sample implementation TBD
+
+
+
+
+ int
+
+
+ vector unsigned char
+
+
+ vector unsigned char
+
+
+ sample implementation TBD
+
+
+
+
+ int
+
+
+ vector signed int
+
+
+ vector signed int
+
+
+ sample implementation TBD
+
+
+
+
+ int
+
+
+ vector unsigned int
+
+
+ vector unsigned int
+
+
+ sample implementation TBD
+
+
+
+
+ int
+
+
+ vector signed long long
+
+
+ vector signed long long
+
+
+ sample implementation TBD
+
+
+
+
+ int
+
+
+ vector unsigned long long
+
+
+ vector unsigned long long
+
+
+ sample implementation TBD
+
+
+
+
+ int
+
+
+ vector signed short
+
+
+ vector signed short
+
+
+ sample implementation TBD
+
+
+
+
+ int
+
+
+ vector unsigned short
+
+
+ vector unsigned short
+
+
+ sample implementation TBD
+
+
+
+
+ int
+
+
+ vector double
+
+
+ vector double
+
+
+ sample implementation TBD
+
+
+
+
+ int
+
+
+ vector float
+
+
+ vector float
+
+
+ sample implementation TBD
+
+
+
+
+
+
+
+
+
+
+ vec_any_gt
+ Vector ... Spelled Out Name TBD
+
+ r = vec_any_gt (ARG1, ARG2)
+
+
+ Purpose:
+ Tests whether any element of the first argument is greater than the corresponding element of the second argument.
+
+ Result value: The result is 1 if any element of ARG1 is greater than the corresponding element of ARG2. Otherwise, the result is 0.
+ Endian considerations:
+ None.
+
+
+
+ Supported type signatures for vec_any_gt
+
+
+
+
+
+
+
+
+
+ r
+
+
+
+
+ ARG1
+
+
+
+
+ ARG2
+
+
+
+ Example Implementation
+
+
+
+
+
+
+ int
+
+
+ vector signed char
+
+
+ vector signed char
+
+
+ sample implementation TBD
+
+
+
+
+ int
+
+
+ vector unsigned char
+
+
+ vector unsigned char
+
+
+ sample implementation TBD
+
+
+
+
+ int
+
+
+ vector signed int
+
+
+ vector signed int
+
+
+ sample implementation TBD
+
+
+
+
+ int
+
+
+ vector unsigned int
+
+
+ vector unsigned int
+
+
+ sample implementation TBD
+
+
+
+
+ int
+
+
+ vector signed long long
+
+
+ vector signed long long
+
+
+ sample implementation TBD
+
+
+
+
+ int
+
+
+ vector unsigned long long
+
+
+ vector unsigned long long
+
+
+ sample implementation TBD
+
+
+
+
+ int
+
+
+ vector signed short
+
+
+ vector signed short
+
+
+ sample implementation TBD
+
+
+
+
+ int
+
+
+ vector unsigned short
+
+
+ vector unsigned short
+
+
+ sample implementation TBD
+
+
+
+
+ int
+
+
+ vector double
+
+
+ vector double
+
+
+ sample implementation TBD
+
+
+
+
+ int
+
+
+ vector float
+
+
+ vector float
+
+
+ sample implementation TBD
+
+
+
+
+
+
+
+
+
+
+ vec_any_le
+ Vector ... Spelled Out Name TBD
+
+ r = vec_any_le (ARG1, ARG2)
+
+
+ Purpose:
+ Tests whether any element of the first argument is less than or equal to the corresponding element of the second argument.
+
+ Result value: The result is 1 if any element of ARG1 is less than or equal to the corresponding element of ARG2. Otherwise, the result is 0.
+ Endian considerations:
+ None.
+
+
+
+ Supported type signatures for vec_any_le
+
+
+
+
+
+
+
+
+
+ r
+
+
+
+
+ ARG1
+
+
+
+
+ ARG2
+
+
+
+ Example Implementation
+
+
+
+
+
+
+ int
+
+
+ vector signed char
+
+
+ vector signed char
+
+
+ sample implementation TBD
+
+
+
+
+ int
+
+
+ vector unsigned char
+
+
+ vector unsigned char
+
+
+ sample implementation TBD
+
+
+
+
+ int
+
+
+ vector signed int
+
+
+ vector signed int
+
+
+ sample implementation TBD
+
+
+
+
+ int
+
+
+ vector unsigned int
+
+
+ vector unsigned int
+
+
+ sample implementation TBD
+
+
+
+
+ int
+
+
+ vector signed long long
+
+
+ vector signed long long
+
+
+ sample implementation TBD
+
+
+
+
+ int
+
+
+ vector unsigned long long
+
+
+ vector unsigned long long
+
+
+ sample implementation TBD
+
+
+
+
+ int
+
+
+ vector signed short
+
+
+ vector signed short
+
+
+ sample implementation TBD
+
+
+
+
+ int
+
+
+ vector unsigned short
+
+
+ vector unsigned short
+
+
+ sample implementation TBD
+
+
+
+
+ int
+
+
+ vector double
+
+
+ vector double
+
+
+ sample implementation TBD
+
+
+
+
+ int
+
+
+ vector float
+
+
+ vector float
+
+
+ sample implementation TBD
+
+
+
+
+
+
+
+
+
+
+ vec_any_lt
+ Vector ... Spelled Out Name TBD
+
+ r = vec_any_lt (ARG1, ARG2)
+
+
+ Purpose:
+ Tests whether any element of the first argument is less than the corresponding element of the second argument.
+
+ Result value: The result is 1 if any element of ARG1 is less than the corresponding element of ARG2. Otherwise, the result is 0.
+ Endian considerations:
+ None.
+
+
+
+ Supported type signatures for vec_any_lt
+
+
+
+
+
+
+
+
+
+ r
+
+
+
+
+ ARG1
+
+
+
+
+ ARG2
+
+
+
+ Example Implementation
+
+
+
+
+
+
+ int
+
+
+ vector signed char
+
+
+ vector signed char
+
+
+ sample implementation TBD
+
+
+
+
+ int
+
+
+ vector unsigned char
+
+
+ vector unsigned char
+
+
+ sample implementation TBD
+
+
+
+
+ int
+
+
+ vector signed int
+
+
+ vector signed int
+
+
+ sample implementation TBD
+
+
+
+
+ int
+
+
+ vector unsigned int
+
+
+ vector unsigned int
+
+
+ sample implementation TBD
+
+
+
+
+ int
+
+
+ vector signed long long
+
+
+ vector signed long long
+
+
+ sample implementation TBD
+
+
+
+
+ int
+
+
+ vector unsigned long long
+
+
+ vector unsigned long long
+
+
+ sample implementation TBD
+
+
+
+
+ int
+
+
+ vector signed short
+
+
+ vector signed short
+
+
+ sample implementation TBD
+
+
+
+
+ int
+
+
+ vector unsigned short
+
+
+ vector unsigned short
+
+
+ sample implementation TBD
+
+
+
+
+ int
+
+
+ vector double
+
+
+ vector double
+
+
+ sample implementation TBD
+
+
+
+
+ int
+
+
+ vector float
+
+
+ vector float
+
+
+ sample implementation TBD
+
+
+
+
+
+
+
+
+
+
+ vec_any_nan
+ Vector ... Spelled Out Name TBD
+
+ r = vec_any_nan (ARG1)
+
+
+ Purpose:
+ Tests whether any element of the given vector is a NaN.
+
+ Result value: The result is 1 if any element of ARG1 is a NaN. Otherwise, the result is 0.
+ Endian considerations:
+ None.
+
+
+
+ Supported type signatures for vec_any_nan
+
+
+
+
+
+
+
+
+ r
+
+
+
+
+ ARG1
+
+
+
+ Example Implementation
+
+
+
+
+
+
+ int
+
+
+ vector double
+
+
+ sample implementation TBD
+
+
+
+
+ int
+
+
+ vector float
+
+
+ sample implementation TBD
+
+
+
+
+
+
+
+
+
+
+ vec_any_ne
+ Vector ... Spelled Out Name TBD
+
+ r = vec_any_ne (ARG1, ARG2)
+
+
+ Purpose:
+ Tests whether any set of corresponding elements of the given vectors is not equal.
+
+ Result value: The result is 1 if any element of ARG1 is not equal to the corresponding element of ARG2. Otherwise, the result is 0.
+ Endian considerations:
+ None.
+
+
+
+ Supported type signatures for vec_any_ne
+
+
+
+
+
+
+
+
+
+ r
+
+
+
+
+ ARG1
+
+
+
+
+ ARG2
+
+
+
+ Example Implementation
+
+
+
+
+
+
+ int
+
+
+ vector bool char
+
+
+ vector bool char
+
+
+ sample implementation TBD
+
+
+
+
+ int
+
+
+ vector signed char
+
+
+ vector signed char
+
+
+ sample implementation TBD
+
+
+
+
+ int
+
+
+ vector unsigned char
+
+
+ vector unsigned char
+
+
+ sample implementation TBD
+
+
+
+
+ int
+
+
+ vector bool int
+
+
+ vector bool int
+
+
+ sample implementation TBD
+
+
+
+
+ int
+
+
+ vector signed int
+
+
+ vector signed int
+
+
+ sample implementation TBD
+
+
+
+
+ int
+
+
+ vector unsigned int
+
+
+ vector unsigned int
+
+
+ sample implementation TBD
+
+
+
+
+ int
+
+
+ vector bool long long
+
+
+ vector bool long long
+
+
+ sample implementation TBD
+
+
+
+
+ int
+
+
+ vector signed long long
+
+
+ vector signed long long
+
+
+ sample implementation TBD
+
+
+
+
+ int
+
+
+ vector unsigned long long
+
+
+ vector unsigned long long
+
+
+ sample implementation TBD
+
+
+
+
+ int
+
+
+ vector pixel
+
+
+ vector pixel
+
+
+ sample implementation TBD
+
+
+
+
+ int
+
+
+ vector bool short
+
+
+ vector bool short
+
+
+ sample implementation TBD
+
+
+
+
+ int
+
+
+ vector signed short
+
+
+ vector signed short
+
+
+ sample implementation TBD
+
+
+
+
+ int
+
+
+ vector unsigned short
+
+
+ vector unsigned short
+
+
+ sample implementation TBD
+
+
+
+
+ int
+
+
+ vector double
+
+
+ vector double
+
+
+ sample implementation TBD
+
+
+
+
+ int
+
+
+ vector float
+
+
+ vector float
+
+
+ sample implementation TBD
+
+
+
+
+
+
+
+
+
+
+ vec_any_nge
+ Vector ... Spelled Out Name TBD
+
+ r = vec_any_nge (ARG1, ARG2)
+
+
+ Purpose:
+ Tests whether any element of the first argument is not greater than or equal to the corresponding element of the second argument.
+
+ Result value: The result is 1 if any element of ARG1 is not greater than or equal to the corresponding element of ARG2. Otherwise, the result is 0.
+ Endian considerations:
+ None.
+
+
+
+ Supported type signatures for vec_any_nge
+
+
+
+
+
+
+
+
+
+ r
+
+
+
+
+ ARG1
+
+
+
+
+ ARG2
+
+
+
+ Example Implementation
+
+
+
+
+
+
+ int
+
+
+ vector double
+
+
+ vector double
+
+
+ sample implementation TBD
+
+
+
+
+ int
+
+
+ vector float
+
+
+ vector float
+
+
+ sample implementation TBD
+
+
+
+
+
+
+
+
+
+
+ vec_any_ngt
+ Vector ... Spelled Out Name TBD
+
+ r = vec_any_ngt (ARG1, ARG2)
+
+
+ Purpose:
+ Tests whether any element of the first argument is not greater than the corresponding element of the second argument.
+
+ Result value: The result is 1 if any element of ARG1 is not greater than the corresponding element of ARG2. Otherwise, the result is 0.
+ Endian considerations:
+ None.
+
+
+
+ Supported type signatures for vec_any_ngt
+
+
+
+
+
+
+
+
+
+ r
+
+
+
+
+ ARG1
+
+
+
+
+ ARG2
+
+
+
+ Example Implementation
+
+
+
+
+
+
+ int
+
+
+ vector double
+
+
+ vector double
+
+
+ sample implementation TBD
+
+
+
+
+ int
+
+
+ vector float
+
+
+ vector float
+
+
+ sample implementation TBD
+
+
+
+
+
+
+
+
+
+
+ vec_any_nle
+ Vector ... Spelled Out Name TBD
+
+ r = vec_any_nle (ARG1, ARG2)
+
+
+ Purpose:
+ Tests whether any element of the first argument is not less than or equal to the corresponding element of the second argument.
+
+ Result value: The result is 1 if any element of ARG1 is not less than or equal to the corresponding element of ARG2. Otherwise, the result is 0.
+ Endian considerations:
+ None.
+
+
+
+ Supported type signatures for vec_any_nle
+
+
+
+
+
+
+
+
+
+ r
+
+
+
+
+ ARG1
+
+
+
+
+ ARG2
+
+
+
+ Example Implementation
+
+
+
+
+
+
+ int
+
+
+ vector double
+
+
+ vector double
+
+
+ sample implementation TBD
+
+
+
+
+ int
+
+
+ vector float
+
+
+ vector float
+
+
+ sample implementation TBD
+
+
+
+
+
+
+
+
+
+
+ vec_any_nlt
+ Vector ... Spelled Out Name TBD
+
+ r = vec_any_nlt (ARG1, ARG2)
+
+
+ Purpose:
+ Tests whether any element of the first argument is not less than the corresponding element of the second argument.
+
+ Result value: The result is 1 if any element of ARG1 is not less than the corresponding element of ARG2. Otherwise, the result is 0.
+ Endian considerations:
+ None.
+
+
+
+ Supported type signatures for vec_any_nlt
+
+
+
+
+
+
+
+
+
+ r
+
+
+
+
+ ARG1
+
+
+
+
+ ARG2
+
+
+
+ Example Implementation
+
+
+
+
+
+
+ int
+
+
+ vector double
+
+
+ vector double
+
+
+ sample implementation TBD
+
+
+
+
+ int
+
+
+ vector float
+
+
+ vector float
+
+
+ sample implementation TBD
+
+
+
+
+
+
+
+
+
+
+ vec_any_numeric
+ Vector ... Spelled Out Name TBD
+
+ r = vec_any_numeric (ARG1)
+
+
+ Purpose:
+ Tests whether any element of the given vector is numeric (not a NaN).
+
+ Result value: The result is 1 if any element of ARG1 is numeric (not a NaN). Otherwise, the result is 0.
+ Endian considerations:
+ None.
+
+
+
+ Supported type signatures for vec_any_numeric
+
+
+
+
+
+
+
+
+ r
+

 vector bool long long
+
+
+ ARG1
+


 xxlandc r,a,b

+
+ Example Implementation

 Phased in

+
+
 vector signed long long


 vector signed long long
+ int
 vector signed long long
+ vector double

 xxlandc r,a,b

+ sample implementation TBD

 Phased in

 vector unsigned long long


 vector unsigned long long
+ int
 vector unsigned long long
+ vector float

 xxlandc r,a,b

+ sample implementation TBD

 Phased in

+
+
+
+
+
+
+
+
+ vec_any_out
+ Vector ... Spelled Out Name TBD
+
+ r = vec_any_out (ARG1, ARG2)
+
+
+ Purpose:
+ Tests whether the value of any element of a given vector is outside of a given range.
+
+ Result value: The result is 1 if the value of any element of ARG1 is greater than the value of the corresponding element of ARG2 or less than the negative of the value of the corresponding element of ARG2. Otherwise, the result is 0.
+ Endian considerations:
+ None.
+
+
+
+ Supported type signatures for vec_any_out
+
+
+
+
+
+

 vector float
+
+
+ r
+

 vector float
+
+
+ ARG1
+

 vector float
+
+
+ ARG2
+


 xxlandc r,a,b

+
+ Example Implementation


+
+
 vector double
+ int
 vector double
+ vector float
 vector double
+ vector float

 xxlandc r,a,b

+ sample implementation TBD



+
@@ 2250,64 +5880,196 @@ xmlns:xlink="http://www.w3.org/1999/xlink" xml:id="section_vec_intrinsics">
 Supported type signatures for vec_ceil

+ Supported type signatures for vec_ceil
+
+
+
+
+
+
+
+
+ r
+
+
+
+
+ a
+
+
+
+
+ Example Implementation
+
+
+
+
+
+
+
+ vector float
+
+
+ vector float
+
+
+
+ xvrspip r,a
+
+
+
+
+
+ vector double
+
+
+ vector double
+
+
+
+ xvrdpip r,a
+
+
+
+
+
+
+
+
+
+
+
+ vec_cipher_be
+ Vector ... Spelled Out Name TBD
+
+ r = vec_cipher_be (ARG1, ARG2)
+
+
+ Purpose:
+ Performs one round of the AES cipher operation on an intermediate state state_array by using a given round_key.
+
+
+ Endian considerations:
+ None.
+
+
+
+ Supported type signatures for vec_cipher_be
+
+
+
+
+
+
+
+
+
+ r
+
+
+
+
+ ARG1
+
+
+
+
+ ARG2
+
+
+
+ Example Implementation
+
+
+
+
+
+
+ vector unsigned char
+
+
+ vector unsigned char
+
+
+ vector unsigned char
+
+
+ sample implementation TBD
+
+
+
+
+
+
+
+
+
+
+ vec_cipherlast_be
+ Vector ... Spelled Out Name TBD
+
+ r = vec_cipherlast_be (ARG1, ARG2)
+
+
+ Purpose:
+ Performs the final round of the AES cipher operation on an intermediate state state_array using the specified round_key.
+
+
+ Endian considerations:
+ None.
+
+
+
+ Supported type signatures for vec_cipherlast_be
+
+

+
r

+

 a

+
+ ARG1
+

 Example Implementation

+
+ ARG2
+
+
+
+ Example Implementation
 vector float


 vector float



 xvrspip r,a

+ vector unsigned char


 vector double
+ vector unsigned char
 vector double
+ vector unsigned char

 xvrdpip r,a

+ sample implementation TBD

+

+
vec_cmpb
Vector Compare Bytes
@@ 9113,6 +12875,70 @@ xmlns:xlink="http://www.w3.org/1999/xlink" xml:id="section_vec_intrinsics">
+
+ vec_ld
+ Vector Load
+
+ r = vec_ld (a, b)
+
+
+ Purpose:
+ Performs a 16byte load at a 16bytealigned address.
+
+ Result value: The scalar value
+ a
+ is added to the pointer value b, and
+ the result is rounded down to the nearest multiple of 16. The 16byte
+ value at this address is loaded into r.
+
+ Endian considerations:
+ None.
+
+
+
+ Supported type signatures for vec_loge
+
+
+
+
+
+
+
+
+ r
+
+
+
+
+ a
+
+
+
+ Example Implementation
+
+
+
+
+
+
+ vector float
+
+
+ vector float
+
+
+
+ vlogefp r,a
+
+
+
+
+
+
+
+
+
+
vec_loge
Vector Base2 Logarithm Estimate
@@ 11032,6 +14858,54 @@ xmlns:xlink="http://www.w3.org/1999/xlink" xml:id="section_vec_intrinsics">
+
+ vec_mfvscr
+ Vector ... Spelled Out Name TBD
+
+ r = vec_mfvscr ()
+
+
+ Purpose:
+ Copies the contents of the Vector Status and Control Register into the result vector.
+
+ Result value: The highorder 16 bits of the VSCR are copied into the seventh element of the result. The loworder 16 bits of the VSCR are copied into the eighth element of the result. All other elements are set to zero.
+ Endian considerations:
+ None.
+
+
+
+ Supported type signatures for vec_mfvscr
+
+
+
+
+
+
+
+ r
+
+
+
+ Example Implementation
+
+
+
+
+
+
+ vector unsigned short
+
+
+ sample implementation TBD
+
+
+
+
+
+
+
+
+
vec_min
Vector Minimum
@@ 11543,17 +15417,123 @@ xmlns:xlink="http://www.w3.org/1999/xlink" xml:id="section_vec_intrinsics">
vector unsigned int
 vector unsigned char
+ vector unsigned char
+
+
+ vector unsigned char
+
+
+ vector unsigned int
+
+
+
+ vmsumubm r,a,b,c
+
+
+
+
+
+ vector unsigned int
+
+
+ vector unsigned short
+
+
+ vector unsigned short
+
+
+ vector unsigned int
+
+
+
+ vmsumuhm r,a,b,c
+
+
+
+
+
+
+
+
+
+
+
+ vec_msums
+ Vector MultiplySum Saturated
+
+ r = vec_msums (a, b, c)
+
+
+ Purpose:
+ Returns a vector containing the results of performing a saturated
+ multiplysum operation using the source vectors.
+
+ Result value: Assume that the
+ elements of each vector are numbered beginning with 0. The value of each
+ element n of r
+ is obtained as follows. For p =
+ 2n to 2n+1, multiply element
+ p of a by element
+ p of b. Add the
+ sum of these products to element n of
+ c. All additions are performed using
+ 32bit saturated arithmetic.
+ Endian considerations:
+ None.
+
+
+
+ Supported type signatures for vec_msums
+
+
+
+
+
+
+
+
+
+
+ r
+
+
+
+
+ a
+
+
+
+
+ b
+
+
+
+
+ c
+
+
+
+ Example Implementation
+
+
+
+
+
+
+ vector signed int
+
+
+ vector signed short
 vector unsigned char
+ vector signed short
 vector unsigned int
+ vector signed int
 vmsumubm r,a,b,c
+ vmsumshs r,a,b,c
@@ 11572,7 +15552,7 @@ xmlns:xlink="http://www.w3.org/1999/xlink" xml:id="section_vec_intrinsics">
 vmsumuhm r,a,b,c
+ vmsumuhs r,a,b,c
@@ 11583,59 +15563,37 @@ xmlns:xlink="http://www.w3.org/1999/xlink" xml:id="section_vec_intrinsics">

 vec_msums
 Vector MultiplySum Saturated
+
+ vec_mtvscr
+ Vector ... Spelled Out Name TBD
 r = vec_msums (a, b, c)
+ r = vec_mtvscr (ARG1)
Purpose:
 Returns a vector containing the results of performing a saturated
 multiplysum operation using the source vectors.
+ Copies the given value into the Vector Status and Control Register. The loworder 32 bits of ARG1 are copied into the VSCR.
 Result value: Assume that the
 elements of each vector are numbered beginning with 0. The value of each
 element n of r
 is obtained as follows. For p =
 2n to 2n+1, multiply element
 p of a by element
 p of b. Add the
 sum of these products to element n of
 c. All additions are performed using
 32bit saturated arithmetic.
+
Endian considerations:
None.
 Supported type signatures for vec_msums

+ Supported type signatures for vec_mtvscr
+



+
r


 a




 b



+
 c
+ ARG1
@@ 11646,40 +15604,112 @@ xmlns:xlink="http://www.w3.org/1999/xlink" xml:id="section_vec_intrinsics">
 vector signed int
+ void
 vector signed short
+ vector bool char
+
+ sample implementation TBD
+
+
+
 vector signed short
+ void
 vector signed int
+ vector signed char

 vmsumshs r,a,b,c

+ sample implementation TBD
+
+ void
+
+
+ vector unsigned char
+
+
+ sample implementation TBD
+
+
+
+
+ void
+
+
+ vector bool int
+
+
+ sample implementation TBD
+
+
+
+
+ void
+
+
+ vector signed int
+
+
+ sample implementation TBD
+
+
+
+
+ void
+
vector unsigned int
+
+ sample implementation TBD
+
+
+
 vector unsigned short
+ void
 vector unsigned short
+ vector pixel
+
+ sample implementation TBD
+
+
+
 vector unsigned int
+ void
+
+
+ vector bool short

 vmsumuhs r,a,b,c

+ sample implementation TBD
+
+
+
+
+ void
+
+
+ vector signed short
+
+
+ sample implementation TBD
+
+
+
+
+ void
+
+
+ vector unsigned short
+
+
+ sample implementation TBD
@@ 12701,18 +16731,150 @@ xmlns:xlink="http://www.w3.org/1999/xlink" xml:id="section_vec_intrinsics">
 vector float
+ vector float
+
+
+ vector float
+
+
+ vector float
+
+
+
+ xxlnand r,a,b
+
+
+
+
+
+
+
+
+
+
+
+ vec_ncipher_be
+ Vector ... Spelled Out Name TBD
+
+ r = vec_ncipher_be (ARG1, ARG2)
+
+
+ Purpose:
+ Performs one round of the AES inverse cipher operation on an intermediate state state_array using a given round_key.
+
+
+ Endian considerations:
+ None.
+
+
+
+ Supported type signatures for vec_ncipher_be
+
+
+
+
+
+
+
+
+
+ r
+
+
+
+
+ ARG1
+
+
+
+
+ ARG2
+
+
+
+ Example Implementation
+
+
+
+
+
+
+ vector unsigned char
+
+
+ vector unsigned char
+
+
+ vector unsigned char
+
+
+ sample implementation TBD
+
+
+
+
+
+
+
+
+
+
+ vec_ncipherlast_be
+ Vector ... Spelled Out Name TBD
+
+ r = vec_ncipherlast_be (ARG1, ARG2)
+
+
+ Purpose:
+ Performs the final round of the AES inverse cipher operation on an intermediate state state_array using the specified round_key.
+
+
+ Endian considerations:
+ None.
+
+
+
+ Supported type signatures for vec_ncipherlast_be
+
+
+
+
+
+
+
+
+
+ r
+
+
+
+
+ ARG1
+
+
+
+
+ ARG2
+
+
+
+ Example Implementation
+
+
+
+
+
+
+ vector unsigned char
 vector float
+ vector unsigned char
 vector float
+ vector unsigned char

 xxlnand r,a,b

+ sample implementation TBD
@@ 15695,6 +19857,114 @@ xmlns:xlink="http://www.w3.org/1999/xlink" xml:id="section_vec_intrinsics">
+
+ vec_pmsum_be
+ Vector ... Spelled Out Name TBD
+
+ r = vec_pmsum_be (ARG1, ARG2)
+
+
+ Purpose:
+ Performs the exclusiveOR operation (implementing polynomial addition) on each evenodd pair of the polynomialmultiplication result of the corresponding elements.
+
+
+ Endian considerations:
+ None.
+
+
+
+ Supported type signatures for vec_pmsum_be
+
+
+
+
+
+
+
+
+
+ r
+
+
+
+
+ ARG1
+
+
+
+
+ ARG2
+
+
+
+ Example Implementation
+
+
+
+
+
+
+ vector unsigned int
+
+
+ vector unsigned short
+
+
+ vector unsigned short
+
+
+ sample implementation TBD
+
+
+
+
+ vector unsigned __int128
+
+
+ vector unsigned long long
+
+
+ vector unsigned long long
+
+
+ sample implementation TBD
+
+
+
+
+ vector unsigned long long
+
+
+ vector unsigned int
+
+
+ vector unsigned int
+
+
+ sample implementation TBD
+
+
+
+
+ vector unsigned short
+
+
+ vector unsigned char
+
+
+ vector unsigned char
+
+
+ sample implementation TBD
+
+
+
+
+
+
+
+
+
vec_popcnt
Vector Population Count
@@ 17438,6 +21708,63 @@ xmlns:xlink="http://www.w3.org/1999/xlink" xml:id="section_vec_intrinsics">
+
+ vec_sbox_be
+ Vector ... Spelled Out Name TBD
+
+ r = vec_sbox_be (ARG1)
+
+
+ Purpose:
+ Performs the SubBytes operation, as defined in Federal Information Processing Standards FIPS197, on a state_array.
+
+
+ Endian considerations:
+ None.
+
+
+
+ Supported type signatures for vec_sbox_be
+
+
+
+
+
+
+
+
+ r
+
+
+
+
+ ARG1
+
+
+
+ Example Implementation
+
+
+
+
+
+
+ vector unsigned char
+
+
+ vector unsigned char
+
+
+ sample implementation TBD
+
+
+
+
+
+
+
+
+
vec_sel
Vector Select
@@ 18170,6 +22497,98 @@ xmlns:xlink="http://www.w3.org/1999/xlink" xml:id="section_vec_intrinsics">
+
+ vec_shasigma_be
+ Vector ... Spelled Out Name TBD
+
+ r = vec_shasigma_be (ARG1, ARG2, ARG3)
+
+
+ Purpose:
+ Performs a Secure Hash computation in accordance with Federal Information Processing Standards FIPS1803.
+
+
+ Endian considerations:
+ None.
+
+
+
+ Supported type signatures for vec_shasigma_be
+
+
+
+
+
+
+
+
+
+
+ r
+
+
+
+
+ ARG1
+
+
+
+
+ ARG2
+
+
+
+
+ ARG3
+
+
+
+ Example Implementation
+
+
+
+
+
+
+ vector unsigned int
+
+
+ vector unsigned int
+
+
+ const int
+
+
+ const int
+
+
+ sample implementation TBD
+
+
+
+
+ vector unsigned long long
+
+
+ vector unsigned long long
+
+
+ const int
+
+
+ const int
+
+
+ sample implementation TBD
+
+
+
+
+
+
+
+
+
vec_signed
Vector Convert FloatingPoint to Signed Integer