From 944e4b238d73c51c0f00be558a05d077b1d7c174 Mon Sep 17 00:00:00 2001 From: "Paul A. Clarke" Date: Tue, 5 May 2020 05:23:57 -0500 Subject: [PATCH 1/3] Add examples for vec_double{e,h,l,o} Fixes #16. Signed-off-by: Paul A. Clarke --- Intrinsics_Reference/ch_vec_reference.xml | 180 ++++++++++++++++++++++ 1 file changed, 180 insertions(+) diff --git a/Intrinsics_Reference/ch_vec_reference.xml b/Intrinsics_Reference/ch_vec_reference.xml index 71ae3b8..dd65f8e 100644 --- a/Intrinsics_Reference/ch_vec_reference.xml +++ b/Intrinsics_Reference/ch_vec_reference.xml @@ -11627,6 +11627,51 @@ xmlns:xlink="http://www.w3.org/1999/xlink" xml:id="VIPR.vec-ref"> the converted values of elements 0 and 2 of a. + An example where a + is of type vector signed int follows: + + + + + + + + + + + + + a + + + 00000001 + + + (ignored) + + + FFFFFFFF + + + (ignored) + + + + + r + + + 1.0 + + + -1.0 + + + + + + + Endian considerations: Differences in element numbering require different implementations for big- and little-endian code generation. @@ -11779,6 +11824,51 @@ xmlns:xlink="http://www.w3.org/1999/xlink" xml:id="VIPR.vec-ref"> the converted values of elements 0 and 1 of a. + An example where a + is of type vector signed int follows: + + + + + + + + + + + + + a + + + 00000001 + + + FFFFFFFF + + + (ignored) + + + (ignored) + + + + + r + + + 1.0 + + + -1.0 + + + + + + + Endian considerations: Differences in element numbering require different implementations for big- and little-endian code generation. @@ -11937,6 +12027,51 @@ xmlns:xlink="http://www.w3.org/1999/xlink" xml:id="VIPR.vec-ref"> the converted values of elements 2 and 3 of a. + An example where a + is of type vector signed int follows: + + + + + + + + + + + + + a + + + (ignored) + + + (ignored) + + + 00000001 + + + FFFFFFFF + + + + + r + + + 1.0 + + + -1.0 + + + + + + + Endian considerations: Differences in element numbering require different implementations for big- and little-endian code generation. @@ -12095,6 +12230,51 @@ xmlns:xlink="http://www.w3.org/1999/xlink" xml:id="VIPR.vec-ref"> the converted values of elements 1 and 3 of a. + An example where a + is of type vector signed int follows: + + + + + + + + + + + + + a + + + (ignored) + + + 00000001 + + + (ignored) + + + FFFFFFFF + + + + + r + + + 1.0 + + + -1.0 + + + + + + + Endian considerations: Differences in element numbering require different implementations for big- and little-endian code generation. -- 2.34.1 From 48744ea198b462854e4a8f752dae020173a8a81b Mon Sep 17 00:00:00 2001 From: Bill Schmidt Date: Tue, 5 May 2020 10:28:58 -0500 Subject: [PATCH 2/3] Fix code generation for vec_pack_to_short_fp32 Fixes #45. --- Intrinsics_Reference/ch_vec_reference.xml | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-) diff --git a/Intrinsics_Reference/ch_vec_reference.xml b/Intrinsics_Reference/ch_vec_reference.xml index dd65f8e..7fdcff8 100644 --- a/Intrinsics_Reference/ch_vec_reference.xml +++ b/Intrinsics_Reference/ch_vec_reference.xml @@ -23578,16 +23578,16 @@ xmlns:xlink="http://www.w3.org/1999/xlink" xml:id="VIPR.vec-ref"> - vctuxs t,a,0 - vctuxs u,b,0 - vpkswss r,u,t + xvcvsphp t,a + xvcvsphp u,b + vpkuwum r,t,u - vctuxs t,a,0 - vctuxs u,b,0 - vpkswss r,t,u + xvcvsphp t,a + xvcvsphp u,b + vpkuwum r,u,t -- 2.34.1 From 3ce06a1ef1e0a0a06a6420b6b5d3136031ca264d Mon Sep 17 00:00:00 2001 From: "Paul A. Clarke" Date: Tue, 5 May 2020 12:30:48 -0500 Subject: [PATCH 3/3] Add examples for vec_extract_fp32_from_short{h,l} Also added table headers to more clearly indicate element ordering. Fixes #17. Signed-off-by: Paul A. Clarke --- Intrinsics_Reference/ch_vec_reference.xml | 248 ++++++++++++++++++++++ 1 file changed, 248 insertions(+) diff --git a/Intrinsics_Reference/ch_vec_reference.xml b/Intrinsics_Reference/ch_vec_reference.xml index 71ae3b8..4d31864 100644 --- a/Intrinsics_Reference/ch_vec_reference.xml +++ b/Intrinsics_Reference/ch_vec_reference.xml @@ -13208,6 +13208,130 @@ xmlns:xlink="http://www.w3.org/1999/xlink" xml:id="VIPR.vec-ref"> interpreted as 16-bit floating-point numbers in IEEE format, and extended to single-precision format, returning a vector with four single-precision IEEE numbers. + An example follows: + + + + + + + + + + + + + + + + + + + halfword index + + + 0 + + + 1 + + + 2 + + + 3 + + + 4 + + + 5 + + + 6 + + + 7 + + + + + word index + + + 0 + + + 1 + + + 2 + + + 3 + + + + + + + a + + + 3800 + (0.5) + + + 4200 + (3.0) + + + 4700 + (7.0) + + + 4B80 + (15.0) + + + 4FC0 + (31.0) + + + 53E0 + (63.0) + + + 57F0 + (127.0) + + + 5BF8 + (255.0) + + + + + r + + + 0.5 + + + 3.0 + + + 7.0 + + + 15.0 + + + + + + + Endian considerations: The element numbering within a register is left-to-right for big-endian targets, and right-to-left for little-endian targets. @@ -13309,6 +13433,130 @@ xmlns:xlink="http://www.w3.org/1999/xlink" xml:id="VIPR.vec-ref"> interpreted as 16-bit floating-point numbers in IEEE format, and extended to single-precision format, returning a vector with four single-precision IEEE numbers. + An example follows: + + + + + + + + + + + + + + + + + + + halfword index + + + 0 + + + 1 + + + 2 + + + 3 + + + 4 + + + 5 + + + 6 + + + 7 + + + + + word index + + + 0 + + + 1 + + + 2 + + + 3 + + + + + + + a + + + 3800 + (0.5) + + + 4200 + (3.0) + + + 4700 + (7.0) + + + 4B80 + (15.0) + + + 4FC0 + (31.0) + + + 53E0 + (63.0) + + + 57F0 + (127.0) + + + 5BF8 + (255.0) + + + + + r + + + 31.0 + + + 63.0 + + + 127.0 + + + 255.0 + + + + + + + Endian considerations: The element numbering within a register is left-to-right for big-endian targets, and right-to-left for little-endian targets. -- 2.34.1