This chapter contains reference material for each supported vector intrinsic. The information for each intrinsic includes: The intrinsic name and extended name; A type-free example of the intrinsic's usage; A description of the intrinsic's purpose; A description of the value(s) returned from the intrinsic, if any; A description of any unusual characteristics of the intrinsic when the target is big-endian versus little-endian. If the semantics of the intrinsic in big-endian and little-endian modes are identical, the description will read "None."; Optionally, additional explanatory notes about the intrinsic; and A table of supported type signatures for the intrinsic. Most intrinsics are overloaded, supporting multiple type signatures. The types of the input arguments always determine the type of the result argument; that is, it is not possible to define two intrinsic overloads with the same input argument types and different result argument types. The type-free example of the intrinsic's usage uses the convention that r represents the result of the intrinsic, and a, b, etc., represent the input arguments. The allowed type combinations of these variables are shown as rows in the table of supported type signatures. Each row contains at least one example implementation. This shows one way that a conforming compiler might achieve the intended semantics of the intrinsic, but compilers are not required to generate this code specifically. The letters r, a, b, etc., in the examples represent vector registers containing the values of those variables. The letters t, u, etc., represent vector registers containing temporary intermediate results. The same register is assumed to be used for each instance of one of these letters. When implementations differ for big- and little-endian targets, separate example implementations are shown for each endianness. The implementations show a sequence of instructions that may be used in the implementation of a particular intrinsic, and usually include vector instructions. When trying to determine which intrinsic to use, it can be useful to have a cross-reference from a specific vector instruction to the intrinsics whose implementations make use of it. This manual contains such a cross-reference () for the programmer's convenience. For some intrinsics, restrictions are shown in the implementation table for some of the rows. Possible restrictions include: ISA 3.0 or later. This form is only available starting with PowerISA 3.0, corresponding to Power servers built with POWER9 architecture. The Power Vector Library (see provides equivalent POWER7/POWER8 implementations for many ISA 3.0 vector instructions, which may be preferred for portability. ISA 3.1 or later. This form is only available starting with PowerISA 3.1, corresponding to Power servers built with Power10 architecture. The Power Vector Library (see provides equivalent POWER7/POWER8/POWER9 implementations for many ISA 3.1 vector instructions, which may be preferred for portability. Deprecated. This form of the intrinsic is currently available, but may be removed in the future. Programmers are discouraged from using it. Note that this document does not make distinctions about availability of intrinsic functions prior to ISA 2.07, as implemented on POWER8 processors. Many intrinsics not restricted to ISA 3.0 or later are also available on earlier processor generations. However, any interfaces that make use of "vector long long" data types are only available beginning with ISA 2.07.

Some intrinsic descriptions indicate that either modular arithmetic or saturating arithmetic is used. This refers to what happens when an operation overflows the number of available bits. A modular operation that overflows truncates the result on the left, also known as wrapping the result. A saturating operation that overflows produces the largest (or smallest) possible result representable in the output element type. Operands are sometimes represented as having a const int type. In such cases, the programmer is expected to provide an integer literal. When the literal has specific required bounds, this is often represented instead by such phrases as "5-bit signed literal" or "2-bit unsigned literal" to specify them. In such cases, compilers are encouraged to at least warn upon detecting an out-of-range value. Providing a variable when a literal is required is a compile-time error.

Vector Absolute Value r = vec_abs (a) Purpose: Returns a vector r that contains the absolute values of the contents of the vector a. Result value: The value of each element of r is the absolute value of the corresponding element of a. For integer vectors, the arithmetic is modular. Endian considerations: None. vspltisw vec_abs vsububm vec_abs vmaxsb vec_abs vsubuwm vec_abs vmaxsw vec_abs vsubudm vec_abs vmaxsd vec_abs xvabssp vec_abs xvabsdp vec_abs r a Example Implementation vector signed char vector signed char vspltisw t,0 vsububm t,t,a vmaxsb r,t,a vector signed short vector signed short vspltisw t,0 vsubuhm t,t,a vmaxsh r,t,a vector signed int vector signed int vspltisw t,0 vsubuwm t,t,a vmaxsw r,t,a vector signed long long vector signed long long vspltisw t,0 vsubudm t,t,a vmaxsd r,t,a vector float vector float xvabssp r,a vector double vector double xvabsdp r,a

Vector Absolute Difference r = vec_absd (a, b) Purpose: Computes the absolute difference of two vectors. Result value: The value of each element of r is the absolute difference of the corresponding elements of a and b, using modular arithmetic. Endian considerations: None. vabsdub vec_absd vabsduh vec_absd vabsduw vec_absd r a b Example Implementation Restrictions vector unsigned char vector unsigned char vector unsigned char vabsdub r,a,b ISA 3.0 or later vector unsigned short vector unsigned short vector unsigned short vabsduh r,a,b ISA 3.0 or later vector unsigned int vector unsigned int vector unsigned int vabsduw r,a,b ISA 3.0 or later

Vector Absolute Value Saturated r = vec_abss (a) Purpose: Returns a vector r that contains the saturated absolute values of the contents of the vector a. Result value: The value of each element of r is the saturated absolute value of the corresponding element of a. Endian considerations: None. vspltisb vec_abss vsubsbs vec_abss vmaxsb vec_abss vspltish vec_abss vsubshs vec_abss vmaxsh vec_abss vspltisw vec_abss vsubsws vec_abss vmaxsw vec_abss r a Example Implementation vector signed char vector signed char vspltisb t,0 vsubsbs t,t,a vmaxsb r,t,a vector signed short vector signed short vspltish t,0 vsubshs t,t,a vmaxsh r,t,a vector signed int vector signed int vspltisw t,0 vsubsws t,t,a vmaxsw r,t,a

Vector Addition r = vec_add (a, b) Purpose: Computes the sum of two vectors. Result value: The value of each element of r is the sum of the corresponding elements of a and b. Modular arithmetic is used for both signed and unsigned integers. Endian considerations: None. vaddubm vec_add vadduhm vec_add vadduwm vec_add vaddudm vec_add vadduqm vec_add xvaddsp vec_add xvadddp vec_add r a b Example Implementation vector signed char vector signed char vector signed char vaddubm r,a,b vector unsigned char vector unsigned char vector unsigned char vaddubm r,a,b vector signed short vector signed short vector signed short vadduhm r,a,b vector unsigned short vector unsigned short vector unsigned short vadduhm r,a,b vector signed int vector signed int vector signed int vadduwm r,a,b vector unsigned int vector unsigned int vector unsigned int vadduwm r,a,b vector signed long long vector signed long long vector signed long long vaddudm r,a,b vector unsigned long long vector unsigned long long vector unsigned long long vaddudm r,a,b vector signed __int128 vector signed __int128 vector signed __int128 vadduqm r,a,b vector unsigned __int128 vector unsigned __int128 vector unsigned __int128 vadduqm r,a,b vector float vector float vector float xvaddsp r,a,b vector double vector double vector double xvadddp r,a,b

Vector Add Carrying r = vec_addc (a, b) Purpose: Returns a vector of carries produced by adding two vectors. Result value: The value of each element of r is the carry produced by adding the corresponding elements of a and b (1 if there is a carry, 0 otherwise). Endian considerations: None. vaddcuw vec_addc vaddcuq vec_addc r a b Example Implementation vector signed int vector signed int vector signed int vaddcuw r,a,b vector unsigned int vector unsigned int vector unsigned int vaddcuw r,a,b vector signed __int128 vector signed __int128 vector signed __int128 vaddcuq r,a,b vector unsigned __int128 vector unsigned __int128 vector unsigned __int128 vaddcuq r,a,b

Vector Add Extended r = vec_adde (a, b, c) Purpose: Returns a vector formed as the sum of two vectors and a carry vector. Result value: The value of each element of r is produced by adding the corresponding elements of a and b with a carry specified in the corresponding element of c (1 if there is a carry, 0 otherwise). Endian considerations: None. Notes: Code generated for this intrinsic should ensure only the low-order bit of c participates in the sum. vspltisw vec_adde vadduwm vec_adde xxland vec_adde vaddeuqm vec_adde r a b c Example Implementation vector signed int vector signed int vector signed int vector signed int vspltisw t,1 vadduwm r,a,b xxland c,c,t vadduwm r,r,c vector unsigned int vector unsigned int vector unsigned int vector unsigned int vspltisw t,1 vadduwm r,a,b xxland c,c,t vadduwm r,r,c vector signed __int128 vector signed __int128 vector signed __int128 vector signed __int128 vaddeuqm r,a,b,c vector unsigned __int128 vector unsigned __int128 vector unsigned __int128 vector unsigned __int128 vaddeuqm r,a,b,c

Vector Add Extended Carrying r = vec_addec (a, b, c) Purpose: Returns a vector of carries produced by adding two vectors and a carry vector. Result value: The value of each element of r is the carry produced by adding the corresponding elements of a and b and a carry specified in the corresponding element of c (1 if there is a carry, 0 otherwise). Endian considerations: None. Notes: Code generated for this intrinsic should ensure only the low-order bit of c participates in the sum. vspltisw vec_addec xxland vec_addec vadduwm vec_addec vaddcuw vec_addec xxlor vec_addec vaddecuq vec_addec r a b c Example Implementation vector signed int vector signed int vector signed int vector signed int vspltisw t,1 xxland u,c,t vadduwm v,a,b vaddcuw w,a,b vaddcuw x,v,u xxlor r,w,x vector unsigned int vector unsigned int vector unsigned int vector unsigned int vspltisw t,1 xxland u,c,t vadduwm v,a,b vaddcuw w,a,b vaddcuw x,v,u xxlor r,w,x vector signed __int128 vector signed __int128 vector signed __int128 vector signed __int128 vaddecuq r,a,b,c vector unsigned __int128 vector unsigned __int128 vector unsigned __int128 vector unsigned __int128 vaddecuq r,a,b,c

Vector Add Saturating r = vec_adds (a, b) Purpose: Computes the saturated sum of two vectors. Result value: The value of each element of r is the saturated sum of the corresponding elements of a and b. Endian considerations: None. vaddsbs vec_adds vaddubs vec_adds vaddshs vec_adds vadduhs vec_adds vaddsws vec_adds vadduws vec_adds r a b Example Implementation vector signed char vector signed char vector signed char vaddsbs r,a,b vector unsigned char vector unsigned char vector unsigned char vaddubs r,a,b vector signed short vector signed short vector signed short vaddshs r,a,b vector unsigned short vector unsigned short vector unsigned short vadduhs r,a,b vector signed int vector signed int vector signed int vaddsws r,a,b vector unsigned int vector unsigned int vector unsigned int vadduws r,a,b

Vector All Equal r = vec_all_eq (a, b) Purpose: Tests whether all elements of a are equal to the corresponding elements of b. Result value: r is 1 if each element of a is equal to the corresponding element of b. Otherwise, r is 0. Endian considerations: None. vcmpequb. vec_all_eq mfocrf vec_all_eq rlwinm vec_all_eq vcmpequw. vec_all_eq vcmpequd. vec_all_eq vcmpequq. vec_all_eq vcmpequh. vec_all_eq xvcmpeqdp. vec_all_eq xvcmpeqsp. vec_all_eq setbc vec_all_eq r a b Example Implementation Restrictions int vector bool char vector bool char vcmpequb. t,a,b mfocrf u,2 rlwinm r,u,25,1 int vector signed char vector signed char vcmpequb. t,a,b mfocrf u,2 rlwinm r,u,25,1 int vector unsigned char vector unsigned char vcmpequb. t,a,b mfocrf u,2 rlwinm r,u,25,1 int vector bool short vector bool short vcmpequh. t,a,b mfocrf u,2 rlwinm r,u,25,1 int vector signed short vector signed short vcmpequh. t,a,b mfocrf u,2 rlwinm r,u,25,1 int vector unsigned short vector unsigned short vcmpequh. t,a,b mfocrf u,2 rlwinm r,u,25,1 int vector pixel vector pixel vcmpequh. t,a,b mfocrf u,2 rlwinm r,u,25,1 int vector bool int vector bool int vcmpequw. t,a,b mfocrf u,2 rlwinm r,u,25,1 int vector signed int vector signed int vcmpequw. t,a,b mfocrf u,2 rlwinm r,u,25,1 int vector unsigned int vector unsigned int vcmpequw. t,a,b mfocrf u,2 rlwinm r,u,25,1 int vector bool long long vector bool long long vcmpequd. t,a,b mfocrf u,2 rlwinm r,u,25,1 int vector signed long long vector signed long long vcmpequd. t,a,b mfocrf u,2 rlwinm r,u,25,1 int vector unsigned long long vector unsigned long long vcmpequd. t,a,b mfocrf u,2 rlwinm r,u,25,1 int vector bool __int128 vector bool __int128 vcmpequq. t,a,b setbc r,24 ISA 3.1 or later int vector signed __int128 vector signed __int128 vcmpequq. t,a,b setbc r,24 ISA 3.1 or later int vector unsigned __int128 vector unsigned __int128 vcmpequq. t,a,b setbc r,24 ISA 3.1 or later int vector float vector float xvcmpeqsp. t,a,b mfocrf u,2 rlwinm r,u,25,1 int vector double vector double xvcmpeqdp. t,a,b mfocrf u,2 rlwinm r,u,25,1

Vector All Greater or Equal r = vec_all_ge (a, b) Purpose: Tests whether all elements of a are greater than or equal to the corresponding elements of b. Result value: r is 1 if all elements of a are greater than or equal to the corresponding elements of b. Otherwise, r is 0. Endian considerations: None. vcmpgtsb. vec_all_ge mfocrf vec_all_ge rlwinm vec_all_ge vcmpgtub. vec_all_ge vcmpgtsw. vec_all_ge vcmpgtuw. vec_all_ge vcmpgtsd. vec_all_ge vcmpgtud. vec_all_ge vcmpgtsq. vec_all_ge vcmpgtuq. vec_all_ge vcmpgtsh. vec_all_ge vcmpgtuh. vec_all_ge xvcmpgedp. vec_all_ge xvcmpgesp. vec_all_ge setbc vec_all_ge r a b Example Implementation Restrictions int vector signed char vector signed char vcmpgtsb. t,b,a mfocrf u,2 rlwinm r,u,27,1 int vector unsigned char vector unsigned char vcmpgtub. t,b,a mfocrf u,2 rlwinm r,u,27,1 int vector signed short vector signed short vcmpgtsh. t,b,a mfocrf u,2 rlwinm r,u,27,1 int vector unsigned short vector unsigned short vcmpgtuh. t,b,a mfocrf u,2 rlwinm r,u,27,1 int vector signed int vector signed int vcmpgtsw. t,b,a mfocrf u,2 rlwinm r,u,27,1 int vector unsigned int vector unsigned int vcmpgtuw. t,b,a mfocrf u,2 rlwinm r,u,27,1 int vector signed long long vector signed long long vcmpgtsd. t,b,a mfocrf u,2 rlwinm r,u,27,1 int vector unsigned long long vector unsigned long long vcmpgtud. t,b,a mfocrf u,2 rlwinm r,u,27,1 int vector signed __int128 vector signed __int128 vcmpgtsq. t,b,a setbc r,26 ISA 3.1 or later int vector unsigned __int128 vector unsigned __int128 vcmpgtuq. t,b,a setbc r,26 ISA 3.1 or later int vector float vector float xvcmpgesp. t,a,b mfocrf u,2 rlwinm r,u,25,1 int vector double vector double xvcmpgedp. t,a,b mfocrf u,2 rlwinm r,u,25,1

Vector All Greater Than r = vec_all_gt (a, b) Purpose: Tests whether all elements of a are greater than the corresponding elements of b. Result value: r is 1 if all elements of a are greater than the corresponding elements of b. Otherwise, r is 0. Endian considerations: None. vcmpgtsb. vec_all_gt mfocrf vec_all_gt rlwinm vec_all_gt vcmpgtub. vec_all_gt vcmpgtsw. vec_all_gt vcmpgtuw. vec_all_gt vcmpgtsd. vec_all_gt vcmpgtud. vec_all_gt vcmpgtsq. vec_all_gt vcmpgtuq. vec_all_gt vcmpgtsh. vec_all_gt vcmpgtuh. vec_all_gt xvcmpgtdp. vec_all_gt xvcmpgtsp. vec_all_gt setbc vec_all_gt r a b Example Implementation Restrictions int vector signed char vector signed char vcmpgtsb. t,a,b mfocrf u,2 rlwinm r,u,25,1 int vector unsigned char vector unsigned char vcmpgtub. t,a,b mfocrf u,2 rlwinm r,u,25,1 int vector signed short vector signed short vcmpgtsh. t,a,b mfocrf u,2 rlwinm r,u,25,1 int vector unsigned short vector unsigned short vcmpgtuh. t,a,b mfocrf u,2 rlwinm r,u,25,1 int vector signed int vector signed int vcmpgtsw. t,a,b mfocrf u,2 rlwinm r,u,25,1 int vector unsigned int vector unsigned int vcmpgtuw. t,a,b mfocrf u,2 rlwinm r,u,25,1 int vector signed long long vector signed long long vcmpgtsd. t,a,b mfocrf u,2 rlwinm r,u,25,1 int vector unsigned long long vector unsigned long long vcmpgtud. t,a,b mfocrf u,2 rlwinm r,u,25,1 int vector signed __int128 vector signed __int128 vcmpgtsq. t,a,b setbc r,24 ISA 3.1 or later int vector unsigned __int128 vector unsigned __int128 vcmpgtuq. t,a,b setbc r,24 ISA 3.1 or later int vector float vector float xvcmpgtsp. t,a,b mfocrf u,2 rlwinm r,u,25,1 int vector double vector double xvcmpgtdp. t,a,b mfocrf u,2 rlwinm r,u,25,1

Vector All In Range r = vec_all_in (a, b) Purpose: Tests whether all elements of a vector are within a given range. Result value: r is 1 if each element of a has a value less than or equal to the value of the corresponding element of b, and greater than or equal to the negative of the value of the corresponding element of b. Otherwise, r is 0. Endian considerations: None. vcmpbfp. vec_all_in mfocrf vec_all_in rlwinm vec_all_in r a b Example Implementation int vector float vector float vcmpbfp. t,a,b mfocrf u,2 rlwinm r,u,27,1

Vector All Less or Equal r = vec_all_le (a, b) Purpose: Tests whether all elements of a are less than or equal to the corresponding elements of b. Result value: r is 1 if all elements of a are less than or equal to the corresponding elements of b. Otherwise, r is 0. Endian considerations: None. vcmpgtsb. vec_all_le mfocrf vec_all_le rlwinm vec_all_le vcmpgtub. vec_all_le vcmpgtsw. vec_all_le vcmpgtuw. vec_all_le vcmpgtsd. vec_all_le vcmpgtud. vec_all_le vcmpgtsq. vec_all_le vcmpgtuq. vec_all_le vcmpgtsh. vec_all_le vcmpgtuh. vec_all_le xvcmpgedp. vec_all_le xvcmpgesp. vec_all_le setbc. vec_all_le r a b Example Implementation Restrictions int vector signed char vector signed char vcmpgtsb. t,a,b mfocrf u,2 rlwinm r,u,27,1 int vector unsigned char vector unsigned char vcmpgtub. t,a,b mfocrf u,2 rlwinm r,u,27,1 int vector signed short vector signed short vcmpgtsh. t,a,b mfocrf u,2 rlwinm r,u,27,1 int vector unsigned short vector unsigned short vcmpgtuh. t,a,b mfocrf u,2 rlwinm r,u,27,1 int vector signed int vector signed int vcmpgtsw. t,a,b mfocrf u,2 rlwinm r,u,27,1 int vector unsigned int vector unsigned int vcmpgtuw. t,a,b mfocrf u,2 rlwinm r,u,27,1 int vector signed long long vector signed long long vcmpgtsd. t,a,b mfocrf u,2 rlwinm r,u,27,1 int vector unsigned long long vector unsigned long long vcmpgtud. t,a,b mfocrf u,2 rlwinm r,u,27,1 int vector signed __int128 vector signed __int128 vcmpgtsq. t,a,b setbc r,26 ISA 3.1 or later int vector unsigned __int128 vector unsigned __int128 vcmpgtuq. t,a,b setbc r,26 ISA 3.1 or later int vector float vector float xvcmpgesp. t,b,a mfocrf u,2 rlwinm r,u,25,1 int vector double vector double xvcmpgedp. t,b,a mfocrf u,2 rlwinm r,u,25,1

Vector All Less Than r = vec_all_lt (a, b) Purpose: Tests whether all elements of a are less than the corresponding elements of b. Result value: r is 1 if all elements of a are less than the corresponding elements of b. Otherwise, r is 0. Endian considerations: None. vcmpgtsb. vec_all_lt mfocrf vec_all_lt rlwinm vec_all_lt vcmpgtub. vec_all_lt vcmpgtsw. vec_all_lt vcmpgtuw. vec_all_lt vcmpgtsd. vec_all_lt vcmpgtud. vec_all_lt vcmpgtsq. vec_all_lt vcmpgtuq. vec_all_lt vcmpgtsh. vec_all_lt vcmpgtuh. vec_all_lt xvcmpgtdp. vec_all_lt xvcmpgtsp. vec_all_lt setbc vec_all_lt r a b Example Implementation Restrictions int vector signed char vector signed char vcmpgtsb. t,b,a mfocrf u,2 rlwinm r,u,25,1 int vector unsigned char vector unsigned char vcmpgtub. t,b,a mfocrf u,2 rlwinm r,u,25,1 int vector signed short vector signed short vcmpgtsh. t,b,a mfocrf u,2 rlwinm r,u,25,1 int vector unsigned short vector unsigned short vcmpgtuh. t,b,a mfocrf u,2 rlwinm r,u,25,1 int vector signed int vector signed int vcmpgtsw. t,b,a mfocrf u,2 rlwinm r,u,25,1 int vector unsigned int vector unsigned int vcmpgtuw. t,b,a mfocrf u,2 rlwinm r,u,25,1 int vector signed long long vector signed long long vcmpgtsd. t,b,a mfocrf u,2 rlwinm r,u,25,1 int vector unsigned long long vector unsigned long long vcmpgtud. t,b,a mfocrf u,2 rlwinm r,u,25,1 int vector signed __int128 vector signed __int128 vcmpgtsq. t,b,a setbc r,24 ISA 3.1 or later int vector unsigned __int128 vector unsigned __int128 vcmpgtuq. t,b,a setbc r,24 ISA 3.1 or later int vector float vector float xvcmpgtsp. t,b,a mfocrf u,2 rlwinm r,u,25,1 int vector double vector double xvcmpgtdp. t,b,a mfocrf u,2 rlwinm r,u,25,1

Vector All Not-a-Number r = vec_all_nan (a) Purpose: Tests whether all elements of a are not-a-number (NaN). Result value: r is 1 if all elements of a are NaN. Otherwise, r is 0. Endian considerations: None. xvcmpeqdp. vec_all_nan mfocrf vec_all_nan rlwinm vec_all_nan xvcmpeqsp. vec_all_nan r a Example Implementation int vector float xvcmpeqsp. t,a,a mfocrf u,2 rlwinm r,u,27,1 int vector double xvcmpeqdp. t,a,a mfocrf u,2 rlwinm r,u,27,1

Vector All Not Equal r = vec_all_ne (a, b) Purpose: Tests whether all elements of a are not equal to the corresponding elements of b. Result value: r is 1 if all elements of a are not equal to the corresponding elements of b. Otherwise, r is 0. Endian considerations: None. vcmpneb. vec_all_ne mfocrf vec_all_ne rlwinm vec_all_ne vcmpnew. vec_all_ne vcmpequd. vec_all_ne vcmpequq. vec_all_ne vcmpneh. vec_all_ne xvcmpeqdp. vec_all_ne xvcmpeqsp. vec_all_ne setbc vec_all_ne r a b Example Implementation Restrictions int vector bool char vector bool char vcmpneb. t,a,b mfocrf u,2 rlwinm r,u,25,1 int vector signed char vector signed char vcmpneb. t,a,b mfocrf u,2 rlwinm r,u,25,1 int vector unsigned char vector unsigned char vcmpneb. t,a,b mfocrf u,2 rlwinm r,u,25,1 int vector bool short vector bool short vcmpneh. t,a,b mfocrf u,2 rlwinm r,u,25,1 int vector signed short vector signed short vcmpneh. t,a,b mfocrf u,2 rlwinm r,u,25,1 int vector unsigned short vector unsigned short vcmpneh. t,a,b mfocrf u,2 rlwinm r,u,25,1 int vector pixel vector pixel vcmpneh. t,a,b mfocrf u,2 rlwinm r,u,25,1 int vector bool int vector bool int vcmpnew. t,a,b mfocrf u,2 rlwinm r,u,25,1 int vector signed int vector signed int vcmpnew. t,a,b mfocrf u,2 rlwinm r,u,25,1 int vector unsigned int vector unsigned int vcmpnew. t,a,b mfocrf u,2 rlwinm r,u,25,1 int vector bool long long vector bool long long vcmpequd. t,a,b mfocrf u,2 rlwinm r,u,27,1 int vector signed long long vector signed long long vcmpequd. t,a,b mfocrf u,2 rlwinm r,u,27,1 int vector unsigned long long vector unsigned long long vcmpequd. t,a,b mfocrf u,2 rlwinm r,u,27,1 int vector bool __int128 vector bool __int128 vcmpequq. t,a,b setbc r,26 ISA 3.1 or later int vector signed __int128 vector signed __int128 vcmpequq. t,a,b setbc r,26 ISA 3.1 or later int vector unsigned __int128 vector unsigned __int128 vcmpequq. t,a,b setbc r,26 ISA 3.1 or later int vector float vector float xvcmpeqsp. t,a,b mfocrf u,2 rlwinm r,u,27,1 int vector double vector double xvcmpeqdp. t,a,b mfocrf u,2 rlwinm r,u,27,1

Vector All Not Greater or Equal r = vec_all_nge (a, b) Purpose: Tests whether all elements of a are not greater than or equal to the corresponding elements of b. Result value: r is 1 if all elements of a are not greater than or equal to the corresponding elements of b. Otherwise, r is 0. Endian considerations: None. Notes: If an element of either a or b contains a NaN value, the condition for that element is considered to be satisfied. xvcmpeqdp. vec_all_nge mfocrf vec_all_nge rlwinm vec_all_nge xvcmpeqsp. vec_all_nge r a b Example Implementation int vector float vector float xvcmpgesp. t,a,b mfocrf u,2 rlwinm r,u,27,1 int vector double vector double xvcmpgedp. t,a,b mfocrf u,2 rlwinm r,u,27,1

Vector All Not Greater Than r = vec_all_ngt (a, b) Purpose: Tests whether all elements of a are not greater than the corresponding elements of b. Result value: r is 1 if all elements of a are not greater than the corresponding elements of b. Otherwise, r is 0. Endian considerations: None. Notes: If an element of either a or b contains a NaN value, the condition for that element is considered to be satisfied. xvcmpgtdp. vec_all_ngt mfocrf vec_all_ngt rlwinm vec_all_ngt xvcmpgtsp. vec_all_ngt r a b Example Implementation int vector float vector float xvcmpgtsp. t,a,b mfocrf u,2 rlwinm r,u,27,1 int vector double vector double xvcmpgtdp. t,a,b mfocrf u,2 rlwinm r,u,27,1

Vector All Not Less or Equal r = vec_all_nle (a, b) Purpose: Tests whether all elements of a are not less than or equal to the corresponding elements of b. Result value: r is 1 if all elements of a are not less than or equal to the corresponding elements of b. Otherwise, r is 0. Endian considerations: None. Notes: If an element of either a or b contains a NaN value, the condition for that element is considered to be satisfied. xvcmpgedp. vec_all_nle mfocrf vec_all_nle rlwinm vec_all_nle xvcmpgesp. vec_all_nle r a b Example Implementation int vector float vector float xvcmpgesp. t,b,a mfocrf u,2 rlwinm r,u,27,1 int vector double vector double xvcmpgedp. t,b,a mfocrf u,2 rlwinm r,u,27,1

Vector All Not Less Than r = vec_all_nlt (a, b) Purpose: Tests whether all elements of a are not less than the corresponding elements of b. Result value: r is 1 if all elements of a are not less than the corresponding elements of b. Otherwise, r is 0. Endian considerations: None. Notes: If an element of either a or b contains a NaN value, the condition for that element is considered to be satisfied. xvcmpgtdp. vec_all_nlt mfocrf vec_all_nlt rlwinm vec_all_nlt xvcmpgtsp. vec_all_nlt r a b Example Implementation int vector float vector float xvcmpgtsp. t,b,a mfocrf u,2 rlwinm r,u,27,1 int vector double vector double xvcmpgtdp. t,b,a mfocrf u,2 rlwinm r,u,27,1

Vector All Numeric r = vec_all_numeric (a) Purpose: Tests whether all elements of the vector are numeric (not NaN). Result value: r is 1 if all elements of a are numeric (not NaN). Otherwise, r is 0. Endian considerations: None. xvcmpeqdp. vec_all_numeric mfocrf vec_all_numeric rlwinm vec_all_numeric xvcmpeqsp. vec_all_numeric r a Example Implementation int vector float xvcmpeqsp. t,a,b mfocrf u,2 rlwinm r,u,25,1 int vector double xvcmpeqdp. t,a,b mfocrf u,2 rlwinm r,u,25,1

Vector AND r = vec_and (a, b) Purpose: Performs a bitwise AND of two vectors. Result value: The value of r is the bitwise AND of a and b. Endian considerations: None. xxland vec_and r a b Example Implementation Restrictions vector bool char vector bool char vector bool char xxland r,a,b vector signed char vector signed char vector signed char xxland r,a,b vector unsigned char vector unsigned char vector unsigned char xxland r,a,b vector bool short vector bool short vector bool short xxland r,a,b vector signed short vector signed short vector signed short xxland r,a,b vector unsigned short vector unsigned short vector unsigned short xxland r,a,b vector signed int vector signed int vector signed int xxland r,a,b vector bool int vector bool int vector bool int xxland r,a,b vector unsigned int vector unsigned int vector unsigned int xxland r,a,b vector bool long long vector bool long long vector bool long long xxland r,a,b vector signed long long vector signed long long vector signed long long xxland r,a,b vector unsigned long long vector unsigned long long vector unsigned long long xxland r,a,b vector float vector float vector float xxland r,a,b vector double vector double vector double xxland r,a,b

Vector AND with Complement r = vec_andc (a, b) Purpose: Performs a bitwise AND of one vector with the bitwise complement of another vector. Result value: The value of r is the bitwise AND of a with the bitwise complement of b. Endian considerations: None. xxlandc vec_andc r a b Example Implementation Restrictions vector bool char vector bool char vector bool char xxlandc r,a,b vector signed char vector signed char vector signed char xxlandc r,a,b vector unsigned char vector unsigned char vector unsigned char xxlandc r,a,b vector bool short vector bool short vector bool short xxlandc r,a,b vector signed short vector signed short vector signed short xxlandc r,a,b vector unsigned short vector unsigned short vector unsigned short xxlandc r,a,b vector signed int vector signed int vector signed int xxlandc r,a,b vector bool int vector bool int vector bool int xxlandc r,a,b vector unsigned int vector unsigned int vector unsigned int xxlandc r,a,b vector bool long long vector bool long long vector bool long long xxlandc r,a,b vector signed long long vector signed long long vector signed long long xxlandc r,a,b vector unsigned long long vector unsigned long long vector unsigned long long xxlandc r,a,b vector float vector float vector float xxlandc r,a,b vector double vector double vector double xxlandc r,a,b

Vector Any Equal r = vec_any_eq (a, b) Purpose: Tests whether any element of a is equal to the corresponding element of b. Result value: r is 1 if any element of a is equal to the corresponding element of b. Otherwise, r is 0. Endian considerations: None. vcmpneb. vec_any_eq mfocrf vec_any_eq rlwinm vec_any_eq cntlzw vec_any_eq srwi vec_any_eq vcmpnew. vec_any_eq vcmpequd. vec_any_eq vcmpequq. vec_any_eq vcmpneh. vec_any_eq xvcmpeqdp. vec_any_eq xvcmpeqsp. vec_any_eq setbcr vec_any_eq r a b Example Implementation Restrictions int vector bool char vector bool char vcmpneb. t,a,b mfocrf u,2 rlwinm v,u,25,1 cntlzw w,v srwi r,w,5 int vector signed char vector signed char vcmpneb. t,a,b mfocrf u,2 rlwinm v,u,25,1 cntlzw w,v srwi r,w,5 int vector unsigned char vector unsigned char vcmpneb. t,a,b mfocrf u,2 rlwinm v,u,25,1 cntlzw w,v srwi r,w,5 int vector bool short vector bool short vcmpneh. t,a,b mfocrf u,2 rlwinm v,u,25,1 cntlzw w,v srwi r,w,5 int vector signed short vector signed short vcmpneh. t,a,b mfocrf u,2 rlwinm v,u,25,1 cntlzw w,v srwi r,w,5 int vector unsigned short vector unsigned short vcmpneh. t,a,b mfocrf u,2 rlwinm v,u,25,1 cntlzw w,v srwi r,w,5 int vector pixel vector pixel vcmpneh. t,a,b mfocrf u,2 rlwinm v,u,25,1 cntlzw w,v srwi r,w,5 int vector bool int vector bool int vcmpnew. t,a,b mfocrf u,2 rlwinm v,u,25,1 cntlzw w,v srwi r,w,5 int vector signed int vector signed int vcmpnew. t,a,b mfocrf u,2 rlwinm v,u,25,1 cntlzw w,v srwi r,w,5 int vector unsigned int vector unsigned int vcmpnew. t,a,b mfocrf u,2 rlwinm v,u,25,1 cntlzw w,v srwi r,w,5 int vector bool long long vector bool long long vcmpequd. t,a,b mfocrf u,2 rlwinm v,u,27,1 cntlzw w,v srwi r,w,5 int vector signed long long vector signed long long vcmpequd. t,a,b mfocrf u,2 rlwinm v,u,27,1 cntlzw w,v srwi r,w,5 int vector unsigned long long vector unsigned long long vcmpequd. t,a,b mfocrf u,2 rlwinm v,u,27,1 cntlzw w,v srwi r,w,5 int vector bool __int128 vector bool __int128 vcmpequq. t,a,b setbcr r,26 ISA 3.1 or later int vector signed __int128 vector signed __int128 vcmpequq. t,a,b setbcr r,26 ISA 3.1 or later int vector unsigned __int128 vector unsigned __int128 vcmpequq. t,a,b setbcr r,26 ISA 3.1 or later int vector float vector float xvcmpeqsp. t,a,b mfocrf u,2 rlwinm v,u,27,1 cntlzw w,v srwi r,w,5 int vector double vector double xvcmpeqdp. t,a,b mfocrf u,2 rlwinm v,u,27,1 cntlzw w,v srwi r,w,5

Vector Any Greater or Equal r = vec_any_ge (a, b) Purpose: Tests whether any element of a is greater than or equal to the corresponding element of b. Result value: r is 1 if any element of a is greater than or equal to the corresponding element of b. Otherwise, r is 0. Endian considerations: None. vcmpgtsb. vec_any_ge mfocrf vec_any_ge rlwinm vec_any_ge cntlzw vec_any_ge srwi vec_any_ge vcmpgtub. vec_any_ge vcmpgtsw. vec_any_ge vcmpgtuw. vec_any_ge vcmpgtsd. vec_any_ge vcmpgtud. vec_any_ge vcmpgtsq. vec_any_ge vcmpgtuq. vec_any_ge vcmpgtsh. vec_any_ge vcmpgtuh. vec_any_ge xvcmpgedp. vec_any_ge xvcmpgesp. vec_any_ge setbcr vec_any_ge r a b Example Implementation Restrictions int vector signed char vector signed char vcmpgtsb. t,b,a mfocrf u,2 rlwinm v,u,25,1 cntlzw w,v srwi r,w,5 int vector unsigned char vector unsigned char vcmpgtub. t,b,a mfocrf u,2 rlwinm v,u,25,1 cntlzw w,v srwi r,w,5 int vector signed short vector signed short vcmpgtsh. t,b,a mfocrf u,2 rlwinm v,u,25,1 cntlzw w,v srwi r,w,5 int vector unsigned short vector unsigned short vcmpgtuh. t,b,a mfocrf u,2 rlwinm v,u,25,1 cntlzw w,v srwi r,w,5 int vector signed int vector signed int vcmpgtsw. t,b,a mfocrf u,2 rlwinm v,u,25,1 cntlzw w,v srwi r,w,5 int vector unsigned int vector unsigned int vcmpgtuw. t,b,a mfocrf u,2 rlwinm v,u,25,1 cntlzw w,v srwi r,w,5 int vector signed long long vector signed long long vcmpgtsd. t,b,a mfocrf u,2 rlwinm v,u,25,1 cntlzw w,v srwi r,w,5 int vector unsigned long long vector unsigned long long vcmpgtud. t,b,a mfocrf u,2 rlwinm v,u,25,1 cntlzw w,v srwi r,w,5 int vector signed long long vector signed long long vcmpgtsd. t,b,a mfocrf u,2 rlwinm v,u,25,1 cntlzw w,v srwi r,w,5 int vector unsigned long long vector unsigned long long vcmpgtud. t,b,a mfocrf u,2 rlwinm v,u,25,1 cntlzw w,v srwi r,w,5 int vector signed long long vector signed long long vcmpgtsd. t,b,a mfocrf u,2 rlwinm v,u,25,1 cntlzw w,v srwi r,w,5 int vector unsigned long long vector unsigned long long vcmpgtud. t,b,a mfocrf u,2 rlwinm v,u,25,1 cntlzw w,v srwi r,w,5 int vector signed __int128 vector signed __int128 vcmpgtsq. t,b,a setbcr r,24 ISA 3.1 or later int vector unsigned __int128 vector unsigned __int128 vcmpgtuq. t,b,a setbcr r,24 ISA 3.1 or later int vector double vector double xvcmpgedp. t,a,b mfocrf u,2 rlwinm v,u,27,1 cntlzw w,v srwi r,w,5 int vector float vector float vcmpgesp. t,a,b mfocrf u,2 rlwinm v,u,27,1 cntlzw w,v srwi r,w,5

Vector Any Greater Than r = vec_any_gt (a, b) Purpose: Tests whether any element of a is greater than the corresponding element of b. Result value: r is 1 if any element of a is greater than the corresponding element of b. Otherwise, r is 0. Endian considerations: None. vcmpgtsb. vec_any_gt mfocrf vec_any_gt rlwinm vec_any_gt cntlzw vec_any_gt srwi vec_any_gt vcmpgtub. vec_any_gt vcmpgtsw. vec_any_gt vcmpgtuw. vec_any_gt vcmpgtsd. vec_any_gt vcmpgtud. vec_any_gt vcmpgtsq. vec_any_gt vcmpgtuq. vec_any_gt vcmpgtsh. vec_any_gt vcmpgtuh. vec_any_gt xvcmpgtdp. vec_any_gt xvcmpgtsp. vec_any_gt setbcr vec_any_gt r a b Example Implementation Restrictions int vector signed char vector signed char vcmpgtsb. t,a,b mfocrf u,2 rlwinm v,u,27,1 cntlzw w,v srwi r,w,5 int vector unsigned char vector unsigned char vcmpgtub. t,a,b mfocrf u,2 rlwinm v,u,27,1 cntlzw w,v srwi r,w,5 int vector signed short vector signed short vcmpgtsh. t,a,b mfocrf u,2 rlwinm v,u,27,1 cntlzw w,v srwi r,w,5 int vector unsigned short vector unsigned short vcmpgtuh. t,a,b mfocrf u,2 rlwinm v,u,27,1 cntlzw w,v srwi r,w,5 int vector signed int vector signed int vcmpgtsw. t,a,b mfocrf u,2 rlwinm v,u,27,1 cntlzw w,v srwi r,w,5 int vector unsigned int vector unsigned int vcmpgtuw. t,a,b mfocrf u,2 rlwinm v,u,27,1 cntlzw w,v srwi r,w,5 int vector signed long long vector signed long long vcmpgtsd. t,a,b mfocrf u,2 rlwinm v,u,27,1 cntlzw w,v srwi r,w,5 int vector unsigned long long vector unsigned long long vcmpgtud. t,a,b mfocrf u,2 rlwinm v,u,27,1 cntlzw w,v srwi r,w,5 int vector signed __int128 vector signed __int128 vcmpgtsq. t,a,b setbcr r,26 ISA 3.1 or later int vector unsigned __int128 vector unsigned __int128 vcmpgtuq. t,a,b setbcr r,26 ISA 3.1 or later int vector float vector float xvcmpgtsp. t,a,b mfocrf u,2 rlwinm v,u,27,1 cntlzw w,v srwi r,w,5 int vector double vector double xvcmpgtdp. t,a,b mfocrf u,2 rlwinm v,u,27,1 cntlzw w,v srwi r,w,5

Vector Any Less or Equal r = vec_any_le (a, b) Purpose: Tests whether any element of a is less than or equal to the corresponding element of b. Result value: r is 1 if any element of a is less than or equal to the corresponding element of b. Otherwise, r is 0. Endian considerations: None. vcmpgtsb. vec_any_le mfocrf vec_any_le rlwinm vec_any_le cntlzw vec_any_le srwi vec_any_le vcmpgtub. vec_any_le vcmpgtsw. vec_any_le vcmpgtuw. vec_any_le vcmpgtsd. vec_any_le vcmpgtud. vec_any_le vcmpgtsq. vec_any_le vcmpgtuq. vec_any_le vcmpgtsh. vec_any_le vcmpgtuh. vec_any_le xvcmpgedp. vec_any_le xvcmpgesp. vec_any_le setbcr vec_any_le r a b Example Implementation Restrictions int vector signed char vector signed char vcmpgtsb. t,a,b mfocrf u,2 rlwinm v,u,25,1 cntlzw w,v srwi r,w,5 int vector unsigned char vector unsigned char vcmpgtub. t,a,b mfocrf u,2 rlwinm v,u,25,1 cntlzw w,v srwi r,w,5 int vector signed short vector signed short vcmpgtsh. t,a,b mfocrf u,2 rlwinm v,u,25,1 cntlzw w,v srwi r,w,5 int vector unsigned short vector unsigned short vcmpgtuh. t,a,b mfocrf u,2 rlwinm v,u,25,1 cntlzw w,v srwi r,w,5 int vector signed int vector signed int vcmpgtsw. t,a,b mfocrf u,2 rlwinm v,u,25,1 cntlzw w,v srwi r,w,5 int vector unsigned int vector unsigned int vcmpgtuw. t,a,b mfocrf u,2 rlwinm v,u,25,1 cntlzw w,v srwi r,w,5 int vector signed long long vector signed long long vcmpgtsd. t,a,b mfocrf u,2 rlwinm v,u,25,1 cntlzw w,v srwi r,w,5 int vector unsigned long long vector unsigned long long vcmpgtud. t,a,b mfocrf u,2 rlwinm v,u,25,1 cntlzw w,v srwi r,w,5 int vector signed long long vector signed long long vcmpgtsd. t,a,b mfocrf u,2 rlwinm v,u,25,1 cntlzw w,v srwi r,w,5 int vector unsigned long long vector unsigned long long vcmpgtud. t,a,b mfocrf u,2 rlwinm v,u,25,1 cntlzw w,v srwi r,w,5 int vector signed __int128 vector signed __int128 vcmpgtsq. t,a,b setbcr 3,24 ISA 3.1 or later int vector unsigned __int128 vector unsigned __int128 vcmpgtuq. t,a,b setbcr 3,24 ISA 3.1 or later int vector float vector float xvcmpgesp. t,b,a mfocrf u,2 rlwinm v,u,27,1 cntlzw w,v srwi r,w,5 int vector double vector double xvcmpgedp. t,b,a mfocrf u,2 rlwinm v,u,27,1 cntlzw w,v srwi r,w,5

Vector Any Less Than r = vec_any_lt (a, b) Purpose: Tests whether any element of a is less than the corresponding element of b. Result value: r is 1 if any element of a is less than the corresponding element of b. Otherwise, r is 0. Endian considerations: None. vcmpgtsb. vec_any_lt mfocrf vec_any_lt rlwinm vec_any_lt cntlzw vec_any_lt srwi vec_any_lt vcmpgtub. vec_any_lt vcmpgtsw. vec_any_lt vcmpgtuw. vec_any_lt vcmpgtsd. vec_any_lt vcmpgtud. vec_any_lt vcmpgtsq. vec_any_lt vcmpgtuq. vec_any_lt vcmpgtsh. vec_any_lt vcmpgtuh. vec_any_lt xvcmpgtdp. vec_any_lt xvcmpgtsp. vec_any_lt setbcr vec_any_lt r a b Example Implementation Restrictions int vector signed char vector signed char vcmpgtsb. t,b,a mfocrf u,2 rlwinm v,u,27,1 cntlzw w,v srwi r,w,5 int vector unsigned char vector unsigned char vcmpgtub. t,b,a mfocrf u,2 rlwinm v,u,27,1 cntlzw w,v srwi r,w,5 int vector signed short vector signed short vcmpgtsh. t,b,a mfocrf u,2 rlwinm v,u,27,1 cntlzw w,v srwi r,w,5 int vector unsigned short vector unsigned short vcmpgtuh. t,b,a mfocrf u,2 rlwinm v,u,27,1 cntlzw w,v srwi r,w,5 int vector signed int vector signed int vcmpgtsw. t,b,a mfocrf u,2 rlwinm v,u,27,1 cntlzw w,v srwi r,w,5 int vector unsigned int vector unsigned int vcmpgtuw. t,b,a mfocrf u,2 rlwinm v,u,27,1 cntlzw w,v srwi r,w,5 int vector signed long long vector signed long long vcmpgtsd. t,b,a mfocrf u,2 rlwinm v,u,27,1 cntlzw w,v srwi r,w,5 int vector unsigned long long vector unsigned long long vcmpgtud. t,b,a mfocrf u,2 rlwinm v,u,27,1 cntlzw w,v srwi r,w,5 int vector signed __int128 vector signed __int128 vcmpgtsq. t,b,a setbcr r,26 ISA 3.1 or later int vector unsigned __int128 vector unsigned __int128 vcmpgtuq. t,b,a setbcr r,26 ISA 3.1 or later int vector float vector float xvcmpgtsp. t,b,a mfocrf u,2 rlwinm v,u,27,1 cntlzw w,v srwi r,w,5 int vector double vector double xvcmpgtdp. t,b,a mfocrf u,2 rlwinm v,u,27,1 cntlzw w,v srwi r,w,5

Vector Any Not-a-Number r = vec_any_nan (a) Purpose: Tests whether any element of the source vector is a NaN. Result value: r is 1 if any element of a is a NaN. Otherwise, r is 0. Endian considerations: None. xvcmpeqdp. vec_any_nan mfocrf vec_any_nan rlwinm vec_any_nan cntlzw vec_any_nan srwi vec_any_nan xvcmpeqsp. vec_any_nan r a Example Implementation int vector float xvcmpeqsp. t,a,a mfocrf u,2 rlwinm v,u,25,1 cntlzw w,v srwi r,w,5 int vector double xvcmpeqdp. t,a,a mfocrf u,2 rlwinm v,u,25,1 cntlzw w,v srwi r,w,5

Vector Any Not Equal r = vec_any_ne (a, b) Purpose: Tests whether any element of a is not equal to the corresponding element of b. Result value: r is 1 if any element of a is not equal to the corresponding element of b. Otherwise, r is 0. Endian considerations: None. vcmpequb. vec_any_ne mfocrf vec_any_ne rlwinm vec_any_ne cntlzw vec_any_ne srwi vec_any_ne vcmpequw. vec_any_ne vcmpequd. vec_any_ne vcmpequq. vec_any_ne vcmpequh. vec_any_ne xvcmpeqdp. vec_any_ne xvcmpeqsp. vec_any_ne setbcr vec_any_ne r a b Example Implementation Restrictions int vector bool char vector bool char vcmpequb. t,a,b mfocrf u,2 rlwinm v,u,25,1 cntlzw w,v srwi r,w,5 int vector signed char vector signed char vcmpequb. t,a,b mfocrf u,2 rlwinm v,u,25,1 cntlzw w,v srwi r,w,5 int vector unsigned char vector unsigned char vcmpequb. t,a,b mfocrf u,2 rlwinm v,u,25,1 cntlzw w,v srwi r,w,5 int vector bool short vector bool short vcmpequh. t,a,b mfocrf u,2 rlwinm v,u,25,1 cntlzw w,v srwi r,w,5 int vector signed short vector signed short vcmpequh. t,a,b mfocrf u,2 rlwinm v,u,25,1 cntlzw w,v srwi r,w,5 int vector unsigned short vector unsigned short vcmpequh. t,a,b mfocrf u,2 rlwinm v,u,25,1 cntlzw w,v srwi r,w,5 int vector pixel vector pixel vcmpequh. t,a,b mfocrf u,2 rlwinm v,u,25,1 cntlzw w,v srwi r,w,5 int vector bool int vector bool int vcmpequw. t,a,b mfocrf u,2 rlwinm v,u,25,1 cntlzw w,v srwi r,w,5 int vector signed int vector signed int vcmpequw. t,a,b mfocrf u,2 rlwinm v,u,25,1 cntlzw w,v srwi r,w,5 int vector unsigned int vector unsigned int vcmpequw. t,a,b mfocrf u,2 rlwinm v,u,25,1 cntlzw w,v srwi r,w,5 int vector bool long long vector bool long long vcmpequd. t,a,b mfocrf u,2 rlwinm v,u,25,1 cntlzw w,v srwi r,w,5 int vector signed long long vector signed long long vcmpequd. t,a,b mfocrf u,2 rlwinm v,u,25,1 cntlzw w,v srwi r,w,5 int vector unsigned long long vector unsigned long long vcmpequd. t,a,b mfocrf u,2 rlwinm v,u,25,1 cntlzw w,v srwi r,w,5 int vector bool __int128 vector bool __int128 vcmpequq. t,a,b setbcr r,24 ISA 3.1 or later int vector signed __int128 vector signed __int128 vcmpequq. t,a,b setbcr r,24 ISA 3.1 or later int vector unsigned __int128 vector unsigned __int128 vcmpequq. t,a,b setbcr r,24 ISA 3.1 or later int vector float vector float xvcmpeqsp. t,a,b mfocrf u,2 rlwinm v,u,25,1 cntlzw w,v srwi r,w,5 int vector double vector double xvcmpeqdp. t,a,b mfocrf u,2 rlwinm v,u,25,1 cntlzw w,v srwi r,w,5

Vector Any Not Greater or Equal r = vec_any_nge (a, b) Purpose: Tests whether any element of a is not greater than or equal to the corresponding element of b. Result value: r is 1 if any element of a is not greater than or equal to the corresponding element of b. Otherwise, r is 0. Endian considerations: None. Notes: If an element of either a or b contains a NaN value, the condition for that element is considered to be satisfied. xvcmpgedp. vec_any_nge mfocrf vec_any_nge rlwinm vec_any_nge cntlzw vec_any_nge srwi vec_any_nge xvcmpgesp. vec_any_nge r a b Example Implementation int vector float vector float xvcmpgesp. t,a,b mfocrf u,2 rlwinm v,u,25,1 cntlzw w,v srwi r,w,5 int vector double vector double xvcmpgedp. t,a,b mfocrf u,2 rlwinm v,u,25,1 cntlzw w,v srwi r,w,5

Vector Any Not Greater Than r = vec_any_ngt (a, b) Purpose: Tests whether any element of a is not greater than the corresponding element of b. Result value: r is 1 if any element of a is not greater than the corresponding element of b. Otherwise, r is 0. Endian considerations: None. Notes: If an element of either a or b contains a NaN value, the condition for that element is considered to be satisfied. xvcmpgtdp. vec_any_ngt mfocrf vec_any_ngt rlwinm vec_any_ngt cntlzw vec_any_ngt srwi vec_any_ngt xvcmpgtsp. vec_any_ngt r a b Example Implementation int vector float vector float xvcmpgtsp. t,a,b mfocrf u,2 rlwinm v,u,25,1 cntlzw w,v srwi r,w,5 int vector double vector double xvcmpgtdp. t,a,b mfocrf u,2 rlwinm v,u,25,1 cntlzw w,v srwi r,w,5

Vector Any Not Less or Equal r = vec_any_nle (a, b) Purpose: Tests whether any element of a is not less than or equal to the corresponding element of b. Result value: r is 1 if any element of a is not less than or equal to the corresponding element of b. Otherwise, r is 0. Endian considerations: None. Notes: If an element of either a or b contains a NaN value, the condition for that element is considered to be satisfied. xvcmpgedp. vec_any_nle mfocrf vec_any_nle rlwinm vec_any_nle cntlzw vec_any_nle srwi vec_any_nle xvcmpgesp. vec_any_nle r a b Example Implementation int vector float vector float xvcmpgesp. t,b,a mfocrf u,2 rlwinm v,u,25,1 cntlzw w,v srwi r,w,5 int vector double vector double xvcmpgedp. t,b,a mfocrf u,2 rlwinm v,u,25,1 cntlzw w,v srwi r,w,5

Vector Any Not Less Than r = vec_any_nlt (a, b) Purpose: Tests whether any element of a is not less than the corresponding element of b. Result value: r is 1 if any element of a is not less than the corresponding element of b. Otherwise, r is 0. Endian considerations: None. Notes: If an element of either a or b contains a NaN value, the condition for that element is considered to be satisfied. xvcmpgtdp. vec_any_nlt mfocrf vec_any_nlt rlwinm vec_any_nlt cntlzw vec_any_nlt srwi vec_any_nlt xvcmpgtsp. vec_any_nlt r a b Example Implementation int vector float vector float xvcmpgtdp. t,b,a mfocrf u,2 rlwinm v,u,25,1 cntlzw w,v srwi r,w,5 int vector double vector double xvcmpgtdp. t,b,a mfocrf u,2 rlwinm v,u,25,1 cntlzw w,v srwi r,w,5

Vector Any Numeric r = vec_any_numeric (a) Purpose: Tests whether any element of the source vector is numeric (not a NaN). Result value: r is 1 if any element of a is numeric (not a NaN). Otherwise, r is 0. Endian considerations: None. xvcmpeqdp. vec_any_numeric mfocrf vec_any_numeric rlwinm vec_any_numeric cntlzw vec_any_numeric srwi vec_any_numeric xvcmpeqsp. vec_any_numeric r a Example Implementation int vector float xvcmpeqsp. t,a,a mfocrf u,2 rlwinm v,u,27,1 cntlzw w,v srwi r,w,5 int vector double xvcmpeqdp. t,a,a mfocrf u,2 rlwinm v,u,27,1 cntlzw w,v srwi r,w,5

Vector Any Out of Range r = vec_any_out (a, b) Purpose: Tests whether the value of any element of a vector is outside of a given range. Result value: r is 1 if the value of any element of a is greater than the value of the corresponding element of b or less than the negative of the value of the corresponding element of b. Otherwise, r is 0. Endian considerations: None. vcmpbfp. vec_any_out mfocrf vec_any_out rlwinm vec_any_out cntlzw vec_any_out srwi vec_any_out r a b Example Implementation int vector float vector float vcmpbfp. t,a,b mfocrf u,2 rlwinm v,u,27,1 cntlzw w,v srwi r,w,5

Vector Average r = vec_avg (a, b) Purpose: Returns a vector containing the elementwise average of two vectors. Result value: The value of each element of r is the average of the value of the corresponding elements of a and b. Endian considerations: None. vavgsb vec_avg vavgub vec_avg vavgsh vec_avg vavguh vec_avg vavgsw vec_avg vavguw vec_avg r a b Example Implementation vector signed char vector signed char vector signed char vavgsb r,a,b vector unsigned char vector unsigned char vector unsigned char vavgub r,a,b vector signed short vector signed short vector signed short vavgsh r,a,b vector unsigned short vector unsigned short vector unsigned short vavguh r,a,b vector signed int vector signed int vector signed int vavgsw r,a,b vector unsigned int vector unsigned int vector unsigned int vavguw r,a,b

Vector Bit Permute r = vec_bperm (a, b) Purpose: Gathers up to 16 one-bit values from a quadword or from each doubleword element in the specified order, zeroing other bits. Result value: When the type of a is vector unsigned char or vector unsigned __int128: For each i (0 ≤ i < 16), let bit index j denote the byte value of the ith element of b. If bit index j is greater than or equal to 128, bit i of r is set to 0. If bit index j is smaller than 128, bit 48+i of r is set to the value of the jth bit of a. All other bits of r are zeroed. When the type of a is vector unsigned long long: For each doubleword element i (0 ≤ i < 2) of a: For each j (0 ≤ j < 8), let bit index k denote the byte value of the (8i + j)th element of b. If bit index k is greater than or equal to 64, bit 56+j of element i of r is set to 0. If bit index k is less than 64, bit 56+j of element i of r is set to the value of the kth bit of element i of input a. All other bits are zeroed. An example for input a of type vector unsigned char follows: byte index 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 a FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF A9 b 7F 7E 7D 7C 7B 7A 79 78 77 76 75 74 73 72 71 70 Zoom in to view just the two bytes in a ([14..15]) containing the bits referenced by the bit indices b[i] (0 ≤ i < 16), ([7F..70]): byte index 14 15 bit index 70 71 72 73 74 75 76 77 78 79 7A 7B 7C 7D 7E 7F a FF A9 bit abit index 1 1 1 1 1 1 1 1 1 0 1 0 1 0 0 1 bit ab[i] 1 0 0 1 0 1 0 1 1 1 1 1 1 1 1 1 intermediate result 95 FF byte index 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 r 00 00 00 00 00 00 95 FF 00 00 00 00 00 00 00 00 Endian considerations: All bit and byte numberings within each element in the above description denote big-endian (i.e., left-to-right) order, reflecting the underlying hardware instruction. Unlike most of the vector intrinsics in this chapter, vec_bperm does not follow the bi-endian programming model. vbpermq vec_bperm vbpermd vec_bperm r a b Example Implementation Restrictions vector unsigned char vector unsigned char vector unsigned char vbpermq r,a,b vector unsigned long long vector unsigned __int128 vector unsigned char vbpermq r,a,b vector unsigned long long vector unsigned long long vector unsigned char vbpermd r,a,b ISA 3.0 or later

Vector Blend Variable r = vec_blendv (a, b, c) Purpose: Blend two source vectors according to the sign bits of the corresponding elements of a third source vector. Result value: For each element of c, if bit 0 of that element is equal to 0, the corresponding element of r is set to the corresponding element of a. Otherwise, the corresponding element of r is set to the corresponding element of b. Endian considerations: None. xxblendvb vec_blendv xxblendvh vec_blendv xxblendvw vec_blendv xxblendvd vec_blendv r a b c Example Implementation Restrictions vector signed char vector signed char vector signed char vector signed char xxblendvb r,a,b,c ISA 3.1 or later vector unsigned char vector unsigned char vector unsigned char vector unsigned char xxblendvb r,a,b,c ISA 3.1 or later vector signed short vector signed short vector signed short vector signed short xxblendvh r,a,b,c ISA 3.1 or later vector unsigned short vector unsigned short vector unsigned short vector unsigned short xxblendvh r,a,b,c ISA 3.1 or later vector signed int vector signed int vector signed int vector signed int xxblendvw r,a,b,c ISA 3.1 or later vector unsigned int vector unsigned int vector unsigned int vector unsigned int xxblendvw r,a,b,c ISA 3.1 or later vector signed long long vector signed long long vector signed long long vector signed long long xxblendvd r,a,b,c ISA 3.1 or later vector unsigned long long vector unsigned long long vector unsigned long long vector unsigned long long xxblendvd r,a,b,c ISA 3.1 or later vector float vector float vector float vector float xxblendvw r,a,b,c ISA 3.1 or later vector double vector double vector double vector double xxblendvd r,a,b,c ISA 3.1 or later

Vector Ceiling r = vec_ceil (a) Purpose: Returns a vector r that contains the result of applying the floating-point ceiling function to each element of a. Result value: The value of each element of r is the smallest representable floating-point integral value greater than or equal to the value of the corresponding element of a. Endian considerations: None. xvrspip vec_ceil xvrdpip vec_ceil r a Example Implementation vector float vector float xvrspip r,a vector double vector double xvrdpip r,a

Vector Centrifuge r = vec_cfuge (a, b) Purpose: For each element in an input vector, separates its bits to the right and left within a target vector element, according to the mask in the corresponding element of a second input vector. Result value: For each element of a, the bits whose corresponding bits in the mask in the corresponding element of b equal 1 are placed in the rightmost bits in the corresponding element of r, maintaining their original relative order. The other bits of the element of a are placed in the leftmost bits in the corresponding element of r, maintaining their original relative order. An example for doubleword inputs follows: Element 0 Element 1 a 0x0123456789abcdef 0x0123456789abcdef b 0x0f0f0f0f0f0f0f0f 0xffff0000ffff0000 r 0x02468ace13579bdf 0x4567cdef012389ab Endian considerations: None. vcfuged vec_cfuge r a b Example Implementation Restrictions vector unsigned long long vector unsigned long long vector unsigned long long vcfuged r,a,b ISA 3.1 or later

Vector AES Cipher Big-Endian r = vec_cipher_be (a, b) Purpose: Performs one round of the AES cipher operation on an intermediate state array a by using a given round key b. Result value: r contains the resulting intermediate state, after one round of the AES cipher operation on intermediate state array a, using the round key specified by b. Endian considerations: All element and bit numberings of the AES cipher operation use big-endian (i.e., left-to-right) order, reflecting the underlying hardware instruction. Unlike most of the vector intrinsics in this chapter, vec_cipher_be does not follow the bi-endian programming model. vcipher vec_cipher_be r a b Example Implementation vector unsigned char vector unsigned char vector unsigned char vcipher r,a,b

Vector AES Cipher Last Big-Endian r = vec_cipherlast_be (a, b) Purpose: Performs the final round of the AES cipher operation on an intermediate state array a using the specified round key b. Result value: r contains the resulting final state, after the final round of the AES cipher operation on intermediate state array a, using the round key specified by b. Endian considerations: All element and bit numberings of the AES cipher-last operation use big-endian (i.e., left-to-right) order, reflecting the underlying hardware instruction. Unlike most of the vector intrinsics in this chapter, vec_cipherlast_be does not follow the bi-endian programming model. vcipherlast vec_cipherlast_be r a b Example Implementation vector unsigned char vector unsigned char vector unsigned char vcipherlast r,a,b

Vector Clear First r = vec_clr_first (a, b) Purpose: Clear the first N elements of a vector to zero. Result value: Let N be the value of b. The first N elements of r are set to zero. The remaining elements of r are copied from the corresponding elements of a. b must have a value between 1 and the number of elements of a, inclusive, but need not be a literal constant. Endian considerations: The element numbering within a register is left-to-right for big-endian targets, and right-to-left for little-endian targets. vclrlb vec_clr_first vclrrb vec_clr_first r a b Example LE Implementation Example BE Implementation Restrictions vector signed char vector signed char unsigned int vclrrb r,a,16-b vclrlb r,a,16-b ISA 3.1 or later vector unsigned char vector unsigned char unsigned int vclrrb r,a,16-b vclrlb r,a,16-b ISA 3.1 or later

Vector Clear Last r = vec_clr_last (a, b) Purpose: Clear the last N elements of a vector to zero. Result value: Let N be the value of b. The last N elements of r are set to zero. The remaining elements of r are copied from the corresponding elements of a. b must have a value between 1 and the number of elements of a, inclusive, but need not be a literal constant. Endian considerations: The element numbering within a register is left-to-right for big-endian targets, and right-to-left for little-endian targets. vclrlb vec_clr_last vclrrb vec_clr_last r a b Example LE Implementation Example BE Implementation Restrictions vector signed char vector signed char unsigned int vclrlb r,a,16-b vclrrb r,a,16-b ISA 3.1 or later vector unsigned char vector unsigned char unsigned int vclrlb r,a,16-b vclrrb r,a,16-b ISA 3.1 or later

Vector Compare Bytes r = vec_cmpb (a, b) Purpose: Performs a bounds comparison of each set of corresponding elements of two vectors. Result value: Each element of r has the value 0 if the value of the corresponding element of a is less than or equal to the value of the corresponding element of b and greater than or equal to the negated value of the corresponding element of b. Otherwise: If an element of b is greater than or equal to 0, then the value of the corresponding element of r is 0 if the absolute value of the corresponding element of a is equal to the value of the corresponding element of b. The value is negative if it is greater than the value of the corresponding element of b. It is positive if it is less than the value of the corresponding element of b. If an element of b is less than 0, then the value of the element of r is positive if the value of the corresponding element of a is less than or equal to the value of the element of b. Otherwise, it is negative. Endian considerations: None. vcmpbfp vec_cmpb r a b Example Implementation vector signed int vector float vector float vcmpbfp r,a,b

Vector Compare Equal r = vec_cmpeq (a, b) Purpose: Returns a vector containing the results of comparing each set of corresponding elements of two vectors for equality. Result value: For each element of r, the value of each bit is 1 if the corresponding elements of a and b are equal. Otherwise, the value of each bit is 0. Endian considerations: None. vcmpequb vec_cmpeq vcmpequh vec_cmpeq vcmpequw vec_cmpeq vcmpequd vec_cmpeq vcmpequq vec_cmpeq xvcmpeqsp vec_cmpeq xvcmpeqdp vec_cmpeq r a b Example Implementation Restrictions vector bool char vector bool char vector bool char vcmpequb r,a,b vector bool char vector signed char vector signed char vcmpequb r,a,b vector bool char vector unsigned char vector unsigned char vcmpequb r,a,b vector bool short vector bool short vector bool short vcmpequh r,a,b vector bool short vector signed short vector signed short vcmpequh r,a,b vector bool short vector unsigned short vector unsigned short vcmpequh r,a,b vector bool int vector bool int vector bool int vcmpequw r,a,b vector bool int vector signed int vector signed int vcmpequw r,a,b vector bool int vector unsigned int vector unsigned int vcmpequw r,a,b vector bool long long vector bool long long vector bool long long vcmpequd r,a,b vector bool long long vector signed long long vector signed long long vcmpequd r,a,b vector bool long long vector unsigned long long vector unsigned long long vcmpequd r,a,b vector bool __int128 vector bool __int128 vector bool __int128 vcmpequq r,a,b ISA 3.1 or later vector bool __int128 vector signed __int128 vector signed __int128 vcmpequq r,a,b ISA 3.1 or later vector bool __int128 vector unsigned __int128 vector unsigned __int128 vcmpequq r,a,b ISA 3.1 or later vector bool int vector float vector float xvcmpeqsp r,a,b vector bool long long vector double vector double xvcmpeqdp r,a,b

Vector Compare Greater or Equal r = vec_cmpge (a, b) Purpose: Returns a vector containing the results of a greater-than-or-equal-to comparison between each set of corresponding elements of two vectors. Result value: For each element of r, the value of each bit is 1 if the corresponding element of a is greater than or equal to the corresponding element of b. Otherwise, the value of each bit is 0. Endian considerations: None. vcmpgtsb vec_cmpge xxlnor vec_cmpge vcmpgtub vec_cmpge vcmpgtsh vec_cmpge vcmpgtuh vec_cmpge vcmpgtsw vec_cmpge vcmpgtuw vec_cmpge vcmpgtsd vec_cmpge vcmpgtud vec_cmpge vcmpgtsq vec_cmpge vcmpgtuq vec_cmpge xvcmpgesp vec_cmpge xvcmpgedp vec_cmpge r a b Example Implementation Restrictions vector bool char vector signed char vector signed char vcmpgtsb t,b,a xxlnor r,t,t vector bool char vector unsigned char vector unsigned char vcmpgtub t,b,a xxlnor r,t,t vector bool short vector signed short vector signed short vcmpgtsh t,b,a xxlnor r,t,t vector bool short vector unsigned short vector unsigned short vcmpgtuh t,b,a xxlnor r,t,t vector bool int vector signed int vector signed int vcmpgtsw t,b,a xxlnor r,t,t vector bool int vector unsigned int vector unsigned int vcmpgtuw t,b,a xxlnor r,t,t vector bool long long vector signed long long vector signed long long vcmpgtsd t,b,a xxlnor r,t,t vector bool long long vector unsigned long long vector unsigned long long vcmpgtud t,b,a xxlnor r,t,t vector bool __int128 vector signed __int128 vector signed __int128 vcmpgtsq t,b,a xxlnor r,t,t ISA 3.1 or later vector bool __int128 vector unsigned __int128 vector unsigned __int128 vcmpgtuq t,b,a xxlnor r,t,t ISA 3.1 or later vector bool int vector float vector float xvcmpgesp r,a,b vector bool long long vector double vector double xvcmpgedp r,a,b

Vector Compare Greater Than r = vec_cmpgt (a, b) Purpose: Returns a vector containing the results of a greater-than comparison between each set of corresponding elements of two vectors. Result value: For each element of r, the value of each bit is 1 if the corresponding element of a is greater than the corresponding element of b. Otherwise, the value of each bit is 0. Endian considerations: None. vcmpgtsb vec_cmpgt vcmpgtub vec_cmpgt vcmpgtsh vec_cmpgt vcmpgtuh vec_cmpgt vcmpgtsw vec_cmpgt vcmpgtuw vec_cmpgt vcmpgtsd vec_cmpgt vcmpgtud vec_cmpgt vcmpgtsq vec_cmpgt vcmpgtuq vec_cmpgt xvcmpgtsp vec_cmpgt xvcmpgtdp vec_cmpgt r a b Example Implementation Restrictions vector bool char vector signed char vector signed char vcmpgtsb r,a,b vector bool char vector unsigned char vector unsigned char vcmpgtub r,a,b vector bool short vector signed short vector signed short vcmpgtsh r,a,b vector bool short vector unsigned short vector unsigned short vcmpgtuh r,a,b vector bool int vector signed int vector signed int vcmpgtsw r,a,b vector bool int vector unsigned int vector unsigned int vcmpgtuw r,a,b vector bool long long vector signed long long vector signed long long vcmpgtsd r,a,b vector bool long long vector unsigned long long vector unsigned long long vcmpgtud r,a,b vector bool __int128 vector signed __int128 vector signed __int128 vcmpgtsq r,a,b ISA 3.1 or later vector bool __int128 vector unsigned __int128 vector unsigned __int128 vcmpgtuq r,a,b ISA 3.1 or later vector bool int vector float vector float xvcmpgtsp r,a,b vector bool long long vector double vector double xvcmpgtdp r,a,b

Vector Compare Less Than or Equal r = vec_cmple (a, b) Purpose: Returns a vector containing the results of a less-than-or-equal comparison between each set of corresponding elements of two vectors. Result value: For each element of r, the value of each bit is 1 if the corresponding element of a is less than or equal to the corresponding element of b. Otherwise, the value of each bit is 0. Endian considerations: None. vcmpgtsb vec_cmple xxlnor vec_cmple vcmpgtub vec_cmple vcmpgtsh vec_cmple vcmpgtuh vec_cmple vcmpgtsw vec_cmple vcmpgtuw vec_cmple vcmpgtsd vec_cmple vcmpgtud vec_cmple vcmpgtsq vec_cmple vcmpgtuq vec_cmple xvcmpgesp vec_cmple xvcmpgedp vec_cmple r a b Example Implementation Restrictions vector bool char vector signed char vector signed char vcmpgtsb t,a,b xxlnor r,t,t vector bool char vector unsigned char vector unsigned char vcmpgtub t,a,b xxlnor r,t,t vector bool short vector signed short vector signed short vcmpgtsh t,a,b xxlnor r,t,t vector bool short vector unsigned short vector unsigned short vcmpgtuh t,a,b xxlnor r,t,t vector bool int vector signed int vector signed int vcmpgtsw t,a,b xxlnor r,t,t vector bool int vector unsigned int vector unsigned int vcmpgtuw t,a,b xxlnor r,t,t vector bool long long vector signed long long vector signed long long vcmpgtsd t,a,b xxlnor r,t,t vector bool long long vector unsigned long long vector unsigned long long vcmpgtud t,a,b xxlnor r,t,t vector bool __int128 vector signed __int128 vector signed __int128 vcmpgtsq t,a,b xxlnor r,t,t ISA 3.1 or later vector bool __int128 vector unsigned __int128 vector unsigned __int128 vcmpgtuq t,a,b xxlnor r,t,t ISA 3.1 or later vector bool int vector float vector float xvcmpgesp r,b,a vector bool long long vector double vector double xvcmpgedp r,b,a

Vector Compare Less Than r = vec_cmplt (a, b) Purpose: Returns a vector containing the results of a less-than comparison between each set of corresponding elements of two vectors. Result value: For each element of r, the value of each bit is 1 if the corresponding element of a is less than the corresponding element of b. Otherwise, the value of each bit is 0. Endian considerations: None. vcmpgtsb vec_cmplt vcmpgtub vec_cmplt vcmpgtsh vec_cmplt vcmpgtuh vec_cmplt vcmpgtsw vec_cmplt vcmpgtuw vec_cmplt vcmpgtsd vec_cmplt vcmpgtud vec_cmplt vcmpgtsq vec_cmplt vcmpgtuq vec_cmplt xvcmpgtsp vec_cmplt xvcmpgtdp vec_cmplt r a b Example Implementation Restrictions vector bool char vector signed char vector signed char vcmpgtsb r,b,a vector bool char vector unsigned char vector unsigned char vcmpgtub r,b,a vector bool short vector signed short vector signed short vcmpgtsh r,b,a vector bool short vector unsigned short vector unsigned short vcmpgtuh r,b,a vector bool int vector signed int vector signed int vcmpgtsw r,b,a vector bool int vector unsigned int vector unsigned int vcmpgtuw r,b,a vector bool long long vector signed long long vector signed long long vcmpgtsd r,b,a vector bool long long vector unsigned long long vector unsigned long long vcmpgtud r,b,a vector bool __int128 vector signed __int128 vector signed __int128 vcmpgtsq r,b,a ISA 3.1 or later vector bool __int128 vector unsigned __int128 vector unsigned __int128 vcmpgtuq r,b,a ISA 3.1 or later vector bool int vector float vector float xvcmpgtsp r,b,a vector bool long long vector double vector double xvcmpgtdp r,b,a

Vector Compare Not Equal r = vec_cmpne (a, b) Purpose: Returns a vector containing the results of comparing each set of corresponding elements of two vectors for inequality. Result value: For each element of r, the value of each bit is 1 if the corresponding elements of a and b are not equal. Otherwise, the value of each bit is 0. Endian considerations: None. vcmpneb vec_cmpne vcmpneh vec_cmpne vcmpnew vec_cmpne vcmpequd vec_cmpne vcmpequq vec_cmpne xxlnor vec_cmpne xvcmpeqsp vec_cmpne xvcmpeqdp vec_cmpne r a b Example Implementation Restrictions vector bool char vector bool char vector bool char vcmpneb r,a,b vector bool char vector signed char vector signed char vcmpneb r,a,b vector bool char vector unsigned char vector unsigned char vcmpneb r,a,b vector bool short vector bool short vector bool short vcmpneh r,a,b vector bool short vector signed short vector signed short vcmpneh r,a,b vector bool short vector unsigned short vector unsigned short vcmpneh r,a,b vector bool int vector bool int vector bool int vcmpnew r,a,b vector bool int vector signed int vector signed int vcmpnew r,a,b vector bool int vector unsigned int vector unsigned int vcmpnew r,a,b vector bool long long vector bool long long vector bool long long vcmpequd t,a,b xxlnor r,t,t vector bool long long vector signed long long vector signed long long vcmpequd t,a,b xxlnor r,t,t vector bool long long vector unsigned long long vector unsigned long long vcmpequd t,a,b xxlnor r,t,t vector bool __int128 vector bool __int128 vector bool __int128 vcmpequq t,a,b xxlnor r,t,t ISA 3.1 or later vector bool __int128 vector signed __int128 vector signed __int128 vcmpequq t,a,b xxlnor r,t,t ISA 3.1 or later vector bool __int128 vector unsigned __int128 vector unsigned __int128 vcmpequq t,a,b xxlnor r,t,t ISA 3.1 or later vector bool int vector float vector float xvcmpeqsp t,a,b xxlnor r,t,t vector bool long long vector double vector double xvcmpeqdp t,a,b xxlnor r,t,t

Vector Compare Not Equal or Zero r = vec_cmpnez (a, b) Purpose: Returns a vector containing the results of comparing each set of corresponding elements of two vectors for inequality, or for an element with a zero value. Result value: For each element of r, the value of each bit is 1 if the corresponding elements of a and b are not equal, or if the a element or the b element is zero. Otherwise, the value of each bit is 0. Endian considerations: None. vcmpnezb vec_cmpnez vcmpnezh vec_cmpnez vcmpnezw vec_cmpnez r a b Example Implementation Restrictions vector bool char vector signed char vector signed char vcmpnezb r,a,b ISA 3.0 or later vector bool char vector unsigned char vector unsigned char vcmpnezb r,a,b ISA 3.0 or later vector bool short vector signed short vector signed short vcmpnezh r,a,b ISA 3.0 or later vector bool short vector unsigned short vector unsigned short vcmpnezh r,a,b ISA 3.0 or later vector bool int vector signed int vector signed int vcmpnezw r,a,b ISA 3.0 or later vector bool int vector unsigned int vector unsigned int vcmpnezw r,a,b ISA 3.0 or later

Vector Count Leading Zeros r = vec_cntlz (a) Purpose: Returns a vector containing the number of most-significant bits equal to zero of each corresponding element of the source vector. Result value: The value of each element of r is set to the number of leading zeros of the corresponding element of a. An example for input a of type vector unsigned char follows: byte index 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 a 00 10 20 30 48 58 64 74 82 92 A1 B1 C0 D0 E0 F0 r 08 03 02 02 01 01 01 01 00 00 00 00 00 00 00 00 Endian considerations: None. vclzb vec_cntlz vclzh vec_cntlz vclzw vec_cntlz vclzd vec_cntlz r a Example Implementation Restrictions vector signed char vector signed char vclzb r,a vector unsigned char vector unsigned char vclzb r,a vector signed short vector signed short vclzh r,a vector unsigned short vector unsigned short vclzh r,a vector signed int vector signed int vclzw r,a vector unsigned int vector unsigned int vclzw r,a vector signed long long vector signed long long vclzd r,a vector unsigned long long vector unsigned int long long vclzd r,a

Vector Count Leading Zero Least-Significant Bits by Byte r = vec_cntlz_lsbb (a) Purpose: Returns the number of leading byte elements (starting at the lowest-numbered element) of a vector that have a least-significant bit of zero. Result value: The value of r is set to the number of leading byte elements (starting at the lowest-numbered element) of a that have a least-significant bit of zero. An example for input a of type vector unsigned char follows: byte index n 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 a 00 10 20 30 48 58 64 74 82 92 A1 B1 C0 D0 E0 F0 least-significant bit of an 0 0 0 0 0 0 0 0 0 0 1 1 0 0 0 0 r 0x0A (10) Endian considerations: The element numbering within a register is left-to-right for big-endian targets, and right-to-left for little-endian targets. vclzlsbb vec_cntlz_lsbb r a Example BE Implementation Example LE Implementation Restrictions signed int vector signed char vclzlsbb r,a vctzlsbb r,a ISA 3.0 or later signed int vector unsigned char vclzlsbb r,a vctzlsbb r,a ISA 3.0 or later

Vector Count Leading Zeros Under Mask r = vec_cntlzm (a, b) Purpose: For each element, returns the number of leading consecutive zero bits in the first argument that correspond to one bits in the second argument. Result value: Each element of r is set to the number of consecutive zero bits, starting on the left, in the corresponding element of a that correspond to one bits in the corresponding element of b. An example for doubleword inputs follows: Element 0 Element 1 a 0x0123456789abcdef 0x0123456789abcdef b 0xaaaaaaaaaaaaaaaa 0xcccccccccccccccc r 5 9 Consider element 0 in the above table. The first sixteen bits of a are 0000 0001 0010 0011. The first sixteen bits of b are 1010 1010 1010 1010. Applying the mask of b to a means that we only consider the even-numbered bits of a, which are 0 0 0 0 0 1 0 1. The number of leading zeros in this result is 5. Endian considerations: None. vclzdm vec_cntlzm r a b Example Implementation Restrictions vector unsigned long long vector unsigned long long vector unsigned long long vclzdm r,a,b ISA 3.1 or later

Vector Count Mask r = vec_cntm (a, b) Purpose: Count the number of elements with their high-order bit equal to a specific value. Result value: Let N be 7 when a is a vector unsigned char, 6 when a is a vector unsigned short, 5 when a is a vector unsigned int, and 4 when a is a vector unsigned long long. Then bits 0:N of r are set to the number of elements in a whose high-order bit is equal to b, which must be either 0 or 1. Bits N+1:53 of r are set to 0. Endian considerations: None. Notes: The somewhat odd definition of the result value is intended to allow r to be consumed efficiently by the VSX Load Vector with Length (lxvl) instruction. vcntmbb vec_cntm vcntmbh vec_cntm vcntmbw vec_cntm vcntmbd vec_cntm r a b Example Implementation Restrictions unsigned long long vector unsigned char const unsigned char vcntmbb r,a,b ISA 3.1 or later unsigned long long vector unsigned short const unsigned char vcntmbh r,a,b ISA 3.1 or later unsigned long long vector unsigned int const unsigned char vcntmbw r,a,b ISA 3.1 or later unsigned long long vector unsigned long long const unsigned char vcntmbd r,a,b ISA 3.1 or later

Vector Count Trailing Zeros r = vec_cnttz (a) Purpose: Returns a vector containing the number of least-significant bits equal to zero of each corresponding element of the source vector. Result value: The value of each element of r is set to the number of trailing zeros of the corresponding element of a. An example for input a of type vector unsigned char follows: byte index 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 a 00 10 20 30 48 58 64 74 82 92 A1 B1 C0 D0 E0 F0 r 08 04 05 04 03 03 02 02 01 01 00 00 06 04 05 04 Endian considerations: None. vctzb vec_cnttz vctzh vec_cnttz vctzw vec_cnttz vctzd vec_cnttz r a Example Implementation Restrictions vector signed char vector signed char vctzb r,a ISA 3.0 or later vector unsigned char vector unsigned char vctzb r,a ISA 3.0 or later vector signed short vector signed short vctzh r,a ISA 3.0 or later vector unsigned short vector unsigned short vctzh r,a ISA 3.0 or later vector signed int vector signed int vctzw r,a ISA 3.0 or later vector unsigned int vector unsigned int vctzw r,a ISA 3.0 or later vector signed long long vector signed long long vctzd r,a ISA 3.0 or later vector unsigned long long vector unsigned int long long vctzd r,a ISA 3.0 or later

Vector Count Trailing Zero Least-Significant Bits by Byte r = vec_cnttz_lsbb (a) Purpose: Returns the number of trailing byte elements (starting at the highest-numbered element) of a vector that have a least-significant bit of zero. Result value: The value of r is set to the number of trailing byte elements (starting at the highest-numbered element) of a that have a least-significant bit of zero. An example for input a of type vector unsigned char follows: byte index n 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 a 00 10 20 30 48 58 64 74 82 92 A1 B1 C0 D0 E0 F0 least-significant bit of an 0 0 0 0 0 0 0 0 0 0 1 1 0 0 0 0 r 0x04 (4) Endian considerations: The element numbering within a register is left-to-right for big-endian targets, and right-to-left for little-endian targets. vctzlsbb vec_cnttz_lsbb r a Example BE Implementation Example LE Implementation Restrictions signed int vector signed char vctzlsbb r,a vclzlsbb r,a ISA 3.0 or later signed int vector unsigned char vctzlsbb r,a vclzlsbb r,a ISA 3.0 or later

Vector Count Trailing Zeros Under Mask r = vec_cnttzm (a, b) Purpose: For each element, returns the number of trailing consecutive zero bits in the first argument that correspond to one bits in the second argument. Result value: Each element of r is set to the number of consecutive zero bits, starting on the right, in the corresponding element of a that correspond to one bits in the corresponding element of b. An example for doubleword inputs follows: Element 0 Element 1 a 0xfedcba9876543210 0xfedcba9876543210 b 0xaaaaaaaaaaaaaaaa 0xcccccccccccccccc r 4 8 Consider element 0 in the above table. The last sixteen bits of a are 0011 0010 0001 0000. The last sixteen bits of b are 1010 1010 1010 1010. Applying the mask of b to a means that we only consider the even-numbered bits of a, which are 0 1 0 1 0 0 0 0. The number of trailing zeros in this result is 4. Endian considerations: None. vctzdm vec_cnttzm r a b Example Implementation Restrictions vector unsigned long long vector unsigned long long vector unsigned long long vctzdm r,a,b ISA 3.1 or later

Vector Copy Sign r = vec_cpsgn (a, b) Purpose: Returns a vector by copying the sign of the elements in one vector to the sign of the corresponding elements of another vector. Result value: The value of each element of r is set to the corresponding element of b with its sign replaced by the sign from the corresponding element of a. Endian considerations: None. xvcpsgnsp vec_cpsgn xvcpsgndp vec_cpsgn r a b Example Implementation Restrictions vector float vector float vector float xvcpsgnsp r,a,b vector double vector double vector double xvcpsgndp r,a,b

Vector Convert to Floating-Point r = vec_ctf (a, b) Purpose: Converts an integer vector into a floating-point vector. Result value: The value of each element of r is the closest floating-point approximation of the value of the corresponding element of a divided by 2 to the power of b, which must be in the range 0–31. Endian considerations: None. Notes: The example implementations below assume b is zero, so that the scaling code is omitted. Scaling is accomplished by multiplying each element of r by 2 to the power of –b. vcfsx vec_ctf vcfux vec_ctf r a b Example Implementation vector float vector signed int 5-bit unsigned literal vcfsx r,a,b vector float vector unsigned int 5-bit unsigned literal vcfux r,a,b vector double vector signed long long 5-bit unsigned literal xvcvsxddp r,a,b vector double vector unsigned long long 5-bit unsigned literal xvcvuxddp r,a,b

Vector Convert to Signed Integer r = vec_cts (a, b) Purpose: Converts a floating-point vector into a signed integer vector. Result value: The value of each element of r is the saturated signed-integer value, truncated towards zero, obtained by multiplying the corresponding element of a multiplied by 2 to the power of b, which must be in the range 0–31. Endian considerations: None. Notes: The example implementation when a is a vector double assumes that the constant 2 to the power of b has been loaded into floating-point register c. vctsxs vec_cts xvcvdpsxds vec_cts xvmuldp vec_cts r a b Example Implementation vector signed int vector float 5-bit unsigned literal vctsxs r,a,b vector signed long long vector double 5-bit unsigned literal xvmuldp t,a,c xvcvdpsxds r,t

Vector Convert to Unsigned Integer r = vec_ctu (a, b) Purpose: Converts a floating-point vector into an unsigned integer vector. Result value: The value of each element of r is the saturated unsigned-integer value, truncated towards zero, obtained by multiplying the corresponding element of a multiplied by 2 to the power of b, which must be in the range 0–31. Endian considerations: None. Notes: The example implementation when a is a vector double assumes that the constant 2 to the power of b has been loaded into floating-point register c. vctuxs vec_ctu xvcvdpuxds vec_ctu xvmuldp vec_ctu r a b Example Implementation vector unsigned int vector float 5-bit unsigned literal vctuxs r,a,b vector unsigned long long vector double 5-bit unsigned literal xvmuldp t,a,c xvcvdpuxds r,t

Vector Divide r = vec_div (a, b) Purpose: Divides the elements in one vector by the corresponding elements in another vector and places the quotients in the result vector. Result value: The value of each element of r is obtained by dividing the corresponding element of a by the corresponding element of b. Endian considerations: None. Notes: For integer division, when any element of b is zero, the corresponding element of r is undefined. For signed integer division, when an element of a is the negative number with maximum cardinality (e.g., 0x8000_0000 for 32-bit signed integers) and the corresponding element of b is negative one, the corresponding element of r is undefined. xxspltd vec_div mfvsrd vec_div divd vec_div mtvsrd vec_div xxmrghd vec_div xvdivsp vec_div xvdivdp vec_div vdivsw vec_div vdivuw vec_div vdivsd vec_div vdivud vec_div vdivsq vec_div vdivuq vec_div r a b Example ISA 2.07 and 3.0 Implementation Example ISA 3.1 Implementation Restrictions vector signed int vector signed int vector signed int Not required vdivsw r,a,b ISA 3.1 or later vector unsigned int vector unsigned int vector unsigned int Not required vdivuw r,a,b ISA 3.1 or later vector signed long long vector signed long long vector signed long long xxspltd t,a,1 mfvsrd u,t xxspltd v,b,1 mfvsrd w,v divd x,u,w mfvsrd u,a mtvsrd y,x mfvsrd w,b divd x,u,w mtvsrd z,x xxmrghd r,z,y vdivsd r,a,b vector unsigned long long vector unsigned long long vector unsigned long long xxspltd t,a,1 mfvsrd u,t xxspltd v,b,1 mfvsrd w,v divd x,u,w mfvsrd u,a mtvsrd y,x mfvsrd w,b divd x,u,w mtvsrd z,x xxmrghd r,z,y vdivud r,a,b vector signed __int128 vector signed __int128 vector signed __int128 Not required vdivsq r,a,b ISA 3.1 or later vector unsigned __int128 vector unsigned __int128 vector unsigned __int128 Not required vdivuq r,a,b ISA 3.1 or later vector float vector float vector float xvdivsp r,a,b xvdivsp r,a,b vector double vector double vector double xvdivdp r,a,b xvdivdp r,a,b

Vector Divide Extended r = vec_dive (a, b) Purpose: Divides the left-shifted elements in one vector by the corresponding elements in another vector and places the quotients in the result vector. Result value: The value of each element of r is obtained by shifting the corresponding element of a left by the element size in bits, and then dividing that value by the corresponding element of b. For example, the shift amount is 32 bits for "int" and 64 bits for "long long." Endian considerations: None. Notes: When any element of b is zero, the corresponding element of r is undefined. If any quotient cannot be represented in the element type of r, the corresponding element of r is undefined. vdivesw vec_dive vdiveuw vec_dive vdivesd vec_dive vdiveud vec_dive vdivesq vec_dive vdiveuq vec_dive r a b Example Implementation Restrictions vector signed int vector signed int vector signed int vdivesw r,a,b ISA 3.1 or later vector unsigned int vector unsigned int vector unsigned int vdiveuw r,a,b ISA 3.1 or later vector signed long long vector signed long long vector signed long long vdivesd r,a,b ISA 3.1 or later vector unsigned long long vector unsigned long long vector unsigned long long vdiveud r,a,b ISA 3.1 or later vector signed __int128 vector signed __int128 vector signed __int128 vdivesq r,a,b ISA 3.1 or later vector unsigned __int128 vector unsigned __int128 vector unsigned __int128 vdiveuq r,a,b ISA 3.1 or later

Vector Convert to Double Precision r = vec_double (a) Purpose: Converts a vector of long integers into a vector of double-precision numbers. Result value: The value of each element of r is obtained by converting the corresponding element of a to double precision floating-point. Endian considerations: None. xvcvsxddp vec_double xvcvuxddp vec_double r a Example Implementation vector double vector signed long long xvcvsxddp r,a vector double vector unsigned long long xvcvuxddp r,a

Vector Convert Even Elements to Double Precision r = vec_doublee (a) Purpose: Converts the even elements of a vector into a vector of double-precision numbers. Result value: Elements 0 and 1 of r are set to the converted values of elements 0 and 2 of a. An example for input a of type vector signed int follows: doubleword index 0 1 word index 0 1 2 3 a 00000001 (ignored) FFFFFFFF (ignored) r 1.0 -1.0 Endian considerations: Differences in element numbering require different implementations for big- and little-endian code generation. xxsldwi vec_doublee xvcvsxwdp vec_doublee xvcvuxwdp vec_doublee xvcvspdp vec_doublee r a Example LE Implementation Example BE Implementation Restrictions vector double vector signed int xxsldwi t,a,a,1 xvcvsxwdp r,t xvcvsxwdp r,a vector double vector unsigned int xxsldwi t,a,a,1 xvcvuxwdp r,t xvcvuxwdp r,a vector double vector float xxsldwi t,a,a,1 xvcvspdp r,t xvcvspdp r,a

Vector Convert High Elements to Double Precision r = vec_doubleh (a) Purpose: Converts the high-order elements of a vector into a vector of double-precision numbers. Result value: Elements 0 and 1 of r are set to the converted values of elements 0 and 1 of a. An example for input a of type vector signed int follows: doubleword index 0 1 word index 0 1 2 3 a 00000001 FFFFFFFF (ignored) (ignored) r 1.0 -1.0 Endian considerations: Differences in element numbering require different implementations for big- and little-endian code generation. xxsldwi vec_doubleh xvcvsxwdp vec_doubleh xvcvuxwdp vec_doubleh xvcvspdp vec_doubleh r a Example LE Implementation Example BE Implementation Restrictions vector double vector signed int xxsldwi t,a,a,3 xxsldwi u,a,t,2 xvcvsxwdp r,u xxsldwi t,a,a,1 xxsldwi u,t,a,3 xvcvsxwdp r,u vector double vector unsigned int xxsldwi t,a,a,3 xxsldwi u,a,t,2 xvcvuxwdp r,u xxsldwi t,a,a,1 xxsldwi u,t,a,3 xvcvuxwdp r,u vector double vector float xxsldwi t,a,a,3 xxsldwi u,a,t,2 xvcvspdp r,u xxsldwi t,a,a,1 xxsldwi u,t,a,3 xvcvspdp r,u

Vector Convert Low Elements to Double Precision r = vec_doublel (a) Purpose: Converts the low-order elements of a vector into a vector of double-precision numbers. Result value: Elements 0 and 1 of r are set to the converted values of elements 2 and 3 of a. An example for input a of type vector signed int follows: doubleword index 0 1 word index 0 1 2 3 a (ignored) (ignored) 00000001 FFFFFFFF r 1.0 -1.0 Endian considerations: Differences in element numbering require different implementations for big- and little-endian code generation. xxsldwi vec_doublel xvcvsxwdp vec_doublel xvcvuxwdp vec_doublel xvcvspdp vec_doublel r a Example LE Implementation Example BE Implementation Restrictions vector double vector signed int xxsldwi t,a,a,1 xxsldwi u,t,a,3 xvcvsxwdp r,u xxsldwi t,a,a,3 xxsldwi u,a,t,2 xvcvsxwdp r,u vector double vector unsigned int xxsldwi t,a,a,1 xxsldwi u,t,a,3 xvcvuxwdp r,u xxsldwi t,a,a,3 xxsldwi u,a,t,2 xvcvuxwdp r,u vector double vector float xxsldwi t,a,a,1 xxsldwi u,t,a,3 xvcvspdp r,u xxsldwi t,a,a,3 xxsldwi u,a,t,2 xvcvspdp r,u

Vector Convert Odd Elements to Double Precision r = vec_doubleo (a) Purpose: Converts the odd elements of a vector into a vector of double-precision numbers. Result value: Elements 0 and 1 of r are set to the converted values of elements 1 and 3 of a. An example for input a of type vector signed int follows: doubleword index 0 1 word index 0 1 2 3 a (ignored) 00000001 (ignored) FFFFFFFF r 1.0 -1.0 Endian considerations: Differences in element numbering require different implementations for big- and little-endian code generation. xvcvsxwdp vec_doubleo xxsldwi vec_doubleo xvcvuxwdp vec_doubleo xvcvspdp vec_doubleo r a Example LE Implementation Example BE Implementation Restrictions vector double vector signed int xvcvsxwdp r,a xxsldwi t,a,a,1 xvcvsxwdp r,t vector double vector unsigned int xvcvuxwdp r,a xxsldwi t,a,a,1 xvcvuxwdp r,t vector double vector float xvcvspdp r,a xxsldwi t,a,a,1 xvcvspdp r,t

Vector Equivalence r = vec_eqv (a, b) Purpose: Performs a bitwise equivalence (exclusive NOR) of two vectors. Result value: The value of r is the bitwise XNOR of a and b. Endian considerations: None. xxleqv vec_eqv r a b Example Implementation vector bool char vector bool char vector bool char xxleqv r,a,b vector signed char vector signed char vector signed char xxleqv r,a,b vector unsigned char vector unsigned char vector unsigned char xxleqv r,a,b vector bool short vector bool short vector bool short xxleqv r,a,b vector signed short vector signed short vector signed short xxleqv r,a,b vector unsigned short vector unsigned short vector unsigned short xxleqv r,a,b vector signed int vector signed int vector signed int xxleqv r,a,b vector bool int vector bool int vector bool int xxleqv r,a,b vector unsigned int vector unsigned int vector unsigned int xxleqv r,a,b vector bool long long vector bool long long vector bool long long xxleqv r,a,b vector signed long long vector signed long long vector signed long long xxleqv r,a,b vector unsigned long long vector unsigned long long vector unsigned long long xxleqv r,a,b vector float vector float vector float xxleqv r,a,b vector double vector double vector double xxleqv r,a,b

Vector Expand Mask r = vec_expandm (a) Purpose: Create an element mask based on high-order bits in the input elements. Result value: Each element of r is set to all zeros if the high-order bit of the corresponding element of a is equal to 0; otherwise it is set to all ones. Endian considerations: None. vexpandbm vec_expandm vexpandhm vec_expandm vexpandwm vec_expandm vexpanddm vec_expandm vexpandqm vec_expandm r a Example Implementation Restrictions vector unsigned char vector unsigned char vexpandbm r,a ISA 3.1 or later vector unsigned short vector unsigned short vexpandhm r,a ISA 3.1 or later vector unsigned int vector unsigned int vexpandwm r,a ISA 3.1 or later vector unsigned long long vector unsigned long long vexpanddm r,a ISA 3.1 or later vector unsigned __int128 vector unsigned __int128 vexpandqm r,a ISA 3.1 or later

Vector Exponential Estimate r = vec_expte (a) Purpose: Returns a vector r containing estimates of 2 raised to the power of the corresponding elements of a. Result value: The value of each element of r is the estimated value of 2 raised to the power of the corresponding element of a. Endian considerations: None. vexptefp vec_expte r a Example Implementation vector float vector float vexptefp r,a

Vector Extract r = vec_extract (a, b) Purpose: Returns the value of the bth element of vector a. Result value: The value of each element of r is the element of a at position b modulo the number of elements of a. Endian considerations: The element numbering within a register is left-to-right for big-endian targets, and right-to-left for little-endian targets. Notes: Prior to ISA 3.0, less efficient code sequences must be used to implement vec_extract. vextubrx vec_extract extsb vec_extract vextublx vec_extract slwi vec_extract vextuwrx vec_extract extsw vec_extract vextuwlx vec_extract xori vec_extract rldic vec_extract mtvsrdd vec_extract vslo vec_extract mfvsrd vec_extract vextuhrx vec_extract extsh vec_extract vextuhlx vec_extract rldicl vec_extract subfic vec_extract sldi vec_extract xscvspdp vec_extract r a b Example ISA 3.0 LE Implementation Example ISA 3.0 BE Implementation signed char vector signed char signed int vextubrx t,b,a extsb r,t vextublx t,b,a extsb r,t unsigned char vector bool char signed int vextubrx t,b,a vextublx t,b,a unsigned char vector unsigned char signed int vextubrx t,b,a vextublx t,b,a signed short vector signed short signed int slwi t,b,1 vextuhrx u,t,a extsh r,u slwi t,b,1 vextuhlx u,t,a extsh r,u unsigned short vector bool short signed int slwi t,b,1 vextuhrx r,t,a slwi t,b,1 vextuhlx r,t,a unsigned short vector unsigned short signed int slwi t,b,1 vextuhrx r,t,a slwi t,b,1 vextuhlx r,t,a signed int vector signed int signed int slwi t,b,2 vextuwrx u,t,a extsw r,u slwi t,b,2 vextuwlx u,t,a extsw r,u unsigned int vector bool int signed int slwi t,b,2 vextuwrx r,t,a slwi t,b,2 vextuwlx r,t,a unsigned int vector unsigned int signed int slwi t,b,2 vextuwrx r,t,a slwi t,b,2 vextuwlx r,t,a signed long long vector signed long long signed int xori t,b,0x1 rldic u,t,6,57 mtvsrdd v,u,u vslo w,a,v mfvsrd r,w rldic t,b,6,57 mtvsrdd u,t,t vslo v,a,u mfvsrd r,v unsigned long long vector bool long long signed int xori t,b,0x1 rldic u,t,6,57 mtvsrdd v,u,u vslo w,a,v mfvsrd r,w rldic t,b,6,57 mtvsrdd u,t,t vslo v,a,u mfvsrd r,v unsigned long long vector unsigned long long signed int xori t,b,0x1 rldic u,t,6,57 mtvsrdd v,u,u vslo w,a,v mfvsrd r,w rldic t,b,6,57 mtvsrdd u,t,t vslo v,a,u mfvsrd r,v float vector float signed int rldicl t,b,0,62 subfic u,t,3 sldi v,u,5 mtvsrdd w,v,v vslo x,a,w xscvspdp r,x sldi t,b,5 mtvsrdd u,t,t vslo v,a,u xscvspdp r,v double vector double signed int xori t,b,0x1 rldic u,t,6,57 mtvsrdd v,u,u vslo r,a,v rldic t,b,6,57 mtvsrdd u,t,t vslo r,a,u

Vector Extract Exponent r = vec_extract_exp (a) Purpose: Extracts exponents from a vector of floating-point numbers. Result value: Each element of r is extracted from the exponent field of the corresponding floating-point vector element of a. The extracted exponents of a are returned as right-justified unsigned integers containing biased exponents, in accordance with the exponent representation specified by IEEE 754, without further processing. Endian considerations: None. xvxexpdp vec_extract_exp xvxexpsp vec_extract_exp r a Example Implementation Restrictions vector unsigned int vector float xvxexpsp r,a ISA 3.0 or later vector unsigned long long vector double xvxexpdp r,a ISA 3.0 or later

Vector Extract Floats from High Elements of Vector Short Int r = vec_extract_fp32_from_shorth (a) Purpose: Extracts four single-precision floating-point numbers from the high elements of a vector of eight 16-bit elements, interpreting each element as a 16-bit floating-point number in IEEE format. Result value: The first four elements of a are interpreted as 16-bit floating-point numbers in IEEE format, and extended to single-precision format, returning a vector with four single-precision IEEE numbers. An example follows: halfword index 0 1 2 3 4 5 6 7 word index 0 1 2 3 a 3800 (0.5) 4200 (3.0) 4700 (7.0) 4B80 (15.0) 4FC0 (31.0) 53E0 (63.0) 57F0 (127.0) 5BF8 (255.0) r 0.5 3.0 7.0 15.0 Endian considerations: The element numbering within a register is left-to-right for big-endian targets, and right-to-left for little-endian targets. Notes: The example implementation assumes that the vperm instruction is used for big-endian, and the vpermr instruction is used for little-endian. The permute control vector for the vperm or vpermr instruction is in a memory location identified by pcv. The value located at pcv is identical in natural element order for big- and little-endian: { 15, 14, 0, 0, 13, 12, 0, 0, 11, 10, 0, 0, 9, 8, 0, 0 }. lxv vec_extract_fp32_from_shorth vperm vec_extract_fp32_from_shorth vpermr vec_extract_fp32_from_shorth xvcvhpsp vec_extract_fp32_from_shorth r a Example Implementation Restrictions vector float vector unsigned short lxv t,0(pcv) vperm[r] u,a,a,t xvcvhpsp r,u ISA 3.0 or later

Vector Extract Floats from Low Elements of Vector Short Int r = vec_extract_fp32_from_shortl (a) Purpose: Extracts four single-precision floating-point numbers from the low elements of a vector of eight 16-bit elements, interpreting each element as a 16-bit floating-point number in IEEE format. Result value: The last four elements of a are interpreted as 16-bit floating-point numbers in IEEE format, and extended to single-precision format, returning a vector with four single-precision IEEE numbers. An example follows: halfword index 0 1 2 3 4 5 6 7 word index 0 1 2 3 a 3800 (0.5) 4200 (3.0) 4700 (7.0) 4B80 (15.0) 4FC0 (31.0) 53E0 (63.0) 57F0 (127.0) 5BF8 (255.0) r 31.0 63.0 127.0 255.0 Endian considerations: The element numbering within a register is left-to-right for big-endian targets, and right-to-left for little-endian targets. Notes: The example implementation assumes that the vperm instruction is used for big-endian, and the vpermr instruction is used for little-endian. The permute control vector for the vperm or vpermr instruction is in a memory location identified by pcv. The value located at pcv is identical in natural element order for big- and little-endian: { 7, 6, 0, 0, 5, 4, 0, 0, 3, 2, 0, 0, 1, 0, 0, 0 }. lxv vec_extract_fp32_from_shortl vperm vec_extract_fp32_from_shortl vpermr vec_extract_fp32_from_shortl xvcvhpsp vec_extract_fp32_from_shortl r a Example Implementation Restrictions vector float vector unsigned short lxv t,0(pcv) vperm[r] u,a,a,t xvcvhpsp r,u ISA 3.0 or later

Vector Extract Significand r = vec_extract_sig (a) Purpose: Extracts a vector of significands (mantissas) from a vector of floating-point numbers. Result value: Each element of r is extracted from the significand (mantissa) field of the corresponding floating-point element of a. The significand is from the corresponding floating-point number in accordance with the IEEE format. The returned result includes the implicit leading digit. The value of that digit is not encoded in the IEEE format, but is implied by the exponent. Endian considerations: None. xvxsigdp vec_extract_sig xvxsigsp vec_extract_sig r a Example Implementation Restrictions vector unsigned int vector float xvxsigsp r,a ISA 3.0 or later vector unsigned long long vector double xvxsigdp r,a ISA 3.0 or later

Vector Extract High-Order r = vec_extracth (a, b, c) Purpose: Extract an element from a pair of vectors using an index in reverse of natural order. Result value: Let v be a wide vector consisting of a concatenated with b. Let e be the element of v starting at byte position c in the reverse of natural byte order. Then doubleword element 1 of r is set to e, and doubleword element 0 of r is set to zero. Endian considerations: The byte and element numbering within a register is left-to-right for big-endian targets, and right-to-left for little-endian targets. Notes: The byte index c must be in the range 0 to 31. The results are undefined if the byte index does not address an element boundary. vextubvlx vec_extracth vextubvrx vec_extracth vextuhvlx vec_extracth vextuhvrx vec_extracth vextuwvlx vec_extracth vextuwvrx vec_extracth vextddvlx vec_extracth vextddvrx vec_extracth xxpermdi vec_extracth r a b c Example LE Implementation Example BE Implementation Restrictions vector unsigned long long vector unsigned char vector unsigned char unsigned int vextdubvlx r,b,a,c vextdubvrx t,a,b,c xxswapd r,t ISA 3.1 or later vector unsigned long long vector unsigned short vector unsigned short unsigned int vextduhvlx r,b,a,c vextduhvrx t,a,b,c xxswapd r,t ISA 3.1 or later vector unsigned long long vector unsigned int vector unsigned int unsigned int vextduwvlx r,b,a,c vextduwvrx t,a,b,c xxswapd r,t ISA 3.1 or later vector unsigned long long vector unsigned long long vector unsigned long long unsigned int vextddvlx r,b,a,c vextddvrx t,a,b,c xxswapd r,t ISA 3.1 or later

Vector Extract Low-Order r = vec_extractl (a, b, c) Purpose: Extract an element from a pair of vectors using an index in natural order. Result value: Let v be a wide vector consisting of a concatenated with b. Let e be the element of v starting at byte position c in natural byte order. Then doubleword element 1 of r is set to e, and doubleword element 0 of r is set to zero. Endian considerations: The byte and element numbering within a register is left-to-right for big-endian targets, and right-to-left for little-endian targets. Notes: The byte index c must be in the range 0 to 31. The results are undefined if the byte index does not address an element boundary. vextubvlx vec_extractl vextubvrx vec_extractl vextuhvlx vec_extractl vextuhvrx vec_extractl vextuwvlx vec_extractl vextuwvrx vec_extractl vextddvlx vec_extractl vextddvrx vec_extractl xxpermdi vec_extractl r a b c Example LE Implementation Example BE Implementation Restrictions vector unsigned long long vector unsigned char vector unsigned char unsigned int vextdubvrx r,b,a,c vextdubvlx t,a,b,c xxswapd r,t ISA 3.1 or later vector unsigned long long vector unsigned short vector unsigned short unsigned int vextduhvrx r,b,a,c vextduhvlx t,a,b,c xxswapd r,t ISA 3.1 or later vector unsigned long long vector unsigned int vector unsigned int unsigned int vextduwvrx r,b,a,c vextduwvlx t,a,b,c xxswapd r,t ISA 3.1 or later vector unsigned long long vector unsigned long long vector unsigned long long unsigned int vextddvrx r,b,a,c vextddvlx t,a,b,c xxswapd r,t ISA 3.1 or later

Vector Extract Mask r = vec_extractm (a) Purpose: Collect the high-order bits of each element of the input vector. Result value: The contents of the high-order bit of each element of a are concatenated and placed in the rightmost bits of r, with other bits of r set to 0. Endian considerations: None. vextractbm vec_extractm vextracthm vec_extractm vextractwm vec_extractm vextractdm vec_extractm vextractqm vec_extractm r a Example Implementation Restrictions unsigned int vector unsigned char vextractbm r,a ISA 3.1 or later unsigned int vector unsigned short vextracthm r,a ISA 3.1 or later unsigned int vector unsigned int vextractwm r,a ISA 3.1 or later unsigned int vector unsigned long long vextractdm r,a ISA 3.1 or later unsigned int vector unsigned __int128 vextractqm r,a ISA 3.1 or later

Vector Extract Four Bytes r = vec_extract4b (a, b) Purpose: Extracts a word from vector a at constant byte position b. Result value: The first doubleword element of r contains the zero-extended extracted word from a. The second doubleword is set to 0. b specifies the least-significant byte number (0–12) of the word to be extracted. Endian considerations: The element numbering within a register is left-to-right for big-endian targets, and right-to-left for little-endian targets. xxextractuw vec_extract4b r a b Example LE Implementation Example BE Implementation Restrictions vector unsigned long long vector unsigned char const int (range [0,12]) xxextractuw r,a,12-b xxextractuw r,a,b ISA 3.0 or later

Vector Index of First Match r = vec_first_match_index (a, b) Purpose: Performs a comparison of equality on each of the corresponding elements of a and b, and returns the first position of equality. Result value: Returns the element index of the position of the first character match in natural element order. If no match, returns the number of characters as an element count in the vector argument. An example for input a of type vector unsigned char follows: byte index n 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 a 00 10 20 30 40 ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? b FF FF FF FF 40 ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? r 4 Endian considerations: The element numbering within a register is left-to-right for big-endian targets, and right-to-left for little-endian targets. vcmpneb vec_first_match_index vcmpneh vec_first_match_index vcmpnew vec_first_match_index xxlnor vec_first_match_index vctzlsbb vec_first_match_index vclzlsbb vec_first_match_index rldicl vec_first_match_index r a b Example LE Implementation Example BE Implementation Restrictions unsigned int vector signed char vector signed char vcmpneb t,a,b xxlnor u,t,t vctzlsbb r,u vcmpneb t,a,b xxlnor u,t,t vclzlsbb r,u ISA 3.0 or later unsigned int vector unsigned char vector unsigned char vcmpneb t,a,b xxlnor u,t,t vctzlsbb r,u vcmpneb t,a,b xxlnor u,t,t vclzlsbb r,u ISA 3.0 or later unsigned int vector signed short vector signed short vcmpneh t,a,b xxlnor u,t,t vctzlsbb v,u rldicl r,v,63,33 vcmpneh t,a,b xxlnor u,t,t vclzlsbb v,u rldicl r,v,63,33 ISA 3.0 or later unsigned int vector unsigned short vector unsigned short vcmpneh t,a,b xxlnor u,t,t vctzlsbb v,u rldicl r,v,63,33 vcmpneh t,a,b xxlnor u,t,t vclzlsbb v,u rldicl r,v,63,33 ISA 3.0 or later unsigned int vector signed int vector signed int vcmpnew t,a,b xxlnor u,t,t vctzlsbb v,u rldicl r,v,62,34 vcmpnew t,a,b xxlnor u,t,t vclzlsbb v,u rldicl r,v,62,34 ISA 3.0 or later unsigned int vector unsigned int vector unsigned int vcmpnew t,a,b xxlnor u,t,t vctzlsbb v,u rldicl r,v,62,34 vcmpnew t,a,b xxlnor u,t,t vclzlsbb v,u rldicl r,v,62,34 ISA 3.0 or later

Vector Index of First Match or End of String r = vec_first_match_or_eos_index (a, b) Purpose: Performs a comparison of equality on each of the corresponding elements of a and b. Returns the first position of equality, or the zero string terminator. Result value: Returns the element index of the position, in natural element order, of either the first character match or an end-of-string (EOS) terminator. If no match or terminator, returns the number of characters as an element count in the vector argument. An example for input a of type vector unsigned char follows: byte index n 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 a 01 02 03 00 ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? b FF FF FF FF ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? r 3 Endian considerations: The element numbering within a register is left-to-right for big-endian targets, and right-to-left for little-endian targets. xxspltib vec_first_match_or_eos_index vcmpneb vec_first_match_or_eos_index vcmpnezb vec_first_match_or_eos_index vcmpneh vec_first_match_or_eos_index vcmpnezh vec_first_match_or_eos_index vcmpnew vec_first_match_or_eos_index vcmpnezw vec_first_match_or_eos_index xxland vec_first_match_or_eos_index xxlnand vec_first_match_or_eos_index vctzlsbb vec_first_match_or_eos_index vclzlsbb vec_first_match_or_eos_index rldicl vec_first_match_or_eos_index r a b Example LE Implementation Example BE Implementation Restrictions unsigned int vector signed char vector signed char xxspltib t,0 vcmpneb u,a,t vcmpneb v,b,t vcmpnezb w,a,b xxland x,u,v xxlnand y,x,w vctzlsbb r,y xxspltib t,0 vcmpneb u,a,t vcmpneb v,b,t vcmpnezb w,a,b xxland x,u,v xxlnand y,x,w vclzlsbb r,y ISA 3.0 or later unsigned int vector unsigned char vector unsigned char xxspltib t,0 vcmpneb u,a,t vcmpneb v,b,t vcmpnezb w,a,b xxland x,u,v xxlnand y,x,w vctzlsbb r,y xxspltib t,0 vcmpneb u,a,t vcmpneb v,b,t vcmpnezb w,a,b xxland x,u,v xxlnand y,x,w vclzlsbb r,y ISA 3.0 or later unsigned int vector signed short vector signed short xxspltib t,0 vcmpneh u,a,t vcmpneh v,b,t vcmpnezh w,a,b xxland x,u,v xxlnand y,x,w vctzlsbb z,y rldicl r,z,63,33 xxspltib t,0 vcmpneh u,a,t vcmpneh v,b,t vcmpnezh w,a,b xxland x,u,v xxlnand y,x,w vclzlsbb z,y rldicl r,z,63,33 ISA 3.0 or later unsigned int vector unsigned short vector unsigned short xxspltib t,0 vcmpneh u,a,t vcmpneh v,b,t vcmpnezh w,a,b xxland x,u,v xxlnand y,x,w vctzlsbb z,y rldicl r,z,63,33 xxspltib t,0 vcmpneh u,a,t vcmpneh v,b,t vcmpnezh w,a,b xxland x,u,v xxlnand y,x,w vclzlsbb z,y rldicl r,z,63,33 ISA 3.0 or later unsigned int vector signed int vector signed int xxspltib t,0 vcmpnew u,a,t vcmpnew v,b,t vcmpnezw w,a,b xxland x,u,v xxlnand y,x,w vctzlsbb z,y rldicl r,z,62,34 xxspltib t,0 vcmpnew u,a,t vcmpnew v,b,t vcmpnezw w,a,b xxland x,u,v xxlnand y,x,w vclzlsbb z,y rldicl r,z,62,34 ISA 3.0 or later unsigned int vector unsigned int vector unsigned int xxspltib t,0 vcmpnew u,a,t vcmpnew v,b,t vcmpnezw w,a,b xxland x,u,v xxlnand y,x,w vctzlsbb z,y rldicl r,z,62,34 xxspltib t,0 vcmpnew u,a,t vcmpnew v,b,t vcmpnezw w,a,b xxland x,u,v xxlnand y,x,w vclzlsbb z,y rldicl r,z,62,34 ISA 3.0 or later

Vector Index of First Mismatch r = vec_first_mismatch_index (a, b) Purpose: Performs a comparison of inequality on each of the corresponding elements of a and b, and returns the first position of inequality. Result value: Returns the element index of the position of the first character mismatch in natural element order. If no mismatch, returns the number of characters as an element count in the vector argument. An example for input a of type vector unsigned char follows: byte index n 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 a 00 01 ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? b 00 02 ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? r 1 Endian considerations: The element numbering within a register is left-to-right for big-endian targets, and right-to-left for little-endian targets. vcmpneb vec_first_mismatch_index vcmpneh vec_first_mismatch_index vcmpnew vec_first_mismatch_index vctzlsbb vec_first_mismatch_index vclzlsbb vec_first_mismatch_index rldicl vec_first_mismatch_index r a b Example LE Implementation Example BE Implementation Restrictions unsigned int vector signed char vector signed char vcmpneb t,a,b vctzlsbb r,t vcmpneb t,a,b vclzlsbb r,t ISA 3.0 or later unsigned int vector unsigned char vector unsigned char vcmpneb t,a,b vctzlsbb r,t vcmpneb t,a,b vclzlsbb r,t ISA 3.0 or later unsigned int vector signed short vector signed short vcmpneh t,a,b vctzlsbb u,t rldicl r,u,63,33 vcmpneh t,a,b vclzlsbb u,t rldicl r,u,63,33 ISA 3.0 or later unsigned int vector unsigned short vector unsigned short vcmpneh t,a,b vctzlsbb u,t rldicl r,u,63,33 vcmpneh t,a,b vclzlsbb u,t rldicl r,u,63,33 ISA 3.0 or later unsigned int vector signed int vector signed int vcmpnew t,a,b vctzlsbb u,t rldicl r,u,62,34 vcmpnew t,a,b vclzlsbb u,t rldicl r,u,62,34 ISA 3.0 or later unsigned int vector unsigned int vector unsigned int vcmpnew t,a,b vctzlsbb u,t rldicl r,u,62,34 vcmpnew t,a,b vclzlsbb u,t rldicl r,u,62,34 ISA 3.0 or later

Vector Index of First Mismatch or End of String r = vec_first_mismatch_or_eos_index (a, b) Purpose: Performs a comparison of inequality on each of the corresponding elements of a and b. Returns the first position of inequality, or the zero string terminator. Result value: Returns the element index of the position, in natural element order, of either the first character mismatch or an end-of-string (EOS) terminator. If no mismatch or terminator, returns the number of characters as an element count in the vector argument. An example for input a of type vector unsigned char follows: byte index n 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 a 01 02 03 00 ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? b 01 02 03 00 ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? r 3 Endian considerations: The element numbering within a register is left-to-right for big-endian targets, and right-to-left for little-endian targets. xxspltib vec_first_mismatch_or_eos_index vcmpneb vec_first_mismatch_or_eos_index vcmpnezb vec_first_mismatch_or_eos_index vcmpneh vec_first_mismatch_or_eos_index vcmpnezh vec_first_mismatch_or_eos_index vcmpnew vec_first_mismatch_or_eos_index vcmpnezw vec_first_mismatch_or_eos_index xxland vec_first_mismatch_or_eos_index xxlorc vec_first_mismatch_or_eos_index vctzlsbb vec_first_mismatch_or_eos_index vclzlsbb vec_first_mismatch_or_eos_index rldicl vec_first_mismatch_or_eos_index r a b Example LE Implementation Example BE Implementation Restrictions unsigned int vector signed char vector signed char xxspltib t,0 vcmpneb u,a,t vcmpneb v,b,t vcmpnezb w,a,b xxland x,u,v xxlorc y,w,x vctzlsbb r,y xxspltib t,0 vcmpneb u,a,t vcmpneb v,b,t vcmpnezb w,a,b xxland x,u,v xxlorc y,w,x vclzlsbb r,y ISA 3.0 or later unsigned int vector unsigned char vector unsigned char xxspltib t,0 vcmpneb u,a,t vcmpneb v,b,t vcmpnezb w,a,b xxland x,u,v xxlorc y,w,x vctzlsbb r,y xxspltib t,0 vcmpneb u,a,t vcmpneb v,b,t vcmpnezb w,a,b xxland x,u,v xxlorc y,w,x vclzlsbb r,y ISA 3.0 or later unsigned int vector signed short vector signed short xxspltib t,0 vcmpneh u,a,t vcmpneh v,b,t vcmpnezh w,a,b xxland x,u,v xxlorc y,w,x vctzlsbb z,y rldicl r,z,63,33 xxspltib t,0 vcmpneh u,a,t vcmpneh v,b,t vcmpnezh w,a,b xxland x,u,v xxlorc y,w,x vclzlsbb z,y rldicl r,z,63,33 ISA 3.0 or later unsigned int vector unsigned short vector unsigned short xxspltib t,0 vcmpneh u,a,t vcmpneh v,b,t vcmpnezh w,a,b xxland x,u,v xxlorc y,w,x vctzlsbb z,y rldicl r,z,63,33 xxspltib t,0 vcmpneh u,a,t vcmpneh v,b,t vcmpnezh w,a,b xxland x,u,v xxlorc y,w,x vclzlsbb z,y rldicl r,z,63,33 ISA 3.0 or later unsigned int vector signed int vector signed int xxspltib t,0 vcmpnew u,a,t vcmpnew v,b,t vcmpnezw w,a,b xxland x,u,v xxlorc y,w,x vctzlsbb z,y rldicr r,z,62,34 xxspltib t,0 vcmpnew u,a,t vcmpnew v,b,t vcmpnezw w,a,b xxland x,u,v xxlorc y,w,x vclzlsbb z,y rldicr r,z,62,34 ISA 3.0 or later unsigned int vector unsigned int vector unsigned int xxspltib t,0 vcmpnew u,a,t vcmpnew v,b,t vcmpnezw w,a,b xxland x,u,v xxlorc y,w,x vctzlsbb z,y rldicr r,z,62,34 xxspltib t,0 vcmpnew u,a,t vcmpnew v,b,t vcmpnezw w,a,b xxland x,u,v xxlorc y,w,x vclzlsbb z,y rldicr r,z,62,34 ISA 3.0 or later

Vector Convert Integer to Floating-Point r = vec_float (a) Purpose: Converts a vector of integers to a vector of single-precision floating-point numbers. Result value: Elements of r are obtained by converting the respective elements of a to single-precision floating-point numbers. Endian considerations: None. xvcvsxwsp vec_float xvcvuxwsp vec_float r a Example Implementation vector float vector signed int xvcvsxwsp r,a vector float vector unsigned int xvcvuxwsp r,a

Vector Convert Two Vectors to Floating-Point r = vec_float2 (a, b) Purpose: Converts two vectors of long long integers or double-precision floating-point numbers to a vector of single-precision numbers. Result value: Elements of r are obtained by converting the elements of a and b to single-precision numbers. Elements 0 and 1 of r are converted from elements 0 and 1 of a, respectively, and elements 2 and 3 of r are converted from elements 0 and 1 of b, respectively. Endian considerations: The element numbering within a register is left-to-right for big-endian targets, and right-to-left for little-endian targets. xxpermdi vec_float2 xvcvsxdsp vec_float2 vmrgow vec_float2 vmrgew vec_float2 r a b Example LE Implementation Example BE Implementation vector float vector signed long long vector signed long long xxpermdi t,b,a,0 xxpermdi u,b,a,3 xvcvsxdsp v,t xvcvsxdsp w,u vmrgow r,v,w xxpermdi t,b,a,0 xxpermdi u,b,a,3 xvcvsxdsp v,t xvcvsxdsp w,u vmrgew r,v,w vector float vector unsigned long long vector unsigned long long xxpermdi t,b,a,0 xxpermdi u,b,a,3 xvcvsxdsp v,t xvcvsxdsp w,u vmrgow r,v,w xxpermdi t,b,a,0 xxpermdi u,b,a,3 xvcvsxdsp v,t xvcvsxdsp w,u vmrgew r,v,w vector float vector double vector double xxpermdi t,b,a,0 xxpermdi u,b,a,3 xvcvsxdsp v,t xvcvsxdsp w,u vmrgow r,v,w xxpermdi t,b,a,0 xxpermdi u,b,a,3 xvcvsxdsp v,t xvcvsxdsp w,u vmrgew r,v,w

Vector Convert to Floating-Point in Even Elements r = vec_floate (a) Purpose: Converts the elements of a source vector to single-precision floating-point and stores the results in the even elements of the target vector. Result value: The even-numbered elements of r are obtained by converting the elements of a to single-precision numbers, using the current floating-point rounding mode. Endian considerations: The element numbering within a register is left-to-right for big-endian targets, and right-to-left for little-endian targets. xvcvsxdsp vec_floate vsldoi vec_floate xvcvuxdsp vec_floate xvcvdpsp vec_floate r a Example LE Implementation Example BE Implementation vector float vector signed long long xvcvsxdsp r,a xvcvsxdsp t,a vsldoi r,t,t,4 vector float vector unsigned long long xvcvuxdsp r,a xvcvuxdsp t,a vsldoi r,t,t,4 vector float vector double xvcvdpsp r,a xvcvdpsp t,a vsldoi r,t,t,4

Vector Convert to Floating-Point in Odd Elements r = vec_floato (a) Purpose: Converts the elements of a source vector to single-precision floating-point and stores the results in the odd elements of the target vector. Result value: The odd-numbered elements of r are obtained by converting the elements of a to single-precision numbers, using the current floating-point rounding mode. Endian considerations: The element numbering within a register is left-to-right for big-endian targets, and right-to-left for little-endian targets. xvcvsxdsp vec_floato vsldoi vec_floato xvcvuxdsp vec_floato xvcvdpsp vec_floato r a Example LE Implementation Example BE Implementation vector float vector signed long long xvcvsxdsp t,a vsldoi r,t,t,4 xvcvsxdsp r,a vector float vector unsigned long long xvcvuxdsp t,a vsldoi r,t,t,4 xvcvuxdsp r,a vector float vector double xvcvdpsp t,a vsldoi r,t,t,4 xvcvdpsp r,a

Vector Floor r = vec_floor (a) Purpose: Returns a vector containing the largest representable floating-point integral values less than or equal to the values of the corresponding elements of the source vector. Result value: Each element of r contains the largest representable floating-point integral value less than or equal to the value of the corresponding element of a. Endian considerations: None. xvrdpim vec_floor xvrspim vec_floor r a Example Implementation vector float vector float xvrspim r,a vector double vector double xvrdpim r,a

Vector Gather Bits by Byte r = vec_gb (a) Purpose: Performs a gather-bits operation on the input. Result value: Within each doubleword, let x(i) (0 ≤ i < 8) denote the byte elements, with x(0) the most-significant byte. For each pair of i and j (0 ≤ i < 8, 0 ≤ j < 8), the jth bit of the ith byte element of r is set to the value of the ith bit of the jth byte element of a. , taken from the Power ISA, shows how bits are combined by the vec_gb intrinsic. Here VR[VRT] is equivalent to r, and VR[VRB] is equivalent to a.

Endian considerations: None. vgbbd vec_gb r a Example Implementation vector unsigned char vector unsigned char vgbbd r,a

Vector Generate Byte Mask r = vec_genbm (a) Purpose: Create an element mask for byte elements from a bit mask. Result value: For each integer i from 0 to 15, do the following. Counting the leftmost element of r as the 0th element, and the rightmost element as the 15th element, all bits of the ith element of r are set to 0 if the ith bit of the 16-bit value in a is equal to 0. All bits of the ith element of r are set to 1 if the ith bit of the 16-bit value in a is equal to 1. The bits in a are likewise numbered from left to right. An example follows: Example a 1010 1010 1010 1010 r 0xff00ff00 ff00ff00 ff00ff00 ff00ff00 Endian considerations: Because elements are numbered from left to right in the result vector regardless of endianness, the semantics of this built-in function differ on big-endian and little-endian targets. mtvsrbm vec_genbm r a Example Implementation Restrictions vector unsigned char unsigned long long mtvsrbm r,a ISA 3.1 or later Notes: When a is a constant, compilers may generate the mtvsrbmi instruction as an optimization.

Vector Generate Doubleword Mask r = vec_gendm (a) Purpose: Create an element mask for doubleword elements from a bit mask. Result value: For each integer i from 0 to 1, do the following. Counting the leftmost element of r as the 0th element, and the rightmost element as the 1st element, all bits of the ith element of r are set to 0 if the ith bit of the 2-bit value in a is equal to 0. All bits of the ith element of r are set to 1 if the ith bit of the 2-bit value in a is equal to 1. The bits in a are likewise numbered from left to right. An example follows: Example a 0 1 r 0x0000000000000000 ffffffffffffffff Endian considerations: Because elements are numbered from left to right in the result vector regardless of endianness, the semantics of this built-in function differ on big-endian and little-endian targets. mtvsrdm vec_gendm r a Example Implementation Restrictions vector unsigned long long unsigned long long mtvsrdm r,a ISA 3.1 or later

Vector Generate Halfword Mask r = vec_genhm (a) Purpose: Create an element mask for halfword elements from a bit mask. Result value: For each integer i from 0 to 7, do the following. Counting the leftmost element of r as the 0th element, and the rightmost element as the 7th element, all bits of the ith element of r are set to 0 if the ith bit of the 8-bit value in a is equal to 0. All bits of the ith element of r are set to 1 if the ith bit of the 8-bit value in a is equal to 1. The bits in a are likewise numbered from left to right. An example follows: Example a 10 10 01 01 r 0xffff0000 ffff0000 0000ffff 0000ffff Endian considerations: Because elements are numbered from left to right in the result vector regardless of endianness, the semantics of this built-in function differ on big-endian and little-endian targets. mtvsrhm vec_genhm r a Example Implementation Restrictions vector unsigned short unsigned long long mtvsrhm r,a ISA 3.1 or later

Vector Generate Permute Control Vector from Mask r = vec_genpcvm (a, b) Purpose: Generate a permute control vector for expanding or compressing a source vector according to a specified mask. Result value: In what follows, b must have a value of 0, 1, 2, or 3. a contains a bit mask where the high-order bit in each element is set if the permute mask should specify expansion or compression of that element, as explained below. If b = 0, r is assigned the value of the permute control vector required to enable a left-indexed permute to implement an expansion of the leftmost elements of a source vector into the elements of a result vector specified by the element mask in a. If b = 1, r is assigned the value of the permute control vector required to enable a left-indexed permute to implement a compression of the sparse elements in a source vector specified by the element mask in a into the leftmost elements of a result vector. If b = 2, r is assigned the value of the permute control vector required to enable a right-indexed permute to implement an expansion of the rightmost elements of a source vector into the elements of a result vector specified by the element mask in a. If b = 3, r is assigned the value of the permute control vector required to enable a right-indexed permute to implement a compression of the sparse elements in a source vector specified by the element mask in a into the rightmost elements of a result vector. Endian considerations: The mask argument of the underlying instructions is specified in big-endian order. For correct bi-endian semantics, the mask must be reversed by the compiler for little-endian targets. Notes: See the Programming Notes following the descriptions of xxgenpcvbm et al. in the Power Instruction Set Architecture, Version 3.1B Specification () for examples of how to use this function in practice. xxgenpcvbm vec_genpcvm xxgenpcvhm vec_genpcvm xxgenpcvwm vec_genpcvm xxgenpcvdm vec_genpcvm xxpermdi vec_genpcvm r a b Example LE Implementation Example BE Implementation Restrictions vector unsigned char vector unsigned char const int xxswapd t,a xxgenpcvbm r,t,b xxgenpcvbm r,a,b ISA 3.1 or later vector unsigned short vector unsigned short const int xxswapd t,a xxgenpcvhm r,t,b xxgenpcvhm r,a,b ISA 3.1 or later vector unsigned int vector unsigned int const int xxswapd t,a xxgenpcvwm r,t,b xxgenpcvwm r,a,b ISA 3.1 or later vector unsigned long long vector unsigned long long const int xxswapd t,a xxgenpcvdm r,t,b xxgenpcvdm r,a,b ISA 3.1 or later

Vector Generate Quadword Mask r = vec_genqm (a) Purpose: Create an element mask for a quadword from a bit mask. Result value: All bits of r are set to 0 if the low-order bit in a is equal to 0. Otherwise all bits of r are set to 1. Endian considerations: None. mtvsrqm vec_genqm r a Example Implementation Restrictions vector unsigned __int128 unsigned long long mtvsrqm r,a ISA 3.1 or later

Vector Generate Word Mask r = vec_genwm (a) Purpose: Create an element mask for word elements from a bit mask. Result value: For each integer i from 0 to 3, do the following. Counting the leftmost element of r as the 0th element, and the rightmost element as the 3rd element, all bits of the ith element of r are set to 0 if the ith bit of the 4-bit value in a is equal to 0. All bits of the ith element of r are set to 1 if the ith bit of the 4-bit value in a is equal to 1. The bits in a are likewise numbered from left to right. An example follows: Example a 10 01 r 0xffffffff00000000 00000000ffffffff Endian considerations: Because elements are numbered from left to right in the result vector regardless of endianness, the semantics of this built-in function differ on big-endian and little-endian targets. mtvsrwm vec_genwm r a Example Implementation Restrictions vector unsigned int unsigned long long mtvsrwm r,a ISA 3.1 or later

Vector Gather Nth Bits r = vec_gnb (a, b) Purpose: Copies every Nth bit of the input vector into the leftmost positions of the target value. Result value: Let N be the constant value of b. Starting with bit 0, the contents of every Nth bit of a are concatenated and placed in the leftmost bits of r. The remaining bits of r are set to 0. b must have a value between 2 and 7, inclusive. As an example, if a has a value of 0x0123456789abcdef0123456789abcdef and b has a value of 4, then r will have a value of 0x00ff00ff00000000. Endian considerations: None. vgnb vec_gnb r a b Example Implementation Restrictions unsigned long long vector unsigned __int128 const unsigned int vgnb r,a,b ISA 3.1 or later

Vector Insert r = vec_insert (a, b, c) Purpose: Returns a copy of vector b with element c replaced by the value of a. Result value: r contains a copy of vector b with element c replaced by the value of a. This function uses modular arithmetic on c to determine the element number. For example, if c is out of range, the compiler uses c modulo the number of elements in the vector to determine the element position. Endian considerations: The element numbering within a register is left-to-right for big-endian targets, and right-to-left for little-endian targets. Notes: The sample implementations are given for ISA 3.0 when c is a constant. For earlier target architectures, or when c is variable, less efficient sequences are required. The sample implementations also assume that c is in range; that is, any required modulus operations have already been performed on the constant index. mtvsrwz vec_insert vinsertb vec_insert xxinsertw vec_insert mtvsrd vec_insert xxpermdi vec_insert vinserth vec_insert xscvdpspn vec_insert xxextractuw vec_insert r a b c Example ISA 3.0 LE Implementation Example ISA 3.0 BE Implementation vector signed char signed char vector signed char signed int mtvsrwz t,b vinsertb r,t,15-c mtvsrwz t,b vinsertb r,t,c vector unsigned char unsigned char vector unsigned char signed int mtvsrwz t,b vinsertb r,t,15-c mtvsrwz t,b vinsertb r,t,c vector signed short signed short vector signed short signed int mtvsrwz t,b vinserth r,t,a,(7-c)*2 mtvsrd t,b vinserth r,t,a,c*2 vector unsigned short unsigned short vector unsigned short signed int mtvsrwz t,b vinserth r,t,a,(7-c)*2 mtvsrd t,b vinserth r,t,a,c*2 vector signed int signed int vector signed int signed int mtvsrwz t,b xxinsertw r,t,(3-c)*4 mtvsrwz t,b vinsertb r,t,c*4 vector unsigned int unsigned int vector unsigned int signed int mtvsrwz t,b xxinsertw r,t,(3-c)*4 mtvsrwz t,b vinsertb r,t,c*4 vector signed long long signed long long vector signed long long signed int mtvsrd t,b xxpermdi r,t,a,c mtvsrd t,b xxpermdi r,t,a,1-c vector unsigned long long unsigned long long vector unsigned long long signed int mtvsrd t,b xxpermdi r,t,a,c mtvsrd t,b xxpermdi r,t,a,1-c vector float float vector float signed int xscvdpspn t,a xxextractuw u,t,0 xxinsertw r/b,u,(3-c)*4 xscvdpspn t,a xxextractuw u,t,0 xxinsertw r/b,u,c*4 vector double double vector double signed int xxpermdi r,b,a,1 [c=0] [or] xxpermdi r,a,b,1 [c=1] xxpermdi r,a,b,1 [c=0] [or] xxpermdi r,b,a,1 [c=1]

Vector Insert Exponent r = vec_insert_exp (a, b) Purpose: Inserts exponents into a vector of floating-point numbers. Result value: Each element of r is generated by combining the exponent specified by the corresponding element of b with the sign and significand of the corresponding element of a. The inserted exponent of b is treated as a right-justified unsigned integer containing a biased exponent, in accordance with the exponent representation specified by IEEE 754. It is combined with the sign and significand of a without further processing. Endian considerations: None. xviexpdp vec_insert_exp xviexpsp vec_insert_exp r a b Example Implementation Restrictions vector float vector unsigned int vector unsigned int xviexpsp r,a,b ISA 3.0 or later vector float vector float vector unsigned int xviexpsp r,a,b ISA 3.0 or later vector double vector unsigned long long vector unsigned long long xviexpdp r,a,b ISA 3.0 or later vector double vector double vector unsigned long long xviexpdp r,a,b ISA 3.0 or later

Vector Insert High-Indexed r = vec_inserth (a, b, c) Purpose: Insert a source element into a source vector at a specified byte position in reverse of natural byte order. Result value: When a is a scalar, let e be equal to a. Otherwise, when a is a vector, let e be the rightmost element of the leftmost doubleword of a in register order. Then the result r is set to the value of b with e inserted at byte position c, counting in reverse of natural byte order. Other than the bytes modified by the insert operation, bytes of r are identical to the corresponding bytes of b. Endian considerations: The byte and element numbering within a register is left-to-right for big-endian targets, and right-to-left for little-endian targets. Note that this operation is not semantically equivalent for big- and little-endian targets when a is a vector, because the element chosen for insertion is at the same location in the vector, regardless of target endianness. Notes: The byte index c must be in the range 0 to 15. The results are undefined if the byte index does not address an element boundary. vinsblx vec_inserth vinsbrx vec_inserth vinshlx vec_inserth vinshrx vec_inserth vinswlx vec_inserth vinswrx vec_inserth vinsdlx vec_inserth vinsdrx vec_inserth vinsbvlx vec_inserth vinsbvrx vec_inserth vinshvlx vec_inserth vinshvrx vec_inserth vinswvlx vec_inserth vinswvrx vec_inserth r a b c Example LE Implementation Example BE Implementation Restrictions vector unsigned char unsigned char vector unsigned char unsigned int vinsblx r/b,c,a vinsbrx r/b,c,a ISA 3.1 or later vector unsigned short unsigned short vector unsigned short unsigned int vinshlx r/b,c,a vinshrx r/b,c,a ISA 3.1 or later vector unsigned int unsigned int vector unsigned int unsigned int vinswlx r/b,c,a vinswrx r/b,c,a ISA 3.1 or later vector unsigned long long unsigned long long vector unsigned long long unsigned int vinsdlx r/b,c,a vinsdrx r/b,c,a ISA 3.1 or later vector unsigned char vector unsigned char vector unsigned char unsigned int vinsbvlx r/b,c,a vinsbvrx r/b,c,a ISA 3.1 or later vector unsigned short vector unsigned short vector unsigned short unsigned int vinshvlx r/b,c,a vinshvrx r/b,c,a ISA 3.1 or later vector unsigned int vector unsigned int vector unsigned int unsigned int vinswvlx r/b,c,a vinswvrx r/b,c,a ISA 3.1 or later

Vector Insert Low-Indexed r = vec_insertl (a, b, c) Purpose: Insert a source element into a source vector at a specified byte position in natural byte order. Result value: When a is a scalar, let e be equal to a. Otherwise, when a is a vector, let e be the rightmost element of the leftmost doubleword of a in register order. Then the result r is set to the value of b with e inserted at byte position c in natural byte order. Other than the bytes modified by the insert operation, bytes of r are identical to the corresponding bytes of b. Endian considerations: The byte and element numbering within a register is left-to-right for big-endian targets, and right-to-left for little-endian targets. Note that this operation is not semantically equivalent for big- and little-endian targets when a is a vector, because the element chosen for insertion is at the same location in the vector, regardless of target endianness. Notes: The byte index c must be in the range 0 to 15. The results are undefined if the byte index does not address an element boundary. vinsblx vec_insertl vinsbrx vec_insertl vinshlx vec_insertl vinshrx vec_insertl vinswlx vec_insertl vinswrx vec_insertl vinsdlx vec_insertl vinsdrx vec_insertl vinsbvlx vec_insertl vinsbvrx vec_insertl vinshvlx vec_insertl vinshvrx vec_insertl vinswvlx vec_insertl vinswvrx vec_insertl r a b c Example LE Implementation Example BE Implementation Restrictions vector unsigned char unsigned char vector unsigned char unsigned int vinsbrx r/b,c,a vinsblx r/b,c,a ISA 3.1 or later vector unsigned short unsigned short vector unsigned short unsigned int vinshrx r/b,c,a vinshlx r/b,c,a ISA 3.1 or later vector unsigned int unsigned int vector unsigned int unsigned int vinswrx r/b,c,a vinswlx r/b,c,a ISA 3.1 or later vector unsigned long long unsigned long long vector unsigned long long unsigned int vinsdrx r/b,c,a vinsdlx r/b,c,a ISA 3.1 or later vector unsigned char vector unsigned char vector unsigned char unsigned int vinsbvrx r/b,c,a vinsbvlx r/b,c,a ISA 3.1 or later vector unsigned short vector unsigned short vector unsigned short unsigned int vinshvrx r/b,c,a vinshvlx r/b,c,a ISA 3.1 or later vector unsigned int vector unsigned int vector unsigned int unsigned int vinswvrx r/b,c,a vinswvlx r/b,c,a ISA 3.1 or later

Vector Insert Four Bytes r = vec_insert4b (a, b, c) Purpose: Inserts a word into a vector at a byte position. Result value: Let W be the first doubleword element of a, truncated to 32 bits. The result vector r is formed by inserting W into b at the byte position (0–12) specified by c. Endian considerations: The element and byte numbering within a register is left-to-right for big-endian targets, and right-to-left for little-endian targets. xxpermdi vec_insert4b xxinsertw vec_insert4b r a b c Example LE Implementation Example BE Implementation Restrictions vector unsigned char vector signed int vector unsigned char const int (range [0,12]) xxpermdi t,a,a,1 xxinsertw b,t,12-c xxinsertw b,t,c ISA 3.0 or later vector unsigned char vector unsigned int vector unsigned char const int (range [0,12]) xxpermdi t,a,a,1 xxinsertw b,t,12-c xxinsertw b,t,c ISA 3.0 or later

Vector Load Indexed r = vec_ld (a, b) Purpose: Loads a 16-byte vector from the memory address specified by the displacement and the pointer, ignoring the four low-order bits of the calculated address. Result value: The value of r is obtained by adding a and b, masking off the four low-order bits of the result, and loading the 16-byte vector from the resultant memory address. Endian considerations: None. lvx vec_ld r a b Example ISA 3.0 Implementation vector bool char signed long const vector bool char * lvx r,b,a vector signed char signed long const signed char * lvx r,b,a vector signed char signed long const vector signed char * lvx r,b,a vector unsigned char signed long const unsigned char * lvx r,b,a vector unsigned char signed long const vector unsigned char * lvx r,b,a vector bool short signed long const vector bool short * lvx r,b,a vector signed short signed long const signed short * lvx r,b,a vector signed short signed long const vector signed short * lvx r,b,a vector unsigned short signed long const unsigned short * lvx r,b,a vector unsigned short signed long const vector unsigned short * lvx r,b,a vector pixel signed long const vector pixel * lvx r,b,a vector bool int signed long const vector bool int * lvx r,b,a vector signed int signed long const signed int * lvx r,b,a vector signed int signed long const vector signed int * lvx r,b,a vector unsigned int signed long const unsigned int * lvx r,b,a vector unsigned int signed long const vector unsigned int * lvx r,b,a vector bool long long signed long const vector bool long long * lvx r,b,a vector signed long long signed long const signed long long * lvx r,b,a vector signed long long signed long const vector signed long long * lvx r,b,a vector unsigned long long signed long const unsigned long long * lvx r,b,a vector unsigned long long signed long const vector unsigned long long * lvx r,b,a vector signed __int128 signed long const signed __int128 * lvx r,b,a vector signed __int128 signed long const vector signed __int128 * lvx r,b,a vector unsigned __int128 signed long const unsigned __int128 * lvx r,b,a vector unsigned __int128 signed long const vector unsigned __int128 * lvx r,b,a vector float signed long const float * lvx r,b,a vector float signed long const vector float * lvx r,b,a vector double signed long const double * lvx r,b,a vector double signed long const vector double * lvx r,b,a

Vector Load Element Indexed r = vec_lde (a, b) Purpose: Loads a single element into the position in the vector register corresponding to its address, leaving the remaining elements of the register undefined. Result value: The integer value a is added to the pointer value b. The resulting address is rounded down to the nearest address that is a multiple of es, where es is 1 for char pointers, 2 for short pointers, and 4 for float or int pointers. The element at this address is loaded into an element of r, leaving all other elements of r undefined. The position of the loaded element in r is determined by taking the address modulo 16. Endian considerations: None. Notes: Be careful to note that the address (b+c) is aligned to an element boundary. Do not attempt to load unaligned data with this intrinsic. lvebx vec_lde lvewx vec_lde lvehx vec_lde r a b Example ISA 3.0 Implementation vector signed char signed long const signed char * lvebx r,b,a vector unsigned char signed long const unsigned char * lvebx r,b,a vector signed short signed long const signed short * lvehx r,b,a vector unsigned short signed long const unsigned short * lvehx r,b,a vector signed int signed long const signed int * lvewx r,b,a vector unsigned int signed long const unsigned int * lvewx r,b,a vector float signed long const float * lvewx r,b,a

Vector Load Indexed Least Recently Used r = vec_ldl (a, b) Purpose: Loads a 16-byte vector from the memory address specified by the displacement and the pointer, ignoring the four low-order bits of the calculated address, and marks the cache line loaded from as least recently used. Result value: The value of r is obtained by adding a and b, masking off the four low-order bits of the result, and loading the 16-byte vector from the resultant memory address. Endian considerations: None. Notes: This intrinsic can be used to indicate the last access to a portion of memory, as a hint to the data cache controller that the associated cache line can be replaced without performance loss. lvxl vec_ldl r a b Example ISA 3.0 Implementation vector bool char signed long const vector bool char * lvxl r,b,a vector signed char signed long const signed char * lvxl r,b,a vector signed char signed long const vector signed char * lvxl r,b,a vector unsigned char signed long const unsigned char * lvxl r,b,a vector unsigned char signed long const vector unsigned char * lvxl r,b,a vector bool short signed long const vector bool short * lvxl r,b,a vector signed short signed long const signed short * lvxl r,b,a vector signed short signed long const vector signed short * lvxl r,b,a vector unsigned short signed long const unsigned short * lvxl r,b,a vector unsigned short signed long const vector unsigned short * lvxl r,b,a vector pixel signed long const vector pixel * lvxl r,b,a vector bool int signed long const vector bool int * lvxl r,b,a vector signed int signed long const signed int * lvxl r,b,a vector signed int signed long const vector signed int * lvxl r,b,a vector unsigned int signed long const unsigned int * lvxl r,b,a vector unsigned int signed long const vector unsigned int * lvxl r,b,a vector bool long long signed long const vector bool long long * lvxl r,b,a vector signed long long signed long const signed long long * lvxl r,b,a vector signed long long signed long const vector signed long long * lvxl r,b,a vector unsigned long long signed long const unsigned long long * lvxl r,b,a vector unsigned long long signed long const vector unsigned long long * lvxl r,b,a vector float signed long const float * lvxl r,b,a vector float signed long const vector float * lvxl r,b,a vector double signed long const double * lvxl r,b,a vector double signed long const vector double * lvxl r,b,a

Vector Base-2 Logarithm Estimate r = vec_loge (a) Purpose: Returns a vector containing estimates of the base-2 logarithms of the corresponding elements of the source vector. Result value: Each element of r contains an estimated value of the base-2 logarithm of the corresponding element of a. Endian considerations: None. vlogefp vec_loge r a Example Implementation vector float vector float vlogefp r,a

Vector Multiply-Add r = vec_madd (a, b, c) Purpose: Returns a vector containing the results of performing a fused multiply-add operation for each corresponding set of elements of the source vectors. Result value: The value of each element of r is the product of the values of the corresponding elements of a and b, added to the value of the corresponding element of c. Endian considerations: None. vmladduhm vec_madd xvmaddmdp vec_madd xvmaddmsp vec_madd r a b c Example Implementation vector signed short vector signed short vector signed short vector signed short vmladduhm r,a,b,c vector signed short vector signed short vector unsigned short vector unsigned short vmladduhm r,a,b,c vector signed short vector unsigned short vector signed short vector signed short vmladduhm r,a,b,c vector unsigned short vector unsigned short vector unsigned short vector unsigned short vmladduhm r,a,b,c vector float vector float vector float vector float xvmaddmsp r/a,b,c vector double vector double vector double vector double xvmaddmdp r/a,b,c

Vector Multiply-Add Saturated r = vec_madds (a, b, c) Purpose: Returns a vector containing the results of performing a saturated multiply-high-and-add operation for each corresponding set of elements of the source vectors. Result value: The value of each element of r is produced as follows: The values of the corresponding elements of a and b are multiplied. The value of the 17 most-significant bits of this product is then added, using 16-bit-saturated addition, to the value of the corresponding element of c. Endian considerations: None. vmhaddshs vec_madds r a b c Example Implementation vector signed short vector signed short vector signed short vector signed short vmhaddshs r,a,b,c

Vector Maximum r = vec_max (a, b) Purpose: Returns a vector containing the maximum value from each set of corresponding elements of the source vectors. Result value: The value of each element of r is the maximum of the values of the corresponding elements of a and b. Endian considerations: None. Notes: For floating-point types, if both source elements contain signed zeros, or if either source element contains a NaN, it is undefined which of the two source elements is copied into the corresponding result element. vmaxsb vec_max vmaxub vec_max vmaxsw vec_max vmaxuw vec_max vmaxsd vec_max vmaxud vec_max vmaxsh vec_max vmaxuh vec_max xvmaxdp vec_max xvmaxsp vec_max r a b Example Implementation vector signed char vector signed char vector signed char vmaxsb r,a,b vector unsigned char vector unsigned char vector unsigned char vmaxub r,a,b vector signed short vector signed short vector signed short vmaxsh r,a,b vector unsigned short vector unsigned short vector unsigned short vmaxuh r,a,b vector signed int vector signed int vector signed int vmaxsw r,a,b vector unsigned int vector unsigned int vector unsigned int vmaxuw r,a,b vector signed long long vector signed long long vector signed long long vmaxsd r,a,b vector unsigned long long vector unsigned long long vector unsigned long long vmaxud r,a,b vector float vector float vector float xvmaxsp r,a,b vector double vector double vector double xvmaxdp r,a,b

Vector Merge Even r = vec_mergee (a, b) Purpose: Merges the even-numbered values from two vectors. Result value: The even-numbered elements of a are stored into the even-numbered elements of r. The even-numbered elements of b are stored into the odd-numbered elements of r. Endian considerations: The element numbering within a register is left-to-right for big-endian targets, and right-to-left for little-endian targets. vmrgow vec_mergee vmrgew vec_mergee xxpermdi vec_mergee r a b Example LE Implementation Example BE Implementation vector bool int vector bool int vector bool int vmrgow r,b,a vmrgew r,a,b vector signed int vector signed int vector signed int vmrgow r,b,a vmrgew r,a,b vector unsigned int vector unsigned int vector unsigned int vmrgow r,b,a vmrgew r,a,b vector bool long long vector bool long long vector bool long long xxpermdi r,b,a,3 xxpermdi r,a,b,0 vector signed long long vector signed long long vector signed long long xxpermdi r,b,a,3 xxpermdi r,a,b,0 vector unsigned long long vector unsigned long long vector unsigned long long xxpermdi r,b,a,3 xxpermdi r,a,b,0 vector float vector float vector float vmrgow r,b,a vmrgew r,a,b vector double vector double vector double xxpermdi r,b,a,3 xxpermdi r,a,b,0

Vector Merge High r = vec_mergeh (a, b) Purpose: Merges the first halves (in element order) of two vectors. Result value: The nth element of r, if n is an even number, is given the value of the (n/2)th element of a. The (n+1)th element of r, if n is an even number, is given the value of the (n/2)th element of b. Endian considerations: The element numbering within a register is left-to-right for big-endian targets, and right-to-left for little-endian targets. vmrglb vec_mergeh xxpermdi vec_mergeh vmrghb vec_mergeh vmrglw vec_mergeh vmrghw vec_mergeh vmrglh vec_mergeh vmrghh vec_mergeh r a b Example LE Implementation Example BE Implementation vector bool char vector bool char vector bool char vmrglb r,b,a vmrghb r,a,b vector signed char vector signed char vector signed char vmrglb r,b,a vmrghb r,a,b vector unsigned char vector unsigned char vector unsigned char vmrglb r,b,a vmrghb r,a,b vector bool short vector bool short vector bool short vmrglh r,b,a vmrghh r,a,b vector signed short vector signed short vector signed short vmrglh r,b,a vmrghh r,a,b vector unsigned short vector unsigned short vector unsigned short vmrglh r,b,a vmrghh r,a,b vector pixel vector pixel vector pixel vmrglh r,b,a vmrghh r,a,b vector bool int vector bool int vector bool int vmrglw r,b,a vmrghw r,a,b vector signed int vector signed int vector signed int vmrglw r,b,a vmrghw r,a,b vector unsigned int vector unsigned int vector unsigned int vmrglw r,b,a vmrghw r,a,b vector bool long long vector bool long long vector bool long long xxpermdi r,b,a,3 xxpermdi r,a,b,0 vector signed long long vector signed long long vector signed long long xxpermdi r,b,a,3 xxpermdi r,a,b,0 vector unsigned long long vector unsigned long long vector unsigned long long xxpermdi r,b,a,3 xxpermdi r,a,b,0 vector float vector float vector float vmrglw r,b,a vmrghw r,a,b vector double vector double vector double xxpermdi r,b,a,3 xxpermdi r,a,b,0

Vector Merge Low r = vec_mergel (a, b) Purpose: Merges the last halves (in element order) of two vectors. Result value: Let m be the number of elements in r. The nth element of r, if n is an even number, is given the value of the m/2 + (n/2)th element of a. The (n+1)th element of r, if n is an even number, is given the value of the m/2 + (n/2)th element of b. Endian considerations: The element numbering within a register is left-to-right for big-endian targets, and right-to-left for little-endian targets. vmrghb vec_mergel vmrglb vec_mergel vmrghw vec_mergel vmrglw vec_mergel xxpermdi vec_mergel vmrghh vec_mergel vmrglh vec_mergel r a b Example LE Implementation Example BE Implementation vector bool char vector bool char vector bool char vmrghb r,b,a vmrglb r,a,b vector signed char vector signed char vector signed char vmrghb r,b,a vmrglb r,a,b vector unsigned char vector unsigned char vector unsigned char vmrghb r,b,a vmrglb r,a,b vector bool short vector bool short vector bool short vmrghh r,b,a vmrglh r,a,b vector signed short vector signed short vector signed short vmrghh r,b,a vmrglh r,a,b vector unsigned short vector unsigned short vector unsigned short vmrghh r,b,a vmrglh r,a,b vector pixel vector pixel vector pixel vmrghh r,b,a vmrglh r,a,b vector bool int vector bool int vector bool int vmrghw r,b,a vmrglw r,a,b vector signed int vector signed int vector signed int vmrghw r,b,a vmrglw r,a,b vector unsigned int vector unsigned int vector unsigned int vmrghw r,b,a vmrglw r,a,b vector bool long long vector bool long long vector bool long long xxpermdi r,b,a,0 xxpermdi r,a,b,3 vector signed long long vector signed long long vector signed long long xxpermdi r,b,a,0 xxpermdi r,a,b,3 vector unsigned long long vector unsigned long long vector unsigned long long xxpermdi r,b,a,0 xxpermdi r,a,b,3 vector float vector float vector float vmrghw r,b,a vmrglw r,a,b vector double vector double vector double xxpermdi r,b,a,0 xxpermdi r,a,b,3

Vector Merge Odd r = vec_mergeo (a, b) Purpose: Merges the odd-numbered values from two vectors. Result value: The odd-numbered elements of a are stored into the even-numbered elements of r. The odd-numbered elements of b are stored into the odd-numbered elements of r. Endian considerations: The element numbering within a register is left-to-right for big-endian targets, and right-to-left for little-endian targets. vmrgew vec_mergeo vmrgow vec_mergeo xxpermdi vec_mergeo r a b Example LE Implementation Example BE Implementation vector bool int vector bool int vector bool int vmrgew r,b,a vmrgow r,a,b vector signed int vector signed int vector signed int vmrgew r,b,a vmrgow r,a,b vector unsigned int vector unsigned int vector unsigned int vmrgew r,b,a vmrgow r,a,b vector bool long long vector bool long long vector bool long long xxpermdi r,b,a,0 xxpermdi r,a,b,3 vector signed long long vector signed long long vector signed long long xxpermdi r,b,a,0 xxpermdi r,a,b,3 vector unsigned long long vector unsigned long long vector unsigned long long xxpermdi r,b,a,0 xxpermdi r,a,b,3 vector float vector float vector float vmrgew r,b,a vmrgow r,a,b vector double vector double vector double xxpermdi r,b,a,0 xxpermdi r,a,b,3

Vector Move From Vector Status and Control Register r = vec_mfvscr () Purpose: Copies the contents of the Vector Status and Control Register (VSCR) into the result vector. Result value: The high-order 16 bits of the VSCR are copied into the seventh element of r, using big-endian (left-to-right) order. The low-order 16 bits of the VSCR are copied into the eighth element of r, using big-endian order. All other elements of r are set to zero. Endian considerations: The contents of the VSCR are placed in the low-order 32 bits of the result vector, regardless of endianness. Notes: The use of vector unsigned short as the result type eases access to the two bits currently defined in the VSCR. Following execution of vec_mfvscr, r[6] will contain VSCRNJ in the low-order bit, and r[7] will contain VSCRSAT in the low-order bit. mfvscr vec_mfvscr r Example Implementation vector unsigned short mfvscr a

Vector Minimum r = vec_min (a, b) Purpose: Returns a vector containing the minimum value from each set of corresponding elements of the source vectors. Result value: The value of each element of r is the minimum of the values of the corresponding elements of a and b. Endian considerations: None. Notes: For floating-point types, if both source elements contain signed zeros, or if either source element contains a NaN, it is undefined which of the two source elements is copied into the corresponding result element. vminsb vec_min vminub vec_min vminsw vec_min vminuw vec_min vminsd vec_min vminud vec_min vminsh vec_min vminuh vec_min xvmindp vec_min xvminsp vec_min r a b Example Implementation vector signed char vector signed char vector signed char vminsb r,a,b vector unsigned char vector unsigned char vector unsigned char vminub r,a,b vector signed short vector signed short vector signed short vminsh r,a,b vector unsigned short vector unsigned short vector unsigned short vminuh r,a,b vector signed int vector signed int vector signed int vminsw r,a,b vector unsigned int vector unsigned int vector unsigned int vminuw r,a,b vector signed long long vector signed long long vector signed long long vminsd r,a,b vector unsigned long long vector unsigned long long vector unsigned long long vminud r,a,b vector float vector float vector float xvminsp r,a,b vector double vector double vector double xvmindp r,a,b

Vector Modulo r = vec_mod (a, b) Purpose: Produces the remainders from dividing the elements of one vector by the elements of another vector, and places them in the result vector. Result value: The value of each element of r is obtained by dividing the corresponding element of a by the corresponding element of b and determining the unique signed or unsigned integer remainder from the division. Endian considerations: None. Notes: When any element of b is zero, the corresponding element of r is undefined. For signed arithmetic, when any element of a is the negative number with maximum cardinality, and the corresponding element of b is negative one, the corresponding element of r is undefined. vmodsw vec_mod vmoduw vec_mod vmodsd vec_mod vmodud vec_mod vmodsq vec_mod vmoduq vec_mod r a b Example Implementation Restrictions vector signed int vector signed int vector signed int vmodsw r,a,b ISA 3.1 or later vector unsigned int vector unsigned int vector unsigned int vmoduw r,a,b ISA 3.1 or later vector signed long long vector signed long long vector signed long long vmodsd r,a,b ISA 3.1 or later vector unsigned long long vector unsigned long long vector unsigned long long vmodud r,a,b ISA 3.1 or later vector signed __int128 vector signed __int128 vector signed __int128 vmodsq r,a,b ISA 3.1 or later vector unsigned __int128 vector unsigned __int128 vector unsigned __int128 vmoduq r,a,b ISA 3.1 or later

Vector Multiply-High Round and Add Saturated r = vec_mradds (a, b, c) Purpose: Returns a vector containing the results of performing a saturated multiply-high-round-and-add operation for each corresponding set of elements of the source vectors. Result value: The value of each element of r is produced as follows. The values of the corresponding elements of a and b are multiplied and rounded such that the 15 least-significant bits are 0. The value of the 17 most-significant bits of this rounded product is then added, using 16-bit-saturated addition, to the value of the corresponding element of c. Endian considerations: None. vmhraddshs vec_mradds r a b c Example Implementation vector signed short vector signed short vector signed short vector signed short vmhraddshs r,a,b,c

Vector Multiply-Subtract r = vec_msub (a, b, c) Purpose: Returns a vector containing the results of performing a multiply-subtract operation using the source vectors. Result value: Each element of r is produced by multiplying the corresponding element of a by the corresponding element of b and then subtracting the corresponding element of c. Endian considerations: None. xvmsubmdp vec_msub xvmsubmsp vec_msub r a b c Example Implementation vector float vector float vector float vector float xvmsubmsp r/a,b,c vector double vector double vector double vector double xvmsubmdp r/a,b,c

Vector Multiply-Sum r = vec_msum (a, b, c) Purpose: Returns a vector containing the results of performing a multiply-sum operation using the source vectors. Result value: There are three cases: When a is of type vector signed char or vector unsigned char, each word element of r is computed as follows: Each of the four byte elements contained in the corresponding word element of a is multiplied by the corresponding byte element of b. The sum of these four halfword products is added to the corresponding word element in c and placed in the corresponding word element of r. All operations are performed using 32-bit modular arithmetic. When a is of type vector signed short or vector unsigned short, each word element of r is computed as follows: Each of the two halfword elements contained in the corresponding word element of a is multiplied by the corresponding halfword element of b. The sum of these two word products is added to the corresponding word element in c and placed in the corresponding word element of r. All operations are performed using 32-bit modular arithmetic. When a is of type vector signed long long or vector unsigned long long, r is computed as follows: Each of the two doubleword elements of a is multiplied by the corresponding doubleword element of b. The sum of these two doubleword products is added to the contents of c and placed in r. All operations are performed using 32-bit modular arithmetic. Endian considerations: None. vmsummbm vec_msum vmsumshm vec_msum vmsumubm vec_msum vmsumuhm vec_msum vmsumudm vec_msum r a b c Example Implementation vector signed int vector signed char vector unsigned char vector signed int vmsummbm r,a,b,c vector signed int vector signed short vector signed short vector signed int vmsumshm r,a,b,c vector unsigned int vector unsigned char vector unsigned char vector unsigned int vmsumubm r,a,b,c vector unsigned int vector unsigned short vector unsigned short vector unsigned int vmsumuhm r,a,b,c vector signed __int128 vector signed long long vector signed long long vector signed __int128 vmsumudm r,a,b,c vector unsigned __int128 vector unsigned long long vector unsigned long long vector unsigned __int128 vmsumudm r,a,b,c

Vector Multiply-Sum Carryout r = vec_msumc (a, b, c) Purpose: Returns the carryout from adding the products of the elements of the first two source vectors together with the value in the third source vector. Result value: Let x be the product of a[0] and b[0], and let y be the product of a[1] and b[1]. Then r is equal to the carryout from x + y + c. The carryout is found by shifting the sum right by the size of c in bits. Endian considerations: None. vmsumcud vec_msumc r a b c Example Implementation Restrictions vector unsigned __int128 vector unsigned long long vector unsigned long long vector unsigned __int128 vmsumcud r,a,b,c

Vector Multiply-Sum Saturated r = vec_msums (a, b, c) Purpose: Returns a vector containing the results of performing a saturated multiply-sum operation using the source vectors. Result value: Assume that the elements of each vector are numbered beginning with 0. The value of each element n of r is obtained as follows. For p = 2n to 2n+1, multiply element p of a by element p of b. Add the sum of these products to element n of c. All additions are performed using 32-bit saturated arithmetic. Endian considerations: None. vmsumshs vec_msums vmsumuhs vec_msums r a b c Example Implementation vector signed int vector signed short vector signed short vector signed int vmsumshs r,a,b,c vector unsigned int vector unsigned short vector unsigned short vector unsigned int vmsumuhs r,a,b,c

Vector Move to Vector Status and Control Register vec_mtvscr (a) Purpose: Copies a value into the Vector Status and Control Register (VSCR). The low-order 32 bits of a are copied into the VSCR. Result value: None. Endian considerations: None. mtvscr vec_mtvscr a Example Implementation vector bool char mtvscr a vector signed char mtvscr a vector unsigned char mtvscr a vector bool short mtvscr a vector signed short mtvscr a vector unsigned short mtvscr a vector pixel mtvscr a vector bool int mtvscr a vector signed int mtvscr a vector unsigned int mtvscr a

Vector Multiply r = vec_mul (a, b) Purpose: Compute the products of corresponding elements of two vectors. Result value: Each element of r receives the product of the corresponding elements of a and b. Endian considerations: None. Notes: The example implementation for vector char assumes that the address of the permute control vector for the vperm instruction is in a register identified by pcv. Its value is {1,17,3,19,5,21,7,23,9,25,11,27,13,29,15,31}. Prior to ISA 3.1, there are currently no vector instructions to support vector long long multiplication, so the compiler must perform two scalar multiplies on the vector elements for this case. vmulesb vec_mul vmulosb vec_mul lxvw4x vec_mul vperm vec_mul vmuluwm vec_mul xxspltib vec_mul vmladduhm vec_mul xvmuldp vec_mul xvmulsp vec_mul vmulld vec_mul r a b Example Implementation Restrictions vector signed char vector signed char vector signed char vmulesb t,a,b vmulosb u,a,b lxvw4x v,0,pcv vperm r,t,u,v vector unsigned char vector unsigned char vector unsigned char vmulesb t,a,b vmulosb u,a,b lxvw4x v,0,pcv vperm r,t,u,v vector signed short vector signed short vector signed short xxspltib t,0 vmladduhm r,a,b,t vector unsigned short vector unsigned short vector unsigned short xxspltib t,0 vmladduhm r,a,b,t vector signed int vector signed int vector signed int vmuluwm r,a,b vector unsigned int vector unsigned int vector unsigned int vmuluwm r,a,b vector signed long long vector signed long long vector signed long long vmulld r,a,b ISA 3.1 or later vector unsigned long long vector unsigned long long vector unsigned long long vmulld r,a,b ISA 3.1 or later vector float vector float vector float xvmulsp r,a,b vector double vector double vector double xvmuldp r,a,b

Vector Multiply Even r = vec_mule (a, b) Purpose: Multiplies the even-numbered elements of the source vectors to produce the target vector. Result value: Each element n of r is the product of element 2n of a and element 2n of b. Endian considerations: The element numbering within a register is left-to-right for big-endian targets, and right-to-left for little-endian targets. vmulosh vec_mule vmulesh vec_mule vmulouh vec_mule vmuleuh vec_mule vmulosw vec_mule vmulesw vec_mule vmulouw vec_mule vmuleuw vec_mule vmulosb vec_mule vmulesb vec_mule vmuloub vec_mule vmuleub vec_mule vmulosd vec_mule vmulesd vec_mule vmuloud vec_mule vmuleud vec_mule r a b Example LE Implementation Example BE Implementation Restrictions vector signed short vector signed char vector signed char vmulosb r,a,b vmulesb r,a,b vector unsigned short vector unsigned char vector unsigned char vmuloub r,a,b vmuleub r,a,b vector signed int vector signed short vector signed short vmulosh r,a,b vmulesh r,a,b vector unsigned int vector unsigned short vector unsigned short vmulouh r,a,b vmuleuh r,a,b vector signed long long vector signed int vector signed int vmulosw r,a,b vmulesw r,a,b vector unsigned long long vector unsigned int vector unsigned int vmulouw r,a,b vmuleuw r,a,b vector signed __int128 vector signed long long vector signed long long vmulosd r,a,b vmulesd r,a,b ISA 3.1 or later vector unsigned __int128 vector unsigned long long vector unsigned long long vmuloud r,a,b vmuleud r,a,b ISA 3.1 or later

Vector Multiply High r = vec_mulh (a, b) Purpose: Multiplies the elements of the source vectors and places the high half of each result in the target vector. Result value: Each element of r is the high half of the product of the corresponding elements of a and b. Endian considerations: None. vmulhsw vec_mulh vmulhuw vec_mulh vmulhsd vec_mulh vmulhud vec_mulh r a b Example Implementation Restrictions vector signed int vector signed int vector signed int vmulhsw r,a,b ISA 3.1 or later vector unsigned int vector unsigned int vector unsigned int vmulhuw r,a,b ISA 3.1 or later vector signed long long vector signed long long vector signed long long vmulhsd r,a,b ISA 3.1 or later vector unsigned long long vector unsigned long long vector unsigned long long vmulhud r,a,b ISA 3.1 or later

Vector Multiply Odd r = vec_mulo (a, b) Purpose: Multiplies the odd-numbered elements of the source vectors to produce the target vector. Result value: Each element n of r is the product of element 2n+1 of a and element 2n+1 of b. Endian considerations: The element numbering within a register is left-to-right for big-endian targets, and right-to-left for little-endian targets. vmulesh vec_mulo vmulosh vec_mulo vmuleuh vec_mulo vmulouh vec_mulo vmulesw vec_mulo vmulosw vec_mulo vmuleuw vec_mulo vmulouw vec_mulo vmulesb vec_mulo vmulosb vec_mulo vmuleub vec_mulo vmuloub vec_mulo vmulesd vec_mulo vmulosd vec_mulo vmuleud vec_mulo vmuloud vec_mulo r a b Example LE Implementation Example BE Implementation Restrictions vector signed short vector signed char vector signed char vmulesb r,a,b vmulosb r,a,b vector unsigned short vector unsigned char vector unsigned char vmuleub r,a,b vmuloub r,a,b vector signed int vector signed short vector signed short vmulesh r,a,b vmulosh r,a,b vector unsigned int vector unsigned short vector unsigned short vmuleuh r,a,b vmulouh r,a,b vector signed long long vector signed int vector signed int vmulesw r,a,b vmulosw r,a,b vector unsigned long long vector unsigned int vector unsigned int vmuleuw r,a,b vmulouw r,a,b vector signed __int128 vector signed long long vector signed long long vmulesd r,a,b vmulosd r,a,b ISA 3.1 or later vector unsigned __int128 vector unsigned long long vector unsigned long long vmuleud r,a,b vmuloud r,a,b ISA 3.1 or later

Vector Negated Absolute Value r = vec_nabs (a) Purpose: Returns a vector containing the negated absolute values of the contents of the source vector. Result value: The value of each element of r is the negated absolute value of the corresponding element of a. For integer vectors, the arithmetic is modular. Endian considerations: None. vspltisw vec_nabs vsububm vec_nabs vminsb vec_nabs vsubuwm vec_nabs vminsw vec_nabs vsubudm vec_nabs vminsd vec_nabs vsubuhm vec_nabs vminsh vec_nabs xvnabsdp vec_nabs xvnabssp vec_nabs r a Example Implementation vector signed char vector signed char vspltisw t,0 vsububm u,t,a vminsb r,u,a vector signed short vector signed short vspltisw t,0 vsubuhm u,t,a vminsh r,u,a vector signed int vector signed int vspltisw t,0 vsubuwm u,t,a vminsw r,u,a vector signed long long vector signed long long vspltisw t,0 vsubudm u,t,a vminsd r,u,a vector float vector float xvnabssp r,a vector double vector double xvnabsdp r,a

Vector NAND r = vec_nand (a, b) Purpose: Performs a bitwise NAND of two vectors. Result value: r is the bitwise NAND of a and b. Endian considerations: None. xxlnand vec_nand r a b Example Implementation vector bool char vector bool char vector bool char xxlnand r,a,b vector signed char vector signed char vector signed char xxlnand r,a,b vector unsigned char vector unsigned char vector unsigned char xxlnand r,a,b vector bool short vector bool short vector bool short xxlnand r,a,b vector signed short vector signed short vector signed short xxlnand r,a,b vector unsigned short vector unsigned short vector unsigned short xxlnand r,a,b vector bool int vector bool int vector bool int xxlnand r,a,b vector signed int vector signed int vector signed int xxlnand r,a,b vector unsigned int vector unsigned int vector unsigned int xxlnand r,a,b vector bool long long vector bool long long vector bool long long xxlnand r,a,b vector signed long long vector signed long long vector signed long long xxlnand r,a,b vector unsigned long long vector unsigned long long vector unsigned long long xxlnand r,a,b vector float vector float vector float xxlnand r,a,b vector double vector double vector double xxlnand r,a,b

Vector AES Inverse Cipher Big-Endian r = vec_ncipher_be (a, b) Purpose: Performs one round of the AES inverse cipher operation on an intermediate state array a by using a given round key b. Result value: r contains the resulting intermediate state, after one round of the AES inverse cipher operation on intermediate state array a, using the round key specified by b. Endian considerations: All element and bit numberings of the AES inverse cipher operation use big-endian (i.e., left-to-right) order, reflecting the underlying hardware instruction. Unlike most of the vector intrinsics in this chapter, vec_ncipher_be does not follow the bi-endian programming model. vncipher vec_ncipher_be r a b Example Implementation vector unsigned char vector unsigned char vector unsigned char vncipher r,a,b

Vector AES Inverse Cipher Last Big-Endian r = vec_ncipherlast_be (a, b) Purpose: Performs the final round of the AES inverse cipher operation on an intermediate state array a using the specified round key b. Result value: r contains the resulting final state, after the final round of the AES inverse cipher operation on intermediate state array a, using the round key specified by b. Endian considerations: All element and bit numberings of the AES inverse cipher-last operation use big-endian (i.e., left-to-right) order, reflecting the underlying hardware instruction. Unlike most of the vector intrinsics in this chapter, vec_ncipherlast_be does not follow the bi-endian programming model. vncipherlast vec_ncipherlast_be r a b Example Implementation vector unsigned char vector unsigned char vector unsigned char vncipherlast r,a,b

Vector Nearby Integer r = vec_nearbyint (a) Purpose: Returns a vector containing the floating-point integral values nearest to the values of the corresponding elements of the source vector. Result value: Each element of r contains the nearest representable floating-point integral value to the value of the corresponding element of a. When an input element value is exactly between two integer values, the input value with the larger absolute value is selected. The current floating-point rounding mode is ignored. Endian considerations: None. xvrdpi vec_nearbyint xvrspi vec_nearbyint r a Example Implementation vector float vector float xvrspi r,a vector double vector double xvrdpi r,a

Vector Negate r = vec_neg (a) Purpose: Returns a vector containing the negated values of the contents of the source vector. Result value: The value of each element of r is the negated value of the corresponding element of a. For integer vectors, the arithmetic is modular. Endian considerations: None. vspltisw vec_neg vsububm vec_neg vsubuwm vec_neg vsubudm vec_neg vsubuhm vec_neg xvnegdp vec_neg xvnegsp vec_neg r a Example Implementation vector signed char vector signed char vspltisw t,0 vsububm r,t,a vector signed short vector signed short vspltisw t,0 vsubuhm r,t,a vector signed int vector signed int vspltisw t,0 vsubuwm r,t,a vector signed long long vector signed long long vspltisw t,0 vsubudm r,t,a vector float vector float xvnegsp r,a vector double vector double xvnegdp r,a

Vector Negated Multiply-Add r = vec_nmadd (a, b, c) Purpose: Returns a vector containing the results of performing a negated multiply-add operation on the source vectors. Result value: The value of each element of r is the product of the corresponding elements of a and b, added to the corresponding elements of c, then multiplied by –1.0. Endian considerations: None. xvnmaddadp vec_nmadd xvnmaddasp vec_nmadd r a b c Example Implementation vector float vector float vector float vector float xvnmaddasp r/c,a,b vector double vector double vector double vector double xvnmaddadp r/c,a,b

Vector Negated Multiply-Subtract r = vec_nmsub (a, b, c) Purpose: Returns a vector containing the results of performing a negated multiply-subtract operation on the source vectors. Result value: The value of each element of r is the value of the corresponding element of c subtracted from the product of the corresponding elements of a and b, and then multiplied by –1.0. Endian considerations: None. xvnmsubmdp vec_nmsub xvnmsubmsp vec_nmsub r a b c Example Implementation vector float vector float vector float vector float xvnmsubmsp r/a,b,c vector double vector double vector double vector double xvnmsubmdp r/a,b,c

Vector NOR r = vec_nor (a, b) Purpose: Performs a bitwise NOR of two vectors. Result value: r is the bitwise NOR of a and b. Endian considerations: None. xxlnor vec_nor r a b Example Implementation vector bool char vector bool char vector bool char xxlnor r,a,b vector signed char vector signed char vector signed char xxlnor r,a,b vector unsigned char vector unsigned char vector unsigned char xxlnor r,a,b vector bool short vector bool short vector bool short xxlnor r,a,b vector signed short vector signed short vector signed short xxlnor r,a,b vector unsigned short vector unsigned short vector unsigned short xxlnor r,a,b vector bool int vector bool int vector bool int xxlnor r,a,b vector signed int vector signed int vector signed int xxlnor r,a,b vector unsigned int vector unsigned int vector unsigned int xxlnor r,a,b vector bool long long vector bool long long vector bool long long xxlnor r,a,b vector signed long long vector signed long long vector signed long long xxlnor r,a,b vector unsigned long long vector unsigned long long vector unsigned long long xxlnor r,a,b vector float vector float vector float xxlnor r,a,b vector double vector double vector double xxlnor r,a,b

Vector OR r = vec_or (a, b) Purpose: Performs a bitwise OR of two vectors. Result value: r is the bitwise OR of a and b. Endian considerations: None. xxlor vec_or r a b Example Implementation vector bool char vector bool char vector bool char xxlor r,a,b vector signed char vector signed char vector signed char xxlor r,a,b vector unsigned char vector unsigned char vector unsigned char xxlor r,a,b vector bool short vector bool short vector bool short xxlor r,a,b vector signed short vector signed short vector signed short xxlor r,a,b vector unsigned short vector unsigned short vector unsigned short xxlor r,a,b vector bool int vector bool int vector bool int xxlor r,a,b vector signed int vector signed int vector signed int xxlor r,a,b vector unsigned int vector unsigned int vector unsigned int xxlor r,a,b vector bool long long vector bool long long vector bool long long xxlor r,a,b vector signed long long vector signed long long vector signed long long xxlor r,a,b vector unsigned long long vector unsigned long long vector unsigned long long xxlor r,a,b vector float vector float vector float xxlor r,a,b vector double vector double vector double xxlor r,a,b

Vector OR with Complement r = vec_orc (a, b) Purpose: Performs a bitwise OR of the first vector with the bitwise-complemented second vector. Result value: r is the bitwise OR of a and the bitwise complement of b. Endian considerations: None. xxlorc vec_orc r a b Example Implementation vector bool char vector bool char vector bool char xxlorc r,a,b vector signed char vector signed char vector signed char xxlorc r,a,b vector unsigned char vector unsigned char vector unsigned char xxlorc r,a,b vector bool short vector bool short vector bool short xxlorc r,a,b vector signed short vector signed short vector signed short xxlorc r,a,b vector unsigned short vector unsigned short vector unsigned short xxlorc r,a,b vector bool int vector bool int vector bool int xxlorc r,a,b vector signed int vector signed int vector signed int xxlorc r,a,b vector unsigned int vector unsigned int vector unsigned int xxlorc r,a,b vector bool long long vector bool long long vector bool long long xxlorc r,a,b vector signed long long vector signed long long vector signed long long xxlorc r,a,b vector unsigned long long vector unsigned long long vector unsigned long long xxlorc r,a,b vector float vector float vector float xxlorc r,a,b vector double vector double vector double xxlorc r,a,b

Vector Pack r = vec_pack (a, b) Purpose: Packs information from each element of two vectors into the result vector. Result value: Let v represent the concatenation of vectors a and b. For integer types, the value of each element of r is taken from the low-order half of the corresponding element of v. For floating-point types, the value of each element of r is the corresponding element of v, rounded to the result type. Endian considerations: The element numbering within a register is left-to-right for big-endian targets, and right-to-left for little-endian targets. vpkuhum vec_pack vpkudum vec_pack vpkuwum vec_pack xxpermdi vec_pack xvcvdpsp vec_pack vmrgow vec_pack vmrgew vec_pack r a b Example LE Implementation Example BE Implementation vector bool char vector bool short vector bool short vpkuhum r,b,a vpkuhum r,a,b vector signed char vector signed short vector signed short vpkuhum r,b,a vpkuhum r,a,b vector unsigned char vector unsigned short vector unsigned short vpkuhum r,b,a vpkuhum r,a,b vector bool short vector bool int vector bool int vpkuwum r,b,a vpkuwum r,a,b vector signed short vector signed int vector signed int vpkuwum r,b,a vpkuwum r,a,b vector unsigned short vector unsigned int vector unsigned int vpkuwum r,b,a vpkuwum r,a,b vector bool int vector bool long long vector bool long long vpkudum r,b,a vpkudum r,a,b vector signed int vector signed long long vector signed long long vpkudum r,b,a vpkudum r,a,b vector unsigned int vector unsigned long long vector unsigned long long vpkudum r,b,a vpkudum r,a,b vector float vector double vector double xxpermdi t,b,a,0 xxpermdi u,b,a,3 xvcvdpsp t,t xvcvdpsp u,u vmrgow r,t,u xxpermdi t,a,b,0 xxpermdi u,a,b,3 xvcvdpsp t,t xvcvdpsp u,u vmrgew r,t,u

Vector Pack 32-bit Float to Short r = vec_pack_to_short_fp32 (a, b) Purpose: Packs eight single-precision 32-bit floating-point numbers from two source vectors into a vector of eight 16-bit floating-point numbers. Result value: Let v represent the 16-element concatenation of a and b. Each value of r contains the result of converting the corresponding single-precision element of v to half-precision. Endian considerations: The element numbering within a register is left-to-right for big-endian targets, and right-to-left for little-endian targets. vctuxs vec_pack_to_short_fp32 vpkswss vec_pack_to_short_fp32 r a b Example LE Implementation Example BE Implementation Restrictions vector unsigned short vector float vector float xvcvsphp t,a xvcvsphp u,b vpkuwum r,t,u xvcvsphp t,a xvcvsphp u,b vpkuwum r,u,t ISA 3.0 or later

Vector Pack Pixel r = vec_packpx (a, b) Purpose: Packs information from each element of two vectors into the result vector. Result value: Let v be the concatenation of a and b. The value of each element of r is taken from the corresponding element of v as follows: The least-significant bit of the high-order byte is stored into the first bit of the result element. The least-significant 5 bits of each of the remaining bytes are stored into the remaining portion of the result element. Endian considerations: The element numbering within a register is left-to-right for big-endian targets, and right-to-left for little-endian targets. vpkpx vec_packpx r a b Example LE Implementation Example BE Implementation vector pixel vector unsigned int vector unsigned int vpkpx r,b,a vpkpx r,a,b

Vector Pack Saturated r = vec_packs (a, b) Purpose: Packs information from each element of two vectors into the result vector, using saturated values. Result value: Let v be the concatenation of a and b. The value of each element of r is the saturated value of the corresponding element of v. Endian considerations: The element numbering within a register is left-to-right for big-endian targets, and right-to-left for little-endian targets. vpkshss vec_packs vpkuhus vec_packs vpksdss vec_packs vpkudus vec_packs vpkswss vec_packs vpkuwus vec_packs r a b Example LE Implementation Example BE Implementation vector signed char vector signed short vector signed short vpkshss r,b,a vpkshss r,a,b vector unsigned char vector unsigned short vector unsigned short vpkuhus r,b,a vpkuhus r,a,b vector signed short vector signed int vector signed int vpkswss r,b,a vpkswss r,a,b vector unsigned short vector unsigned int vector unsigned int vpkuwus r,b,a vpkuwus r,a,b vector signed int vector signed long long vector signed long long vpksdss r,b,a vpksdss r,a,b vector unsigned int vector unsigned long long vector unsigned long long vpkudus r,b,a vpkudus r,a,b

Vector Pack Saturated Unsigned r = vec_packsu (a, b) Purpose: Packs information from each element of two vectors into the result vector, using unsigned saturated values. Result value: Let v be the concatenation of a and b. The value of each element of r is the saturated value of the corresponding element of v. Endian considerations: The element numbering within a register is left-to-right for big-endian targets, and right-to-left for little-endian targets. vpkshus vec_packsu vpkuhus vec_packsu vpksdus vec_packsu vpkudus vec_packsu vpkswus vec_packsu vpkuwus vec_packsu r a b Example LE Implementation Example BE Implementation vector unsigned char vector signed short vector signed short vpkshus r,b,a vpkshus r,a,b vector unsigned char vector unsigned short vector unsigned short vpkuhus r,b,a vpkuhus r,a,b vector unsigned short vector signed int vector signed int vpkswus r,b,a vpkswus r,a,b vector unsigned short vector unsigned int vector unsigned int vpkuwus r,b,a vpkuwus r,a,b vector unsigned int vector signed long long vector signed long long vpksdus r,b,a vpksdus r,a,b vector unsigned int vector unsigned long long vector unsigned long long vpkudus r,b,a vpkudus r,a,b

Vector Parity over Least-Significant Bits of Bytes r = vec_parity_lsbb (a) Purpose: Compute parity on the least-significant bit of each byte. Result value: Each element of r contains the parity computed over the low-order bit of each of the bytes in the corresponding element of a. An example for input a of type vector unsigned int follows: word index 0 1 2 3 byte index n 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 a 01010203 05080D15 22375990 E97962E1 bytes of a 01 01 02 03 05 08 0D 15 22 37 59 90 E9 79 62 E1 least-significant bit of byte n of a 1 1 0 1 1 0 1 1 0 1 1 0 1 1 0 1 r 00000001 00000001 00000000 00000001 Endian considerations: None. vprtybw vec_parity_lsbb vprtybq vec_parity_lsbb vprtybd vec_parity_lsbb r a Example Implementation Restrictions vector unsigned int vector signed int vprtybw r,a ISA 3.0 or later vector unsigned int vector unsigned int vprtybw r,a ISA 3.0 or later vector unsigned long long vector signed long long vprtybd r,a ISA 3.0 or later vector unsigned long long vector unsigned long long vprtybd r,a ISA 3.0 or later vector unsigned __int128 vector signed __int128 vprtybq r,a ISA 3.0 or later vector unsigned __int128 vector unsigned __int128 vprtybq r,a ISA 3.0 or later

Vector Parallel Bit Deposit r = vec_pdep (a, b) Purpose: Copies some bits from each element of one argument into positions of the result specified by a mask in a second argument. Result value: The rightmost bit of each element of a is copied into the bit position of the corresponding element of r in which the rightmost 1-bit appears in the corresponding element of b. The next-rightmost bit of each element of a is copied into the bit position of the corresponding element of r in which the next-rightmost 1-bit appears in the corresponding element of b; and so forth until the element of b contains no more 1-bits. All bits of the element of r that correspond to 0-bits in the corresponding element of b are set to zero. An example for doubleword inputs follows: Element 0 Element 1 a 0xfedcba9876543210 0xfedcba9876543210 b 0x8888888888888888 0xcccccccccccccccc r 0x0088 0080 0008 0000 0x4c 48 44 40 0c 08 04 00 Consider element 0 in the above table. Since b contains 16 set bits, only the rightmost 16 bits of a are pertinent to the result. These bits are 0011 0010 0001 0000. These bits are distributed into r at the bit positions that are set in b, providing the result shown in the table. Endian considerations: None. vpdepd vec_pdep r a b Example Implementation Restrictions vector unsigned long long vector unsigned long long vector unsigned long long vpdepd r,a,b ISA 3.1 or later

Vector Permute r = vec_perm (a, b, c) Purpose: Returns a vector that contains elements selected from two vectors, in the order specified by a third vector. Result value: Let v be the concatenation of a and b. Each byte of r selected by using the least-significant 5 bits of the corresponding byte of c as an index into v. Endian considerations: The element numbering within a register is left-to-right for big-endian targets, and right-to-left for little-endian targets. Notes: The example little-endian code generation uses the vpermr instruction from ISA 3.0. For earlier targets, the compiler must generate an extra instruction to adjust the permute control vector c. The vec_perm built-in should only use permutations that reorder vector elements of the specified type, not to reorder bytes within those elements. The results are not guaranteed to be consistent across big- and little-endian if you violate this rule. See . vpermr vec_perm vperm vec_perm r a b c Example LE Implementation Example BE Implementation vector bool char vector bool char vector bool char vector unsigned char vpermr r,b,a,c vperm r,a,b,c vector signed char vector signed char vector signed char vector unsigned char vpermr r,b,a,c vperm r,a,b,c vector unsigned char vector unsigned char vector unsigned char vector unsigned char vpermr r,b,a,c vperm r,a,b,c vector bool short vector bool short vector bool short vector unsigned char vpermr r,b,a,c vperm r,a,b,c vector signed short vector signed short vector signed short vector unsigned char vpermr r,b,a,c vperm r,a,b,c vector unsigned short vector unsigned short vector unsigned short vector unsigned char vpermr r,b,a,c vperm r,a,b,c vector pixel vector pixel vector pixel vector unsigned char vpermr r,b,a,c vperm r,a,b,c vector bool int vector bool int vector bool int vector unsigned char vpermr r,b,a,c vperm r,a,b,c vector signed int vector signed int vector signed int vector unsigned char vpermr r,b,a,c vperm r,a,b,c vector unsigned int vector unsigned int vector unsigned int vector unsigned char vpermr r,b,a,c vperm r,a,b,c vector bool long long vector bool long long vector bool long long vector unsigned char vpermr r,b,a,c vperm r,a,b,c vector signed long long vector signed long long vector signed long long vector unsigned char vpermr r,b,a,c vperm r,a,b,c vector unsigned long long vector unsigned long long vector unsigned long long vector unsigned char vpermr r,b,a,c vperm r,a,b,c vector float vector float vector float vector unsigned char vpermr r,b,a,c vperm r,a,b,c vector double vector double vector double vector unsigned char vpermr r,b,a,c vperm r,a,b,c

Vector Permute Extended r = vec_permx (a, b, c, d) Purpose: Perform a partial permute of the first two arguments, which form an aligned 32-byte section of an emulated vector up to 256 bytes wide, using the partial permute control vector in the third argument. The fourth argument (constrained to values of 0-7) identifies which 32-byte section of the emulated vector is contained in the first two arguments. Result value: Let s be the concatenation of a and b. For each integer value i from 0 to 15, do the following. Let j be the contents of bits 3 through 7 of byte element i of c. If d is equal to the contents of bits 0 through 2 of byte element i of c, the contents of byte element j of s are placed into byte element i of r. Otherwise the contents of byte element i of r are set to zero. Endian considerations: This instruction operates in big-endian fashion, with elements numbered in increasing order from left to right. Notes: This built-in function can be used to emulate permutes on vectors up to 256 bytes in length, and can also be used to perform a parallel table lookup on up to 256-byte tables. Please see the description of the xxpermx instruction in the Power Instruction Set Architecture () for examples. xxpermx vec_permx r a b c d Example Implementation Restrictions vector signed char vector signed char vector signed char vector unsigned char const int xxpermx r,a,b,c,d ISA 3.1 or later vector unsigned char vector unsigned char vector unsigned char vector unsigned char const int xxpermx r,a,b,c,d ISA 3.1 or later vector signed short vector signed short vector signed short vector unsigned char const int xxpermx r,a,b,c,d ISA 3.1 or later vector unsigned short vector unsigned short vector unsigned short vector unsigned char const int xxpermx r,a,b,c,d ISA 3.1 or later vector signed int vector signed int vector signed int vector unsigned char const int xxpermx r,a,b,c,d ISA 3.1 or later vector unsigned int vector unsigned int vector unsigned int vector unsigned char const int xxpermx r,a,b,c,d ISA 3.1 or later vector signed long long vector signed long long vector signed long long vector unsigned char const int xxpermx r,a,b,c,d ISA 3.1 or later vector unsigned long long vector unsigned long long vector unsigned long long vector unsigned char const int xxpermx r,a,b,c,d ISA 3.1 or later vector float vector float vector float vector unsigned char const int xxpermx r,a,b,c,d ISA 3.1 or later vector double vector double vector double vector unsigned char const int xxpermx r,a,b,c,d ISA 3.1 or later

Vector Permute and Exclusive-OR r = vec_permxor (a, b, c) Purpose: Applies a permute and exclusive-OR operation on two vectors of byte elements, with the selected elements identified by a third vector. Result value: For each i (0 ≤ i < 16), let x be bits 0–3 and y be bits 4–7 of byte element i of c. Byte element i of r is set to the exclusive-OR of byte elements x of a and y of b. An example for input a of type vector unsigned char follows: byte index 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 a F0 F1 F2 F3 F4 F5 F6 F7 F8 F9 FA FB FC FD FE FF b FF EF DF CF BF AF 9F 8F 7F 6F 5F 4F 3F 2F 1F 0F c 01 23 45 67 89 AB CD EF F0 E1 D2 C3 B4 A5 96 87 x y 0 1 2 3 4 5 6 7 8 9 A B C D E F F 0 E 1 D 2 C 3 B 4 A 5 9 6 8 7 ax by F0 EF F2 CF F4 AF F6 8F F8 6F FA 4F FC 2F FE 0F FF FF FE EF FD DF FC CF FB BF FA AF F9 9F F8 8F r 1F 3D 5B 79 97 B5 D3 F1 00 11 22 33 44 55 66 77 Endian considerations: The element numbering within a register is left-to-right for big-endian targets, and right-to-left for little-endian targets. xxlnor vec_permxor vpermxor vec_permxor r a b c Example LE Implementation Example BE Implementation vector bool char vector bool char vector bool char vector bool char xxlnor t,c,c vpermxor r,a,b,t vpermxor r,a,b,c vector signed char vector signed char vector signed char vector signed char xxlnor t,c,c vpermxor r,a,b,t vpermxor r,a,b,c vector unsigned char vector unsigned char vector unsigned char vector unsigned char xxlnor t,c,c vpermxor r,a,b,t vpermxor r,a,b,c

Vector Parallel Bit Extract r = vec_pext (a, b) Purpose: Copies some bits from each element of one argument as specified by a mask in a second argument into the rightmost bits of the result elements. Result value: The bit of each element of a, for which the corresponding bit of that element of b is the rightmost bit containing a 1, is copied into the rightmost bit position of the corresponding element of r. The bit of each element of a, for which the corresponding bit of that element of b is the next-rightmost bit containing a 1, is copied into the next-rightmost bit position of the corresponding element of r; and so forth until the element of b contains no more 1-bits. All bits in each element of r that weren't copied from the corresponding element of a are set to zero. An example for doubleword inputs follows: Element 0 Element 1 a 0x0088 0080 0008 0000 0x4c 48 44 40 0c 08 04 00 b 0x8888888888888888 0xcccccccccccccccc r 0x0000000000003210 0x0000000076543210 Consider element 0 in the above table. Since b contains 16 set bits, all but the rightmost 16 bits of r are set to zero. The remaining 16 bits are set by extracting the bits of a at the positions of the bits set in b. Those bits are 0011 0010 0001 0000, providing the result shown in the table. Endian considerations: None. vpextd vec_pext r a b Example Implementation Restrictions vector unsigned long long vector unsigned long long vector unsigned long long vpextd r,a,b ISA 3.1 or later

Vector Polynomial Multiply-Sum Big-Endian r = vec_pmsum_be (a, b) Purpose: Performs the exclusive-OR operation (implementing polynomial addition) on each even-odd pair of the polynomial-multiplication result of the corresponding elements of a and b. Result value: Each element i of r is computed by an exclusive-OR operation of the polynomial multiplication of input elements 2 × i of a and b and input elements 2 × i + 1 of a and b. An example follows for inputs of type vector unsigned int: doubleword index 0 1 word index 0 1 2 3 a A3000000 00A20000 0000A100 000000A0 b 00B30000 0000B200 000000B1 B00000B0 binary polynomial multiplicands A3000000 00B30000 00A20000 0000B200 0000A100 000000B1 000000A0 B00000B0 intermediate results XOR operands 004E350000000000 0000004E24000000 00000000004E1100 0000004E00004E00 r 004E354E24000000 0000004E004E5F00 Endian considerations: All element numberings in the above description denote big-endian (i.e., left-to-right) order, reflecting the underlying hardware instruction. Unlike most of the vector intrinsics in this chapter, vec_pmsum_be does not follow the bi-endian programming model. vpmsumh vec_pmsum_be vpmsumd vec_pmsum_be vpmsumw vec_pmsum_be vpmsumb vec_pmsum_be r a b Example Implementation vector unsigned short vector unsigned char vector unsigned char vpmsumb r,a,b vector unsigned int vector unsigned short vector unsigned short vpmsumh r,a,b vector unsigned long long vector unsigned int vector unsigned int vpmsumw r,a,b vector unsigned __int128 vector unsigned long long vector unsigned long long vpmsumd r,a,b

Vector Population Count r = vec_popcnt (a) Purpose: Returns a vector containing the number of bits set in each element of the source vector. Result value: The value of each element of r is the number of bits set in the corresponding element of a. Endian considerations: None. vpopcntb vec_popcnt vpopcntw vec_popcnt vpopcntd vec_popcnt vpopcnth vec_popcnt r a Example Implementation vector unsigned char vector signed char vpopcntb r,a vector unsigned char vector unsigned char vpopcntb r,a vector unsigned short vector signed short vpopcnth r,a vector unsigned short vector unsigned short vpopcnth r,a vector unsigned int vector signed int vpopcntw r,a vector unsigned int vector unsigned int vpopcntw r,a vector unsigned long long vector signed long long vpopcntd r,a vector unsigned long long vector unsigned long long vpopcntd r,a

Vector Reciprocal Estimate r = vec_re (a) Purpose: Returns a vector containing estimates of the reciprocals of the corresponding elements of the source vector. Result value: Each element of r contains the estimated value of the reciprocal of the corresponding element of a. An example for input a of type vector double follows: doubleword index 0 1 a -1.00000000000000000 4.00000000000000000 r -0.99996948242187500 0.249992370605468750 Endian considerations: None. Notes: For finite reciprocals, this intrinsic guarantees at least 14 bits of accuracy. xvredp vec_re xvresp vec_re r a Example Implementation vector float vector float xvresp r,a vector double vector double xvredp r,a

Vector Reciprocal Divide r = vec_recipdiv (a, b) Purpose: Returns a vector containing refined approximations of the division of the corresponding elements of a by the corresponding elements of b. Result value: Each element of r contains a refined approximation of the division of the corresponding element of a by the corresponding element of b. Endian considerations: None. Notes: The example implementation for vector double assumes that a register z initially contains the double-precision floating-point value 1.0 in each doubleword. For finite reciprocals, this intrinsic guarantees at least 23 bits of accuracy for single-precision floating point, and at least 52 bits of accuracy for double-precision floating point. This built-in function does not correspond to a single IEEE operation and does not provide the overflow, underflow, and NaN propagation characteristics specified for IEEE division. xvredp vec_recipdiv xvnmsubadp vec_recipdiv xvmaddmdp vec_recipdiv xvmuldp vec_recipdiv xvresp vec_recipdiv xvmulsp vec_recipdiv xvnmsubasp vec_recipdiv xvmaddmsp vec_recipdiv r a b Example Implementation vector float vector float vector float xvresp t,b xvmulsp u,a,t xvnmsubasp r/a,b,u xvmaddmsp r/a,t,u vector double vector double vector double xvredp t,b xvnmsubadp z,b,t xvmaddadp u,z,t xvmuldp v,a,u xvnmsubadp r/a,b,v xvmaddmdp r/a,u,v

Vector Replace Element r = vec_replace_elt (a, b, c) Purpose: Replaces an element in a vector. Result value: The result value r is set to the value of a. Then the element of r indexed by c using natural element order is set to the value of b. Endian considerations: The element numbering within a register is left-to-right for big-endian targets, and right-to-left for little-endian targets. Notes: The value of c must be between 0 and 3 for word-length elements, and between 0 and 1 for doubleword-length elements. vinsw vec_replace_elt vinsd vec_replace_elt r a b c Example LE Implementation Example BE Implementation Restrictions vector signed int vector signed int signed int const int vinsw r/a,b,12-4*c vinsw r/a,b,4*c ISA 3.1 or later vector unsigned int vector unsigned int unsigned int const int vinsw r/a,b,12-4*c vinsw r/a,b,4*c ISA 3.1 or later vector signed long long vector signed long long signed long long const int vinsd r/a,b,8-8*c vinsd r/a,b,8*c ISA 3.1 or later vector unsigned long long vector unsigned long long unsigned long long const int vinsd r/a,b,8-8*c vinsd r/a,b,8*c ISA 3.1 or later vector float vector float float const int vinsw r/a,b,12-4*c vinsw r/a,b,4*c ISA 3.1 or later vector double vector double double const int vinsd r/a,b,8-8*c vinsd r/a,b,8*c ISA 3.1 or later

Vector Replace Unaligned r = vec_replace_unaligned (a, b, c) Purpose: Replaces some bytes of a vector with a given value, not necessarily aligned where an element of that size would normally be placed. Result value: The result value r is set to the value of a. Then the value of b is written to r starting at the byte position indicated by c in left-to-right byte order. Endian considerations: The semantics of this built-in function differ for big-endian and little-endian targets, since the byte position indicated by c is in left-to-right order regardless of target endianness. Notes: The value of c must be between 0 and 15. vinsw vec_replace_unaligned vinsd vec_replace_unaligned r a b c Example Implementation Restrictions vector signed int vector signed int signed int const int vinsw r/a,b,c ISA 3.1 or later vector unsigned int vector unsigned int unsigned int const int vinsw r/a,b,c ISA 3.1 or later vector signed long long vector signed long long signed long long const int vinsd r/a,b,c ISA 3.1 or later vector unsigned long long vector unsigned long long unsigned long long const int vinsd r/a,b,c ISA 3.1 or later vector float vector float float const int vinsw r/a,b,c ISA 3.1 or later vector double vector double double const int vinsd r/a,b,c ISA 3.1 or later

Vector Reverse Bytes r = vec_revb (a) Purpose: Reverse the bytes of each vector element of a vector. Result value: Each element of r contains the byte-reversed value of the corresponding element of a. Endian considerations: None. Notes: The examples shown are for ISA 3.0. More complex sequences are required for earlier ISA levels. Interfaces that make no change to the data are deprecated. xxbrw vec_revb xxbrq vec_revb xxbrd vec_revb xxbrh vec_revb r a Example ISA 3.0 Implementation Restrictions vector bool char vector bool char [none] Deprecated vector signed char vector signed char [none] Deprecated vector unsigned char vector unsigned char [none] Deprecated vector bool short vector bool short xxbrh r,a Deprecated vector signed short vector signed short xxbrh r,a vector unsigned short vector unsigned short xxbrh r,a vector bool int vector bool int xxbrw r,a Deprecated vector signed int vector signed int xxbrw r,a vector unsigned int vector unsigned int xxbrw r,a vector bool long long vector bool long long xxbrd r,a Deprecated vector signed long long vector signed long long xxbrd r,a vector unsigned long long vector unsigned long long xxbrd r,a vector signed __int128 vector signed __int128 xxbrq r,a vector unsigned __int128 vector unsigned __int128 xxbrq r,a vector float vector float xxbrw r,a vector double vector double xxbrd r,a

Vector Reverse Elements r = vec_reve (a) Purpose: Reverse the elements of a vector. Result value: Returns a vector with the elements of the source vector in reversed order. Endian considerations: The vpermr instruction is most naturally used to implement this built-in function for a little-endian target, and the vperm instruction for a big-endian target. This is not technically necessary, however, provided the correct permute control vector is used. Note that use of vpermr requires ISA 3.0. Notes: The example implementations assume that the permute control vector for the vperm or vpermr instruction is in a register identified by pcv. The value of pcv differs based on the element size, and is the same (in natural element order) for big- and little-endian, assuming the use of vperm for big-endian and vpermr for little-endian. Vector types Permute control vector vector char { 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0 } vector short { 14, 15, 12, 13, 10, 11, 8, 9, 6, 7, 4, 5, 2, 3, 0, 1 } vector int, vector float { 12, 13, 14, 15, 8, 9, 10, 11, 4, 5, 6, 7, 0, 1, 2, 3 } vector long long, vector double { 8, 9, 10, 11, 12, 13, 14, 15, 0, 1, 2, 3, 4, 5, 6, 7 } vperm vec_reve vpermr vec_reve r a Example Implementation vector bool char vector bool char vperm[r] r,a,a,pcv vector signed char vector signed char vperm[r] r,a,a,pcv vector unsigned char vector unsigned char vperm[r] r,a,a,pcv vector bool short vector bool short vperm[r] r,a,a,pcv vector signed short vector signed short vperm[r] r,a,a,pcv vector unsigned short vector unsigned short vperm[r] r,a,a,pcv vector bool int vector bool int vperm[r] r,a,a,pcv vector signed int vector signed int vperm[r] r,a,a,pcv vector unsigned int vector unsigned int vperm[r] r,a,a,pcv vector bool long long vector bool long long vperm[r] r,a,a,pcv vector signed long long vector signed long long vperm[r] r,a,a,pcv vector unsigned long long vector unsigned long long vperm[r] r,a,a,pcv vector float vector float vperm[r] r,a,a,pcv vector double vector double vperm[r] r,a,a,pcv

Vector Round to Nearest Integer r = vec_rint (a) Purpose: Returns a vector containing the floating-point integral values nearest to the values of the corresponding elements of the source vector. Result value: Each element of r contains the nearest representable floating-point integral value to the value of the corresponding element of a. When an input element value is exactly between two integer values, the result value is selected based on the rounding mode specified by the Floating-Point Rounding Control field (RN) of the FPSCR register. Endian considerations: None. xvrdpic vec_rint xvrspic vec_rint r a Example Implementation vector float vector float xvrspic r,a vector double vector double xvrdpic r,a

Vector Rotate Left r = vec_rl (a, b) Purpose: Rotates each element of a vector left by a given number of bits. Result value: Each element of r is obtained by rotating the corresponding element of a left by the number of bits specified by the corresponding element of b. Endian considerations: None. vrlb vec_rl vrlw vec_rl vrld vec_rl vrlh vec_rl vrlq vec_rl xxpermdi vec_rl r a b Example Implementation Restrictions vector signed char vector signed char vector unsigned char vrlb r,a,b vector unsigned char vector unsigned char vector unsigned char vrlb r,a,b vector signed short vector signed short vector unsigned short vrlh r,a,b vector unsigned short vector unsigned short vector unsigned short vrlh r,a,b vector signed int vector signed int vector unsigned int vrlw r,a,b vector unsigned int vector unsigned int vector unsigned int vrlw r,a,b vector signed long long vector signed long long vector unsigned long long vrld r,a,b vector unsigned long long vector unsigned long long vector unsigned long long vrld r,a,b vector signed long long vector signed long long vector unsigned long long vrld r,a,b vector unsigned long long vector unsigned long long vector unsigned long long vrld r,a,b vector signed __int128 vector signed __int128 vector unsigned __int128 xxswapd t,b vrlq r,a,t ISA 3.1 or later vector unsigned __int128 vector unsigned __int128 vector unsigned __int128 xxswapd t,b vrlq r,a,t ISA 3.1 or later

Vector Rotate Left then Mask Insert r = vec_rlmi (a, b, c) Purpose: Rotates each element of a vector left and inserts each element under a mask. Result value: Each element of r is obtained by rotating the corresponding element of vector b left and inserting it under mask into the corresponding element of a. For the integer and long long forms, bits Bits 11:15 of the corresponding element of c contain the mask beginning, bits 19:23 contain the mask end, and bits 27:31 contain the shift count. For the __int128 forms, bits 117:123 of c contain the mask beginning, bits 125:131 contain the mask end, and bits 125:131 contain the shift count. Endian considerations: The referenced bit numbers within the elements of c are in left-to-right order. vrlwmi vec_rlmi vrldmi vec_rlmi vrlqmi vec_rlmi r a b c Example Implementation Restrictions vector unsigned int vector unsigned int vector unsigned int vector unsigned int vrlwmi r/a,b,c ISA 3.0 or later vector unsigned long long vector unsigned long long vector unsigned long long vector unsigned long long vrldmi r/a,b,c ISA 3.0 or later vector signed __int128 vector signed __int128 vector signed __int128 vector unsigned __int128 vrlqmi r/a,b,c ISA 3.1 or later vector unsigned __int128 vector unsigned __int128 vector unsigned __int128 vector unsigned __int128 vrlqmi r/a,b,c ISA 3.1 or later

Vector Rotate Left then AND with Mask r = vec_rlnm (a, b, c) Purpose: Rotates each element of a vector left, then logically ANDs it with a mask. Result value: Each element of a is rotated left, then logically ANDed with a mask specified by b and c. b contains the shift count for each element in the low-order byte, with other bytes zero. c contains the mask begin and mask end for each element, with the mask end in the low-order byte, the mask begin in the next higher byte, and other bytes zero. Endian considerations: None. vspltisw vec_rlnm vslw vec_rlnm xxlor vec_rlnm vrlwnm vec_rlnm xxspltib vec_rlnm vextsb2d vec_rlnm vsld vec_rlnm vrldnm vec_rlnm vrlqnm vec_rlnm xxpermdi vec_rlnm vsldoi vec_rlnm r a b c Example Implementation Restrictions vector unsigned int vector unsigned int vector unsigned int vector unsigned int vspltisw t,8 vslw u,b,t xxlor v,u,c vrlwnm r,a,v ISA 3.0 or later vector unsigned long long vector unsigned long long vector unsigned long long vector unsigned long long xxspltib t,8 vextsb2d u,t vsld v,b,u xxlor w,v,c vrldnm r,a,w ISA 3.0 or later vector signed __int128 vector signed __int128 vector unsigned __int128 vector unsigned __int128 xxswapd t,b vsldoi u,t,t,2 xxswapd v,c xxlor w,u,v vrlqnm r,a,w ISA 3.1 or later vector unsigned __int128 vector unsigned __int128 vector unsigned __int128 vector unsigned __int128 xxswapd t,b vsldoi u,t,t,2 xxswapd v,c xxlor w,u,v vrlqnm r,a,w ISA 3.1 or later

Vector Round r = vec_round (a) Purpose: Returns a vector containing the rounded values of the corresponding elements of the source vector. Result value: Each element of r contains the value of the corresponding element of a, rounded to the nearest representable floating-point integer, using IEEE round-to-nearest away-from-zero rounding. The current floating-point rounding mode is ignored. Notes: This function might not follow the strict operation definition of the resolution of a tie during a round if the -qstrict=nooperationprecision compiler option is specified to the XLC compiler. Endian considerations: None. xvrdpi vec_round vrfin vec_round r a Example Implementation vector float vector float vrfin r,a vector double vector double xvrdpi r,a

Vector Reciprocal Square Root r = vec_rsqrt (a) Purpose: Returns a vector containing a refined approximation of the reciprocal square roots of the corresponding elements of the source vector. This function provides an implementation-dependent greater precision than vec_rsqrte. Result value: Each element of r contains a refined approximation of the reciprocal square root of the corresponding element of a. Endian considerations: None. Notes: The example implementations assume that a register h initially contains the floating-point value 0.5 in each element (single- or double-precision as appropriate). For finite square roots, this intrinsic guarantees at least 23 bits of accuracy for single-precision floating point, and at least 52 bits of accuracy for double-precision floating point. xvrsqrtedp vec_rsqrt xvmuldp vec_rsqrt xxlor vec_rsqrt xvnmsubadp vec_rsqrt xvmaddadp vec_rsqrt xvnmsubmdp vec_rsqrt xvadddp vec_rsqrt xvrsqrtesp vec_rsqrt xvmulsp vec_rsqrt xvnmsubmsp vec_rsqrt xvmaddmsp vec_rsqrt r a Example Implementation vector float vector float xvrsqrtesp t,a xvmulsp u,t,a xvmulsp v,t,h xvnmsubmsp v,u,h xvmaddmsp r/v,t,t vector double vector double xvrsqrtedp t,a xvmuldp u,t,a xvmuldp v,t,h xxlor w,h,h xvnmsubadp w,u,v xvmaddadp v,v,w xvmaddadp u,u,w xvnmsubmdp u,v,h xvmaddadp v,v,u xvadddp r,v,v

Vector Reciprocal Square Root Estimate r = vec_rsqrte (a) Purpose: Returns a vector containing estimates of the reciprocal square roots of the corresponding elements of the source vector. Result value: Each element of r contains the estimated value of the reciprocal square root of the corresponding element of a. Endian considerations: None. Notes: For finite square roots, this intrinsic guarantees at least 14 bits of accuracy. xvrsqrtedp vec_rsqrte xvrsqrtesp vec_rsqrte r a Example Implementation vector float vector float xvrsqrtesp r,a vector double vector double xvrsqrtedp r,a

Vector AES SubBytes Big-Endian r = vec_sbox_be (a) Purpose: Performs the SubBytes operation, as defined in Federal Information Processing Standards FIPS-197, on a state_array contained in a. Result value: r contains the result of the SubBytes operation, as defined in Federal Information Processing Standard FIPS-197, on the state array represented by a. Endian considerations: All element numberings of the SubBytes operation use big-endian (i.e., left-to-right) order, reflecting the underlying hardware instruction. Unlike most of the vector intrinsics in this chapter, vec_sbox_be does not follow the bi-endian programming model. vsbox vec_sbox_be r a Example Implementation vector unsigned char vector unsigned char vsbox r,a

Vector Select r = vec_sel (a, b, c) Purpose: Returns a vector selecting bits from two source vectors depending on the corresponding bit values of a third source vector. Result value: Each bit of r has the value of the corresponding bit of a if the corresponding bit of c is 0. Otherwise, the bit of r has the value of the corresponding bit of b. Endian considerations: None. xxsel vec_sel r a b c Example Implementation vector bool char vector bool char vector bool char vector bool char xxsel r,a,b,c vector bool char vector bool char vector bool char vector unsigned char xxsel r,a,b,c vector signed char vector signed char vector signed char vector bool char xxsel r,a,b,c vector signed char vector signed char vector signed char vector unsigned char xxsel r,a,b,c vector unsigned char vector unsigned char vector unsigned char vector bool char xxsel r,a,b,c vector unsigned char vector unsigned char vector unsigned char vector unsigned char xxsel r,a,b,c vector bool short vector bool short vector bool short vector bool short xxsel r,a,b,c vector bool short vector bool short vector bool short vector unsigned short xxsel r,a,b,c vector signed short vector signed short vector signed short vector bool short xxsel r,a,b,c vector signed short vector signed short vector signed short vector unsigned short xxsel r,a,b,c vector unsigned short vector unsigned short vector unsigned short vector bool short xxsel r,a,b,c vector unsigned short vector unsigned short vector unsigned short vector unsigned short xxsel r,a,b,c vector bool int vector bool int vector bool int vector bool int xxsel r,a,b,c vector bool int vector bool int vector bool int vector unsigned int xxsel r,a,b,c vector signed int vector signed int vector signed int vector bool int xxsel r,a,b,c vector signed int vector signed int vector signed int vector unsigned int xxsel r,a,b,c vector unsigned int vector unsigned int vector unsigned int vector bool int xxsel r,a,b,c vector unsigned int vector unsigned int vector unsigned int vector unsigned int xxsel r,a,b,c vector bool long long vector bool long long vector bool long long vector bool long long xxsel r,a,b,c vector bool long long vector bool long long vector bool long long vector unsigned long long xxsel r,a,b,c vector signed long long vector signed long long vector signed long long vector bool long long xxsel r,a,b,c vector signed long long vector signed long long vector signed long long vector unsigned long long xxsel r,a,b,c vector unsigned long long vector unsigned long long vector unsigned long long vector bool long long xxsel r,a,b,c vector unsigned long long vector unsigned long long vector unsigned long long vector unsigned long long xxsel r,a,b,c vector float vector float vector float vector bool int xxsel r,a,b,c vector float vector float vector float vector unsigned int xxsel r,a,b,c vector double vector double vector double vector bool long long xxsel r,a,b,c vector double vector double vector double vector unsigned long long xxsel r,a,b,c

Vector SHA Sigma Big-Endian r = vec_shasigma_be (a, b, c) Purpose: Performs a Secure Hash computation in accordance with Federal Information Processing Standards FIPS-180-3. Result value: Each element of r contains the SHA256 or SHA512 hash as follows. The result of the SHA-256 function (r[i] for i = 0 to 3) is: σ0(a[i]), if b is 0 and bit i of the 4-bit c is 0. σ1(a[i]), if b is 0 and bit i of the 4-bit c is 1. Σ0(a[i]), if b is nonzero and bit i of the 4-bit c is 0. Σ1(a[i]), if b is nonzero and bit i of the 4-bit c is 1. The result of the SHA-512 function (r[i] for i = 0 to 1) is: σ0(a[i]), if b is 0 and bit 2 × i of the 4-bit c is 0. σ1(a[i]), if b is 0 and bit 2 × i of the 4-bit c is 1. Σ0(a[i]), if b is nonzero and bit 2 × i of the 4-bit c is 0. Σ1(a[i]), if b is nonzero and bit 2 × i of the 4-bit c is 1. Endian considerations: All element numberings in the above description denote big-endian (i.e., left-to-right) order, reflecting the underlying hardware instruction. Unlike most of the vector intrinsics in this chapter, vec_pmsum_be does not follow the bi-endian programming model. vshasigmaw vec_shasigma_be r a b c Example Implementation vector unsigned int vector unsigned int const int 4-bit unsigned literal vshasigmaw r,a,b,c vector unsigned long long vector unsigned long long const int 4-bit unsigned literal vshasigmaw r,a,b,d

Vector Convert Floating-Point to Signed Integer r = vec_signed (a) Purpose: Converts a vector of floating-point numbers to a vector of signed integers. Result value: Each element of r is obtained by truncating the corresponding element of a to a signed integer. The current floating-point rounding mode is ignored. Endian considerations: None. xvcvspsxws vec_signed xvcvdpsxds vec_signed r a Example Implementation vector signed int vector float xvcvspsxws r,a vector signed long long vector double xvcvdpsxds r,a

Vector Convert Double-Precision to Signed Word r = vec_signed2 (a, b) Purpose: Converts two vectors of double-precision floating-point numbers to a vector of signed 32-bit integers. Result value: Let v be the concatenation of a and b. Each element of r is obtained by truncating the corresponding element of v to a signed 32-bit integer. Endian considerations: The element numbering within a register is left-to-right for big-endian targets, and right-to-left for little-endian targets. xxpermdi vec_signed2 xvcvdpsxws vec_signed2 vmrgow vec_signed2 vmrgew vec_signed2 r a b Example LE Implementation Example BE Implementation vector signed int vector double vector double xxpermdi t,b,a,3 xxpermdi u,b,a,0 xvcvdpsxws v,t xvcvdpsxws w,u vmrgow r,w,v xxpermdi t,a,b,0 xxpermdi u,a,b,3 xvcvdpsxws v,t xvcvdpsxws w,u vmrgew r,v,w

Vector Convert Double-Precision to Signed Word Even r = vec_signede (a) Purpose: Converts elements of a source vector to signed integers and stores them in the even-numbered elements of the result vector. Result value: Element 0 of r contains element 0 of a, truncated to a signed integer. Element 2 of r contains element 1 of a, truncated to a signed integer. Elements 1 and 3 of r are undefined. Endian considerations: The element numbering within a register is left-to-right for big-endian targets, and right-to-left for little-endian targets. xvcvdpsxws vec_signede vsldoi vec_signede r a Example LE Implementation Example BE Implementation vector signed int vector double xvcvdpsxws t,a vsldoi r,t,t,12 xvcvdpsxws t,a

Vector Convert Double-Precision to Signed Word Odd r = vec_signedo (a) Purpose: Converts elements of a source vector to signed integers and stores them in the odd-numbered elements of the result vector. Result value: Element 1 of r contains element 0 of a, truncated to a signed integer. Element 3 of r contains element 1 of a, truncated to a signed integer. Elements 0 and 2 of r are undefined. Endian considerations: The element numbering within a register is left-to-right for big-endian targets, and right-to-left for little-endian targets. xvcvdpsxws vec_signedo vsldoi vec_signedo r a Example LE Implementation Example BE Implementation vector signed int vector double xvcvdpsxws r,a xvcvdpsxws t,a vsldoi r,t,t,12

Vector Sign Extend to Integer r = vec_signexti (a) Purpose: Sign-extend smaller elements of a source vector to word length in the result vector. Result value: Each word element of r is computed by sign-extending the lowest-numbered element in the corresponding word of a. Endian considerations: When a is of type vector signed char, elements 0, 4, 8, and 12 of a are sign-extended into elements 0, 1, 2, and 3 of r, respectively, using natural element order. When a is of type vector signed short, elements 0, 2, 4, and 6 of a are sign-extended into elements 0, 1, 2, and 3 of r, respectively, using natural element order. For big endian, vperm is used with the appropriate permute control vector (pcv) to achieve this. vextsb2w vec_signexti vextsh2w vec_signexti vperm vec_signexti r a Example LE Implementation Example BE Implementation Restrictions vector signed int vector signed char vextsb2w r,a vperm t,a,a,pcv vextsb2w r,t ISA 3.0 or later vector signed int vector signed short vextsh2w r,a vperm t,a,a,pcv vextsh2w r,t ISA 3.0 or later

Vector Sign Extend to Long Long r = vec_signextll (a) Purpose: Sign-extend smaller elements of a source vector to doubleword length in the result vector. Result value: Each doubleword element of r is computed by sign-extending the lowest-numbered element in the corresponding doubleword of a. Endian considerations: When a is of type vector signed char, elements 0 and 8 of a are sign-extended into elements 0 and 1 of r, respectively, using natural element order. When a is of type vector signed short, elements 0 and 4 of a are sign-extended into elements 0 and 1 of r, respectively, using natural element order. When a is of type vector signed int, elements 0 and 2 of a are sign-extended into elements 0 and 1 of r, respectively, using natural element order. For big endian, vperm is used with the appropriate permute control vector (pcv) to achieve this. vextsb2d vec_signextll vextsh2d vec_signextll vextsw2d vec_signextll vperm vec_signextll r a Example LE Implementation Example BE Implementation Restrictions vector signed long long vector signed char vextsb2d r,a vperm t,a,a,pcv vextsb2d r,t ISA 3.0 or later vector signed long long vector signed short vextsh2d r,a vperm t,a,a,pcv vextsh2d r,t ISA 3.0 or later vector signed long long vector signed int vextsw2d r,a vperm t,a,a,pcv vextsw2d r,t ISA 3.0 or later

Vector Sign Extend to Quadword Integer r = vec_signextq (a) Purpose: Sign-extend a doubleword integer in a source vector to quadword length in the result vector. Result value: r is computed by sign-extending element 0 of a. Endian considerations: Element 0 is the rightmost element for little endian, and the leftmost element for big endian. vextsd2q vec_signextq xxpermdi vec_signextq r a Example LE Implementation Example BE Implementation Restrictions vector signed __int128 vector signed long long vextsd2q r,a xxswapd t,a vextsd2q r,t ISA 3.1 or later

Vector Shift Left r = vec_sl (a, b) Purpose: Performs a left shift for each element of a vector. Result value: Each element of r is the result of left-shifting the corresponding element of a by the number of bits specified by the corresponding element of b, modulo the number of bits in the element. Zeros are shifted in from the right. Endian considerations: None. vslb vec_sl vslw vec_sl vsld vec_sl vslh vec_sl vslq vec_sl xxpermdi vec_sl r a b Example Implementation Restrictions vector signed char vector signed char vector unsigned char vslb r,a,b vector unsigned char vector unsigned char vector unsigned char vslb r,a,b vector signed short vector signed short vector unsigned short vslh r,a,b vector unsigned short vector unsigned short vector unsigned short vslh r,a,b vector signed int vector signed int vector unsigned int vslw r,a,b vector unsigned int vector unsigned int vector unsigned int vslw r,a,b vector signed long long vector signed long long vector unsigned long long vsld r,a,b vector unsigned long long vector unsigned long long vector unsigned long long vsld r,a,b vector signed __int128 vector signed __int128 vector unsigned __int128 xxswapd t,b vslq r,a,t ISA 3.1 or later vector unsigned __int128 vector unsigned __int128 vector unsigned __int128 xxswapd t,b vslq r,a,t ISA 3.1 or later

Vector Shift Left Double r = vec_sld (a, b, c) Purpose: Left shifts a double vector (that is, two concatenated vectors) by a given number of bytes. For vec_sld being performed on the vector bool and floating-point types, the result is undefined when the specified shift count is not a multiple of the element size. Result value: Vector r receives the most-significant 16 bytes obtained by concatenating a and b and shifting left by the number of bytes specified by c, which must be in the range 0–15. Endian considerations: This intrinsic is not endian-neutral, so uses of vec_sld in big-endian code must be rewritten for little-endian targets. Historically, vec_sld could be used to shift by amounts not a multiple of the element size for most types, in which case the purpose of the shift is difficult to determine and difficult to automatically rewrite efficiently for little endian. So the concatenation of a and b is done in big-endian fashion (left to right), and the shift is always to the left. This will generally produce surprising results for little-endian targets. See also . vsldoi vec_sld r a b c Example Implementation vector bool char vector bool char vector bool char 4-bit unsigned literal vsldoi r,a,b,c vector signed char vector signed char vector signed char 4-bit unsigned literal vsldoi r,a,b,c vector unsigned char vector unsigned char vector unsigned char 4-bit unsigned literal vsldoi r,a,b,c vector bool short vector bool short vector bool short 4-bit unsigned literal vsldoi r,a,b,c vector signed short vector signed short vector signed short 4-bit unsigned literal vsldoi r,a,b,c vector unsigned short vector unsigned short vector unsigned short 4-bit unsigned literal vsldoi r,a,b,c vector pixel vector pixel vector pixel 4-bit unsigned literal vsldoi r,a,b,c vector bool int vector bool int vector bool int 4-bit unsigned literal vsldoi r,a,b,c vector signed int vector signed int vector signed int 4-bit unsigned literal vsldoi r,a,b,c vector unsigned int vector unsigned int vector unsigned int 4-bit unsigned literal vsldoi r,a,b,c vector bool long long vector bool long long vector bool long long 4-bit unsigned literal vsldoi r,a,b,c vector signed long long vector signed long long vector signed long long 4-bit unsigned literal vsldoi r,a,b,c vector unsigned long long vector unsigned long long vector unsigned long long 4-bit unsigned literal vsldoi r,a,b,c vector float vector float vector float 4-bit unsigned literal vsldoi r,a,b,c vector double vector double vector double 4-bit unsigned literal vsldoi r,a,b,c

Vector Shift Left Double Bit Immediate r = vec_sldb (a, b, c) Purpose: Shifts a double-wide vector left by up to 7 bits and returns the leftmost 128 bits of the result. Result value: Let v be the concatenation of a and b, with a on the left. Let w be v shifted left by the number of bits specified by c. Then r is set to the leftmost 128 bits of w. Endian considerations: The semantics of this built-in function differ for big-endian and little-endian targets, since the concatenation of a and b is done in big-endian fashion (left to right). Notes: The value of c must be between 0 and 7, inclusive. vsldbi vec_sldb r a b c Example Implementation Restrictions vector signed char vector signed char vector signed char const unsigned int vsldbi r,a,b,c ISA 3.1 or later vector unsigned char vector unsigned char vector unsigned char const unsigned int vsldbi r,a,b,c ISA 3.1 or later vector signed short vector signed short vector signed short const unsigned int vsldbi r,a,b,c ISA 3.1 or later vector unsigned short vector unsigned short vector unsigned short const unsigned int vsldbi r,a,b,c ISA 3.1 or later vector signed int vector signed int vector signed int const unsigned int vsldbi r,a,b,c ISA 3.1 or later vector unsigned int vector unsigned int vector unsigned int const unsigned int vsldbi r,a,b,c ISA 3.1 or later vector signed long long vector signed long long vector signed long long const unsigned int vsldbi r,a,b,c ISA 3.1 or later vector unsigned long long vector unsigned long long vector unsigned long long const unsigned int vsldbi r,a,b,c ISA 3.1 or later

Vector Shift Left Double by Words r = vec_sldw (a, b, c) Purpose: Returns a vector obtained by shifting left the concatenated source vectors by the number of specified words. Result value: Vector r receives the most-significant 16 bytes obtained by concatenating a and b and shifting left by the number of words specified by c, which must be in the range 0–3. Endian considerations: This intrinsic is not endian-neutral, so uses of vec_sldw in big-endian code must be rewritten for little-endian targets. The concatenation of a and b is done in big-endian fashion (left to right), and the shift is always to the left. This will generally produce surprising results for little-endian targets. xxsldwi vec_sldw r a b c Example Implementation vector signed char vector signed char vector signed char 2-bit unsigned literal xxsldwi r,a,b,c vector unsigned char vector unsigned char vector unsigned char 2-bit unsigned literal xxsldwi r,a,b,c vector signed short vector signed short vector signed short 2-bit unsigned literal xxsldwi r,a,b,c vector unsigned short vector unsigned short vector unsigned short 2-bit unsigned literal xxsldwi r,a,b,c vector signed int vector signed int vector signed int 2-bit unsigned literal xxsldwi r,a,b,c vector unsigned int vector unsigned int vector unsigned int 2-bit unsigned literal xxsldwi r,a,b,c vector signed long long vector signed long long vector signed long long 2-bit unsigned literal xxsldwi r,a,b,c vector unsigned long long vector unsigned long long vector unsigned long long 2-bit unsigned literal xxsldwi r,a,b,c

Vector Shift Left Long r = vec_sll (a, b) Purpose: Left shifts an entire vector by a given number of bits. Result value: Vector r contains the contents of a, shifted left by the number of bits specified by the three least-significant bits of b. Zeros are supplied on the right. The shift count must have been replicated into all bytes of b; if not, the value of r is undefined. Endian considerations: This intrinsic is not endian-neutral, so uses of vec_sll in big-endian code must be rewritten for little-endian targets. vsl vec_sll r a b Example Implementation vector signed char vector signed char vector unsigned char vsl r,a,b vector unsigned char vector unsigned char vector unsigned char vsl r,a,b vector signed short vector signed short vector unsigned char vsl r,a,b vector unsigned short vector unsigned short vector unsigned char vsl r,a,b vector pixel vector pixel vector unsigned char vsl r,a,b vector signed int vector signed int vector unsigned char vsl r,a,b vector unsigned int vector unsigned int vector unsigned char vsl r,a,b vector signed long long vector signed long long vector unsigned char vsl r,a,b vector unsigned long long vector unsigned long long vector unsigned char vsl r,a,b

Vector Shift Left by Octets r = vec_slo (a, b) Purpose: Left shifts a vector by a given number of bytes (octets). Result value: Vector r receives the contents of a, shifted left by the number of bytes specified by bits 1:4 of the least-significant byte of b. Endian considerations: This intrinsic is not endian-neutral, so uses of vec_slo in big-endian code must be rewritten for little-endian targets. The shift count is in element 15 of b for big-endian, but in element 0 of b for little-endian. vslo vec_slo r a b Example Implementation vector signed char vector signed char vector signed char vslo r,a,b vector signed char vector signed char vector unsigned char vslo r,a,b vector unsigned char vector unsigned char vector signed char vslo r,a,b vector unsigned char vector unsigned char vector unsigned char vslo r,a,b vector signed short vector signed short vector signed char vslo r,a,b vector signed short vector signed short vector unsigned char vslo r,a,b vector unsigned short vector unsigned short vector signed char vslo r,a,b vector unsigned short vector unsigned short vector unsigned char vslo r,a,b vector pixel vector pixel vector signed char vslo r,a,b vector pixel vector pixel vector unsigned char vslo r,a,b vector signed int vector signed int vector signed char vslo r,a,b vector signed int vector signed int vector unsigned char vslo r,a,b vector unsigned int vector unsigned int vector signed char vslo r,a,b vector unsigned int vector unsigned int vector unsigned char vslo r,a,b vector signed long long vector signed long long vector signed char vslo r,a,b vector signed long long vector signed long long vector unsigned char vslo r,a,b vector unsigned long long vector unsigned long long vector signed char vslo r,a,b vector unsigned long long vector unsigned long long vector unsigned char vslo r,a,b vector float vector float vector signed char vslo r,a,b vector float vector float vector unsigned char vslo r,a,b

Vector Shift Left Variable r = vec_slv (a, b) Purpose: Left-shifts a vector by a varying number of bits by element. Result value: Let v be a 17-byte vector formed from a in bytes [0:15] and a zero byte in element 16. Then each byte element i of r is determined as follows. The start bit sb is obtained from bits 5:7 of byte element i of b. Then the contents of bits sb:sb+7 of the halfword in byte elements i:i+1 of v are placed into byte element i of r. An example follows: byte index 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 a 0F 0F 0F 0F 0F 0F 0F 0F 0F 0F 0F 0F 0F 0F 0F 0F b 00 01 02 03 04 05 06 07 08 09 0A 0B 0C 0D 0E 0F r 0F 1E 3C 78 F0 E1 C3 87 0F 1E 3C 78 F0 E1 C3 80 Endian considerations: All bit and byte element numbers are specified in big-endian order. This intrinsic is not endian-neutral. vslv vec_slv r a b Example Implementation Restrictions vector unsigned char vector unsigned char vector unsigned char vslv r,a,b ISA 3.0 or later

Vector Splat r = vec_splat (a, b) Purpose: Returns a vector that has all of its elements set to a given value. Result value: The value of each element of r is the value of the element of a specified by b, which must be an element number less than the number of elements supported for a's type. Endian considerations: The element numbering within a register is left-to-right for big-endian targets, and right-to-left for little-endian targets. vspltb vec_splat xxspltw vec_splat xxpermdi vec_splat vsplth vec_splat r a b Example LE Implementation Example BE Implementation vector bool char vector bool char const int vspltb r,a,15-b vspltb r,a,b vector signed char vector signed char const int vspltb r,a,15-b vspltb r,a,b vector unsigned char vector unsigned char const int vspltb r,a,15-b vspltb r,a,b vector bool short vector bool short const int vsplth r,a,7-b vsplth r,a,b vector signed short vector signed short const int vsplth r,a,7-b vsplth r,a,b vector unsigned short vector unsigned short const int vsplth r,a,7-b vsplth r,a,b vector pixel vector pixel const int vsplth r,a,7-b vsplth r,a,b vector bool int vector bool int const int xxspltw r,a,3-b xxspltw r,a,b vector signed int vector signed int const int xxspltw r,a,3-b xxspltw r,a,b vector unsigned int vector unsigned int const int xxspltw r,a,3-b xxspltw r,a,b vector bool long long vector bool long long const int xxpermdi r,a,a,(1-b)*3 xxpermdi r,a,a,b vector signed long long vector signed long long const int xxpermdi r,a,a,(1-b)*3 xxpermdi r,a,a,b vector unsigned long long vector unsigned long long const int xxpermdi r,a,a,(1-b)*3 xxpermdi r,a,a,b vector float vector float const int xxspltw r,a,3-b xxspltw r,a,b vector double vector double const int xxpermdi r,a,a,(1-b)*3 xxpermdi r,a,a,b

Vector Splat to Signed Byte r = vec_splat_s8 (a) Purpose: Returns a vector with all elements equal to the given value. Result value: Each element of r is given the sign-extended 5-bit value of a. The range of this value is [-16:15]. Endian considerations: None. vspltisb vec_splat_s8 r a Example Implementation vector signed char 5-bit signed literal vspltisb r,a

Vector Splat to Signed Halfword r = vec_splat_s16 (a) Purpose: Returns a vector with all elements equal to the given value. Result value: Each element of r is given the sign-extended 5-bit value of a. The range of this value is [-16:15]. Endian considerations: None. vspltish vec_splat_s16 r a Example Implementation vector signed short 5-bit signed literal vspltish r,a

Vector Splat to Signed Word r = vec_splat_s32 (a) Purpose: Returns a vector with all elements equal to the given value. Result value: Each element of r is given the sign-extended 5-bit value of a. The range of this value is [-16:15]. Endian considerations: None. vspltisw vec_splat_s32 r a Example Implementation vector signed int 5-bit signed literal vspltisw r,a

Vector Splat to Unsigned Byte r = vec_splat_u8 (a) Purpose: Returns a vector with all elements equal to the given value. Result value: The 5-bit signed value of a is sign-extended to a byte and the resulting value is cast to an unsigned char. This value is placed in each element of r. The range of the original value is [-16:15]. Endian considerations: None. vspltisb vec_splat_u8 r a Example Implementation vector unsigned char 5-bit signed literal vspltisb r,a

Vector Splat to Unsigned Halfword r = vec_splat_u16 (a) Purpose: Returns a vector with all elements equal to the given value. Result value: The 5-bit signed value of a is sign-extended to a halfword and the resulting value is cast to an unsigned short. This value is placed in each element of r. The range of the original value is [-16:15]. Endian considerations: None. vspltish vec_splat_u16 r a Example Implementation vector unsigned short 5-bit signed literal vspltish r,a

Vector Splat to Unsigned Word r = vec_splat_u32 (a) Purpose: Returns a vector with all elements equal to the given value. Result value: The 5-bit signed value of a is sign-extended to a word and the resulting value is cast to an unsigned int. This value is placed in each element of r. The range of the original value is [-16:15]. Endian considerations: None. vspltisw vec_splat_u32 r a Example Implementation vector unsigned int 5-bit signed literal vspltisw r,a

Vector Splat Immediate r = vec_splati (a) Purpose: Copy an immediate value into every element of a vector. Result value: The result value r is a vector with each element set to the value of a. Endian considerations: None. xxspltiw vec_splati r a Example Implementation Restrictions vector signed int const signed int xxspltiw r,a ISA 3.1 or later vector float const float xxspltiw r,a ISA 3.1 or later

Vector Splat Immediate Insert r = vec_splati_ins (a, b, c) Purpose: Copy an immediate value into a specified word of each doubleword of a vector, leaving the remaining words unchanged. Result value: If b has a value of 0, then the even elements of r are set to the value of c and the odd elements of r are copied from the corresponding elements of a. Otherwise, b must have a value of 1, and the odd elements of r are set to the value of c and the even elements of r are copied from the corresponding elements of a. Endian considerations: Element numbering is left-to-right in a register for big-endian targets, and right-to-left for little-endian targets. xxsplti32dx vec_splati_ins r a b c Example LE Implementation Example BE Implementation Restrictions vector signed int vector signed int const unsigned int const signed int xxsplti32dx r/a,1-b,c xxsplti32dx r/a,b,c ISA 3.1 or later vector unsigned int vector unsigned int const unsigned int const unsigned int xxsplti32dx r/a,1-b,c xxsplti32dx r/a,b,c ISA 3.1 or later vector float vector float const unsigned int const float xxsplti32dx r/a,1-b,c xxsplti32dx r/a,b,c ISA 3.1 or later

Vector Splat Immediate Double r = vec_splatid (a) Purpose: Convert an immediate single-precision floating-point value to double precision, and copy the result into every element of a vector. Result value: The result value r is a vector with each element set to the value of a when converted to double precision. Endian considerations: None. Notes: If a is a single-precision denormal value, the value of r is undefined. xxspltidp vec_splatid r a Example Implementation Restrictions vector double const float xxspltidp r,a ISA 3.1 or later

Vector Splat Scalar r = vec_splats (a) Purpose: Returns a vector with the value of each element set to the value of the scalar input parameter. Result value: Each element of r is set to the value of a. Endian considerations: None. rlwinm vec_splats mtvsrd vec_splats vspltb vec_splats mtvsrwz vec_splats xxspltw vec_splats xxpermdi vec_splats vsplth vec_splats xscvdpspn vec_splats r a Example Implementation vector signed char signed char rlwinm t,a,0,0xff mtvsrd u,t vspltb r,u,7 vector unsigned char unsigned char rlwinm t,a,0,0xff mtvsrd u,t vspltb r,u,7 vector signed short signed short rlwinm t,a,0,0xffff mtvsrd u,t vsplth r,u,3 vector unsigned short unsigned short rlwinm t,a,0,0xffff mtvsrd u,t vsplth r,u,3 vector signed int signed int mtvsrd t,a vspltb r,t,7 vector unsigned int unsigned int mtvsrd t,a vspltb r,t,7 vector signed long long signed long long mtvsrd t,a xxpermdi r,t,t,0 vector unsigned long long unsigned long long mtvsrd t,a xxpermdi r,t,t,0 vector signed __int128 signed __int128 mtvsrwz t,a xxspltw r,t,1 vector unsigned __int128 unsigned __int128 mtvsrwz t,a xxspltw r,t,1 vector float float xscvdpspn t,a xxspltw r,t,0 vector double double xxpermdi r,a,a,0

Vector Square Root r = vec_sqrt (a) Purpose: Returns a vector containing the square root of each element in the source vector. Result value: Each element of r is the square root of the corresponding element of a. Endian considerations: None. xvsqrtdp vec_sqrt xvsqrtsp vec_sqrt r a Example Implementation vector float vector float xvsqrtsp r,a vector double vector double xvsqrtdp r,a

Vector Shift Right r = vec_sr (a, b) Purpose: Performs a logical right shift for each element of a vector. Result value: Each element of r is the result of logically right-shifting the corresponding element of a by the number of bits specified by the corresponding element of b, modulo the number of bits in the element. Zeros are shifted in from the left. Endian considerations: None. vsrb vec_sr vsrw vec_sr vsrd vec_sr vsrh vec_sr vsrq vec_sr xxpermdi vec_sr r a b Example Implementation Restrictions vector signed char vector signed char vector unsigned char vsrb r,a,b vector unsigned char vector unsigned char vector unsigned char vsrb r,a,b vector signed short vector signed short vector unsigned short vsrh r,a,b vector unsigned short vector unsigned short vector unsigned short vsrh r,a,b vector signed int vector signed int vector unsigned int vsrw r,a,b vector unsigned int vector unsigned int vector unsigned int vsrw r,a,b vector signed long long vector signed long long vector unsigned long long vsrd r,a,b vector unsigned long long vector unsigned long long vector unsigned long long vsrd r,a,b vector signed __int128 vector signed __int128 vector unsigned __int128 xxswapd t,b vsrq r,a,t ISA 3.1 or later vector unsigned __int128 vector unsigned __int128 vector unsigned __int128 xxswapd t,b vsrq r,a,t ISA 3.1 or later

Vector Shift Right Algebraic r = vec_sra (a, b) Purpose: Performs an algebraic right shift for each element of a vector. Result value: Each element of r is the result of algebraically right-shifting the corresponding element of a by the number of bits specified by the corresponding element of b, modulo the number of bits in the element. Copies of the sign bit are shifted in from the left. Endian considerations: None. vsrab vec_sra vsraw vec_sra vsrad vec_sra vsrah vec_sra vsraq vec_sra xxpermdi vec_sra r a b Example Implementation Restrictions vector signed char vector signed char vector unsigned char vsrab r,a,b vector unsigned char vector unsigned char vector unsigned char vsrab r,a,b vector signed short vector signed short vector unsigned short vsrah r,a,b vector unsigned short vector unsigned short vector unsigned short vsrah r,a,b vector signed int vector signed int vector unsigned int vsraw r,a,b vector unsigned int vector unsigned int vector unsigned int vsraw r,a,b vector signed long long vector signed long long vector unsigned long long vsrad r,a,b vector unsigned long long vector unsigned long long vector unsigned long long vsrad r,a,b vector signed __int128 vector signed __int128 vector unsigned __int128 xxswapd t,b vsraq r,a,t ISA 3.1 or later vector unsigned __int128 vector unsigned __int128 vector unsigned __int128 xxswapd t,b vsraq r,a,t ISA 3.1 or later

Vector Shift Right Double Bit Immediate r = vec_srdb (a, b, c) Purpose: Shifts a double-wide vector right by up to 7 bits and returns the rightmost 128 bits of the result. Result value: Let v be the concatenation of a and b, with a on the left. Let w be v shifted right by the number of bits specified by c. Then r is set to the rightmost 128 bits of w. Endian considerations: The semantics of this built-in function differ for big-endian and little-endian targets, since the concatenation of a and b is done in big-endian fashion (left to right). Notes: The value of c must be between 0 and 7, inclusive. vsrdbi vec_srdb r a b c Example Implementation Restrictions vector signed char vector signed char vector signed char const unsigned int vsrdbi r,a,b,c ISA 3.1 or later vector unsigned char vector unsigned char vector unsigned char const unsigned int vsrdbi r,a,b,c ISA 3.1 or later vector signed short vector signed short vector signed short const unsigned int vsrdbi r,a,b,c ISA 3.1 or later vector unsigned short vector unsigned short vector unsigned short const unsigned int vsrdbi r,a,b,c ISA 3.1 or later vector signed int vector signed int vector signed int const unsigned int vsrdbi r,a,b,c ISA 3.1 or later vector unsigned int vector unsigned int vector unsigned int const unsigned int vsrdbi r,a,b,c ISA 3.1 or later vector signed long long vector signed long long vector signed long long const unsigned int vsrdbi r,a,b,c ISA 3.1 or later vector unsigned long long vector unsigned long long vector unsigned long long const unsigned int vsrdbi r,a,b,c ISA 3.1 or later

Vector Shift Right Long r = vec_srl (a, b) Purpose: Right shifts a vector by a given number of bits. Result value: Vector r contains the contents of a, shifted right by the number of bits specified by the 3 least-significant bits of b. Zeros are supplied on the left. The shift count must have been replicated into all bytes of b; if not, the value of r is undefined. Endian considerations: This intrinsic is not endian-neutral, so uses of vec_srl in big-endian code must be rewritten for little-endian targets. vsr vec_srl r a b Example Implementation vector signed char vector signed char vector unsigned char vsr r,a,b vector unsigned char vector unsigned char vector unsigned char vsr r,a,b vector signed short vector signed short vector unsigned char vsr r,a,b vector unsigned short vector unsigned short vector unsigned char vsr r,a,b vector pixel vector pixel vector unsigned char vsr r,a,b vector signed int vector signed int vector unsigned char vsr r,a,b vector unsigned int vector unsigned int vector unsigned char vsr r,a,b vector signed long long vector signed long long vector unsigned char vsr r,a,b vector unsigned long long vector unsigned long long vector unsigned char vsr r,a,b

Vector Shift Right by Octets r = vec_sro (a, b) Purpose: Right shifts a vector by a given number of bytes (octets). Result value: Vector r receives the contents of a, shifted right by the number of bytes specified by bits 1–4 of the least-significant byte of b. Zeros are supplied from the left. Endian considerations: This intrinsic is not endian-neutral, so uses of vec_sro in big-endian code must be rewritten for little-endian targets. The shift count is in element 15 of b for big-endian, but in element 0 of b for little-endian. See also . vsro vec_sro r a b Example Implementation vector signed char vector signed char vector signed char vsro r,a,b vector signed char vector signed char vector unsigned char vsro r,a,b vector unsigned char vector unsigned char vector signed char vsro r,a,b vector unsigned char vector unsigned char vector unsigned char vsro r,a,b vector signed short vector signed short vector signed char vsro r,a,b vector signed short vector signed short vector unsigned char vsro r,a,b vector unsigned short vector unsigned short vector signed char vsro r,a,b vector unsigned short vector unsigned short vector unsigned char vsro r,a,b vector pixel vector pixel vector signed char vsro r,a,b vector pixel vector pixel vector unsigned char vsro r,a,b vector signed int vector signed int vector signed char vsro r,a,b vector signed int vector signed int vector unsigned char vsro r,a,b vector unsigned int vector unsigned int vector signed char vsro r,a,b vector unsigned int vector unsigned int vector unsigned char vsro r,a,b vector signed long long vector signed long long vector signed char vsro r,a,b vector signed long long vector signed long long vector unsigned char vsro r,a,b vector unsigned long long vector unsigned long long vector signed char vsro r,a,b vector unsigned long long vector unsigned long long vector unsigned char vsro r,a,b vector float vector float vector signed char vsro r,a,b vector float vector float vector unsigned char vsro r,a,b

Vector Shift Right Variable r = vec_srv (a, b) Purpose: Right-shifts a vector by a varying number of bits by element. Result value: Let v be a 17-byte vector formed from a zero byte in element 0 and the elements of a in bytes [1:16]. Then each byte element i of r is determined as follows. The start bit sb is obtained from bits 5:7 of byte element i of b. Then the contents of bits (8 – sb):(15 – sb) of the halfword in byte elements i:i+1 of v are placed into byte element i of r. An example follows: byte index 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 a 0F 0F 0F 0F 0F 0F 0F 0F 0F 0F 0F 0F 0F 0F 0F 0F b 0F 0E 0D 0C 0B 0A 09 08 07 06 05 04 03 02 01 00 r 00 3C 78 F0 E1 C3 87 0F 1E 3C 78 F0 E1 C3 87 0F Endian considerations: All bit and byte element numbers are specified in big-endian order. This intrinsic is not endian-neutral. vsrv vec_srv r a b Example Implementation Restrictions vector unsigned char vector unsigned char vector unsigned char vsrv r,a,b ISA 3.0 or later

Vector Store Indexed vec_st (a, b, c) Purpose: Stores a 16-byte vector into memory at the address specified by a displacement and a pointer, ignoring the four low-order bits of the calculated address. Operation: A memory address is obtained by adding b and c, and masking off the four low-order bits of the result. The 16-byte vector in a is stored to the resultant memory address. Endian considerations: None. stvx vec_st a b c Example ISA 3.0 Implementation vector bool char signed long vector bool char * stvx r,b,a vector bool char signed long signed char * stvx r,b,a vector bool char signed long unsigned char * stvx r,b,a vector signed char signed long signed char * stvx r,b,a vector signed char signed long vector signed char * stvx r,b,a vector unsigned char signed long unsigned char * stvx r,b,a vector unsigned char signed long vector unsigned char * stvx r,b,a vector bool short signed long vector bool short * stvx r,b,a vector bool short signed long signed short * stvx r,b,a vector bool short signed long unsigned short * stvx r,b,a vector signed short signed long signed short * stvx r,b,a vector signed short signed long vector signed short * stvx r,b,a vector unsigned short signed long unsigned short * stvx r,b,a vector unsigned short signed long vector unsigned short * stvx r,b,a vector pixel signed long vector pixel * stvx r,b,a vector bool int signed long vector bool int * stvx r,b,a vector bool int signed long signed int * stvx r,b,a vector bool int signed long unsigned int * stvx r,b,a vector signed int signed long signed int * stvx r,b,a vector signed int signed long vector signed int * stvx r,b,a vector unsigned int signed long unsigned int * stvx r,b,a vector unsigned int signed long vector unsigned int * stvx r,b,a vector bool long long signed long vector bool long long * stvx r,b,a vector signed long long signed long signed long long * stvx r,b,a vector signed long long signed long vector signed long long * stvx r,b,a vector unsigned long long signed long unsigned long long * stvx r,b,a vector unsigned long long signed long vector unsigned long long * stvx r,b,a vector float signed long float * stvx r,b,a vector float signed long vector float * stvx r,b,a vector double signed long double * stvx r,b,a vector double signed long vector double * stvx r,b,a

Vector Store Element Indexed vec_ste (a, b, c) Purpose: Stores a single element from a 16-byte vector into memory at the address specified by a displacement and a pointer, aligned to the element size. Operation: The integer value b is added to the pointer value c. The resulting address is rounded down to the nearest address that is a multiple of es, where es is 1 for char pointers, 2 for short pointers, and 4 for float or int pointers. An element offset eo is calculated by taking the resultant address modulo 16. The vector element of a at offset eo is stored to the resultant address. Endian considerations: None. Notes: Be careful to note that the address (b+c) is aligned to an element boundary. Do not attempt to store unaligned data with this intrinsic. stvebx vec_ste stvewx vec_ste stvehx vec_ste a b c Example ISA 3.0 Implementation vector bool char signed long signed char * stvebx r,b,a vector bool char signed long unsigned char * stvebx r,b,a vector signed char signed long signed char * stvebx r,b,a vector unsigned char signed long unsigned char * stvebx r,b,a vector bool short signed long signed short * stvehx r,b,a vector bool short signed long unsigned short * stvehx r,b,a vector signed short signed long signed short * stvehx r,b,a vector unsigned short signed long unsigned short * stvehx r,b,a vector pixel signed long unsigned short * stvehx r,b,a vector bool int signed long signed int * stvewx r,b,a vector bool int signed long unsigned int * stvewx r,b,a vector signed int signed long signed int * stvewx r,b,a vector unsigned int signed long unsigned int * stvewx r,b,a vector float signed long float * stvewx r,b,a

Vector Store Indexed Least Recently Used vec_stl (a, b, c) Purpose: Stores a 16-byte vector into memory at the address specified by a displacement and a pointer, ignoring the four low-order bits of the calculated address, and marking the cache line containing the address as least frequently used. Operation: A memory address is obtained by adding b and c, and masking off the four low-order bits of the result. The 16-byte vector in a is stored to the resultant memory address, and the containing cache line is marked as least frequently used. Endian considerations: None. Notes: This intrinsic can be used to indicate the last access to a portion of memory, as a hint to the data cache controller that the associated cache line can be replaced without performance loss. stvxl vec_stl a b c Example ISA 3.0 Implementation vector bool char signed long vector bool char * stvxl r,b,a vector bool char signed long signed char * stvxl r,b,a vector bool char signed long unsigned char * stvxl r,b,a vector signed char signed long signed char * stvxl r,b,a vector signed char signed long vector signed char * stvxl r,b,a vector unsigned char signed long unsigned char * stvxl r,b,a vector unsigned char signed long vector unsigned char * stvxl r,b,a vector bool short signed long vector bool short * stvxl r,b,a vector bool short signed long signed short * stvxl r,b,a vector bool short signed long unsigned short * stvxl r,b,a vector signed short signed long signed short * stvxl r,b,a vector signed short signed long vector signed short * stvxl r,b,a vector unsigned short signed long unsigned short * stvxl r,b,a vector unsigned short signed long vector unsigned short * stvxl r,b,a vector pixel signed long vector pixel * stvxl r,b,a vector bool int signed long vector bool int * stvxl r,b,a vector bool int signed long signed int * stvxl r,b,a vector bool int signed long unsigned int * stvxl r,b,a vector signed int signed long signed int * stvxl r,b,a vector signed int signed long vector signed int * stvxl r,b,a vector unsigned int signed long unsigned int * stvxl r,b,a vector unsigned int signed long vector unsigned int * stvxl r,b,a vector bool long long signed long vector bool long long * stvxl r,b,a vector signed long long signed long signed long long * stvxl r,b,a vector signed long long signed long vector signed long long * stvxl r,b,a vector unsigned long long signed long unsigned long long * stvxl r,b,a vector unsigned long long signed long vector unsigned long long * stvxl r,b,a vector float signed long float * stvxl r,b,a vector float signed long vector float * stvxl r,b,a vector double signed long double * stvxl r,b,a vector double signed long vector double * stvxl r,b,a

Vector String Isolate Left-Justified r = vec_stril (a) Purpose: Copy a null-terminated string of elements from the input vector to the output vector, replacing all elements following the first zero element with zeros. Result value: Elements in a are copied, in natural element order, to corresponding elements of r until the first zero element of a is encountered, or until all elements have been copied. If a zero element is encountered, all remaining elements of r are set to zero. Endian considerations: The element numbering within a register is left-to-right for big-endian targets, and right-to-left for little-endian targets. vstribr vec_stril vstribl vec_stril vstrihr vec_stril vstrihl vec_stril r a Example LE Implementation Example BE Implementation Restrictions vector unsigned char vector unsigned char vstribr r,a vstribl r,a ISA 3.1 or later vector signed char vector signed char vstribr r,a vstribl r,a ISA 3.1 or later vector unsigned short vector unsigned short vstrihr r,a vstrihl r,a ISA 3.1 or later vector signed short vector signed short vstrihr r,a vstrihl r,a ISA 3.1 or later

Vector String Isolate Left-Justified (Predicate) r = vec_stril_p (a) Purpose: Tests whether the input vector contains a zero element. Result value: r is given a non-zero value if any element in a has a zero value. Otherwise, r is set to zero. Endian considerations: Compilers should generate the same instruction (using the record form) that they generate for vec_stril. Notes: Use this built-in in preference to vec_cmpnez when the test guards a call to vec_stril. This allows compilers to generate the most efficient code. vstribr. vec_stril_p vstribl. vec_stril_p vstrihr. vec_stril_p vstrihl. vec_stril_p setbc vec_stril_p r a Example LE Implementation Example BE Implementation Restrictions int vector unsigned char vstribr. t,a setbc r,26 vstribl. t,a setbc r,26 ISA 3.1 or later int vector signed char vstribr. t,a setbc r,26 vstribl. t,a setbc r,26 ISA 3.1 or later int vector unsigned short vstrihr. t,a setbc r,26 vstrihl. t,a setbc r,26 ISA 3.1 or later int vector signed short vstrihr. t,a setbc r,26 vstrihl. t,a setbc r,26 ISA 3.1 or later

Vector String Isolate Right-Justified r = vec_strir (a) Purpose: Copy a null-terminated string of elements from the input vector to the output vector, replacing all elements following the first zero element with zeros. Elements appear in the reverse of natural element order. Result value: Elements in a are copied, in the reverse of natural element order, to corresponding elements of r until the first zero element of a is encountered, or until all elements have been copied. If a zero element is encountered, all remaining elements of r are set to zero. Endian considerations: The element numbering within a register is left-to-right for big-endian targets, and right-to-left for little-endian targets. vstribr vec_strir vstribl vec_strir vstrihr vec_strir vstrihl vec_strir r a Example LE Implementation Example BE Implementation Restrictions vector unsigned char vector unsigned char vstribl r,a vstribr r,a ISA 3.1 or later vector signed char vector signed char vstribl r,a vstribr r,a ISA 3.1 or later vector unsigned short vector unsigned short vstrihl r,a vstrihr r,a ISA 3.1 or later vector signed short vector signed short vstrihl r,a vstrihr r,a ISA 3.1 or later

Vector String Isolate Right-Justified (Predicate) r = vec_strir_p (a) Purpose: Tests whether the input vector contains a zero element. Result value: r is given a non-zero value if any element in a has a zero value. Otherwise, r is set to zero. Endian considerations: Compilers should generate the same instruction (using the record form) that they generate for vec_strir. Notes: Use this built-in in preference to vec_cmpnez when the test guards a call to vec_strir. This allows compilers to generate the most efficient code. vstribr. vec_strir_p vstribl. vec_strir_p vstrihr. vec_strir_p vstrihl. vec_strir_p setbc vec_strir_p r a Example LE Implementation Example BE Implementation Restrictions int vector unsigned char vstribl. t,a setbc r,26 vstribr. t,a setbc r,26 ISA 3.1 or later int vector signed char vstribl. t,a setbc r,26 vstribr. t,a setbc r,26 ISA 3.1 or later int vector unsigned short vstrihl. t,a setbc r,26 vstrihr. t,a setbc r,26 ISA 3.1 or later int vector signed short vstrihl. t,a setbc r,26 vstrihr. t,a setbc r,26 ISA 3.1 or later

Vector Subtract r = vec_sub (a, b) Purpose: Returns a vector containing the result of subtracting each element of one source vector from the corresponding element of another source vector. Result value: The value of each element of r is the result of subtracting the value of the corresponding element of b from the value of the corresponding element of a. The arithmetic is modular for integer vectors. Endian considerations: None. vsububm vec_sub vsubuwm vec_sub vsubuqm vec_sub vsubudm vec_sub vsubuhm vec_sub xvsubdp vec_sub xvsubsp vec_sub r a b Example Implementation vector signed char vector signed char vector signed char vsububm r,a,b vector unsigned char vector unsigned char vector unsigned char vsububm r,a,b vector signed short vector signed short vector signed short vsubuhm r,a,b vector unsigned short vector unsigned short vector unsigned short vsubuhm r,a,b vector signed int vector signed int vector signed int vsubuwm r,a,b vector unsigned int vector unsigned int vector unsigned int vsubuwm r,a,b vector signed long long vector signed long long vector signed long long vsubudm r,a,b vector unsigned long long vector unsigned long long vector unsigned long long vsubudm r,a,b vector signed __int128 vector signed __int128 vector signed __int128 vsubuqm r,a,b vector unsigned __int128 vector unsigned __int128 vector unsigned __int128 vsubuqm r,a,b vector float vector float vector float xvsubsp r,a,b vector double vector double vector double xvsubdp r,a,b

Vector Subtract Carryout r = vec_subc (a, b) Purpose: Returns a vector wherein each element contains the carry produced by subtracting the corresponding elements of the two source vectors. Result value: The value of each element of r is the complement of the carry produced by subtracting the value of the corresponding element of b from the value of the corresponding element of a. The value is 0 if a borrow occurred, or 1 if no borrow occurred. Endian considerations: None. vsubcuw vec_subc vsubcuq vec_subc r a b Example Implementation vector signed int vector signed int vector signed int vsubcuw r,a,b vector unsigned int vector unsigned int vector unsigned int vsubcuw r,a,b vector signed __int128 vector signed __int128 vector signed __int128 vsubcuq r,a,b vector unsigned __int128 vector unsigned __int128 vector unsigned __int128 vsubcuq r,a,b

Vector Subtract Extended r = vec_sube (a, b, c) Purpose: Returns a vector containing the result of first elementwise subtracting one vector from another vector, and then elementwise adding a third carry vector. Elements of the carry vector have a value of 0 or 1. Result value: Let c' be a vector for which each element is 0 if the rightmost bit of the corresponding element of c is 0, and 1 otherwise. Then the value of each element of r is produced by subtracting the corresponding element of b from the corresponding element of a, and then adding the corresponding element of c'. Endian considerations: None. Notes: Code generated for this intrinsic should ensure only the low-order bit of c participates in the sum. vspltisw vec_sube vsubuwm vec_sube xxland vec_sube vsubeuqm vec_sube r a b c Example Implementation vector signed int vector signed int vector signed int vector signed int vspltisw t,1 vsubuwm u,a,b xxland v,c,t vsubuwm r,u,v vector unsigned int vector unsigned int vector unsigned int vector unsigned int vspltisw t,1 vsubuwm u,a,b xxland v,c,t vsubuwm r,u,v vector signed __int128 vector signed __int128 vector signed __int128 vector signed __int128 vsubeuqm r,a,b,c vector unsigned __int128 vector unsigned __int128 vector unsigned __int128 vector unsigned __int128 vsubeuqm r,a,b,c

Vector Subtract Extended Carryout r = vec_subec (a, b, c) Purpose: Returns a vector containing the carries produced by subtracting one vector from another, then adding a third vector to the difference. The third vector is a carry vector, with each element having a value of 0 or 1. Result value: The value of each element of r is the carry produced by subtracting the corresponding element of b from the corresponding element of a, and then adding the carry specified in the corresponding element of c (1 if there is a carry, 0 otherwise). Endian considerations: None. Notes: Code generated for this intrinsic should ensure only the low-order bit of c participates in the sum. vspltisw vec_subec xxland vec_subec vsubuwm vec_subec vsubcuw vec_subec xxlor vec_subec vsubecuq vec_subec r a b c Example Implementation vector signed int vector signed int vector signed int vector signed int vspltisw t,1 xxland u,c,t vsubuwm v,a,b vsubcuw w,a,b vsubcuw x,v,u xxlor r,w,x vector unsigned int vector unsigned int vector unsigned int vector unsigned int vspltisw t,1 xxland u,c,t vsubuwm v,a,b vsubcuw w,a,b vsubcuw x,v,u xxlor r,w,x vector signed __int128 vector signed __int128 vector signed __int128 vector signed __int128 vsubecuq r,a,b,c vector unsigned __int128 vector unsigned __int128 vector unsigned __int128 vector unsigned __int128 vsubecuq r,a,b,c

Vector Subtract Saturated r = vec_subs (a, b) Purpose: Returns a vector containing the saturated differences of each set of corresponding elements of the source vectors. Result value: The value of each element of r is the saturated result of subtracting the value of the corresponding element of b from the value of the corresponding element of a. Endian considerations: None. vsubsbs vec_subs vsububs vec_subs vsubsws vec_subs vsubuws vec_subs vsubshs vec_subs vsubuhs vec_subs r a b Example Implementation vector signed char vector signed char vector signed char vsubsbs r,a,b vector unsigned char vector unsigned char vector unsigned char vsububs r,a,b vector signed short vector signed short vector signed short vsubshs r,a,b vector unsigned short vector unsigned short vector unsigned short vsubuhs r,a,b vector signed int vector signed int vector signed int vsubsws r,a,b vector unsigned int vector unsigned int vector unsigned int vsubuws r,a,b

Vector Sum Across Half r = vec_sum2s (a, b) Purpose: Returns a vector containing the results of performing a sum-across operation within each doubleword of the first source vector together with accumulated results in the second source vector. Result value: Elements 0 and 2 of r are 0. Element 1 of r contains the saturated sum of elements 0 and 1 of a and element 1 of b. Element 3 of r contains the saturated sum of elements 2 and 3 of a and element 3 of b. An example follows: word index 0 1 2 3 a -2 (FFFFFFFE) -3 (FFFFFFFD) 7 (00000007) 15 (0000000F) b 31 (0000001F) -61 (FFFFFFC3) 121 (000000F0) 2147483647 (7FFFFFFF) (MAXINT) calculation 0 -2 + -3 + -61 0 7 + 15 + 2147483647 r 00000000 -66 (FFFFFFBE) 00000000 2147483647 (7FFFFFFF) (saturated) Endian considerations: The element numbering within a register is left-to-right for big-endian targets, and right-to-left for little-endian targets. vsldoi vec_sum2s vsum2sws vec_sum2s r a b Example LE Implementation Example BE Implementation vector signed int vector signed int vector signed int vsldoi t,b,b,12 vsum2sws u,a,t vsldoi r,u,u,4 vsum2sws r,a,b

Vector Sum Across Quarter r = vec_sum4s (a, b) Purpose: Returns a vector containing the results of performing a sum-across operation within each word of the first source vector together with accumulated results in the second source vector. Result value: There are two cases: a is a vector of signed or unsigned char. For each element n of the result vector, the value is obtained by adding elements 4n through 4n + 3 of a and element n of b using saturated addition. a is a vector of signed short. For each element n of the result vector, the value is obtained by adding elements 2n and 2n + 1 of a and element n of b using saturated addition. An example for input a of type vector unsigned char follows: word index 0 1 2 3 byte index 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 a 01 03 07 0F FF EE BB 66 11 22 44 88 00 00 00 01 sum across 0000001A 0000030E 000000FF 00000001 b 0000FF00 10203040 0000FFFF FFFFFFFF r 0000FF1A 1020334E 000100FE FFFFFFFF (saturated) An example for input a of type vector signed short follows: word index 0 1 2 3 halfword index 0 1 2 3 4 5 6 7 a FFFF FFFE 7FFF 7FFE 0124 4210 FFFE 0001 sum across FFFFFFFD 0000FFFD 00004334 FFFFFFFF b 00000003 12340000 7FFFFF00 FFFFFFFF r 00000000 1234FFFD 7FFFFFFF (saturated) FFFFFFFE Endian considerations: None. vsum4sbs vec_sum4s vsum4shs vec_sum4s vsum4ubs vec_sum4s r a b Example Implementation vector signed int vector signed char vector signed int vsum4sbs r,a,b vector unsigned int vector unsigned char vector unsigned int vsum4ubs r,a,b vector signed int vector signed short vector signed int vsum4shs r,a,b

Vector Sum Across r = vec_sums (a, b) Purpose: Returns a vector containing the results of performing a sum-across operation on the first source vector together with accumulated results in the second source vector. Result value: Elements 0, 1, and 2 of r are 0. Element 3 is the saturated sum of all the elements of a and element 3 of b. An example follows: word index 0 1 2 3 a 00000001 00000003 00000007 0000000F sum across 00000000 00000000 00000000 0000001A b ???????? (ignored) ???????? (ignored) ???????? (ignored) 87654321 r 00000000 00000000 00000000 8765433B Endian considerations: The element numbering within a register is left-to-right for big-endian targets, and right-to-left for little-endian targets. vspltw vec_sums vsumsws vec_sums vsldoi vec_sums r a b Example LE Implementation Example BE Implementation vector signed int vector signed int vector signed int vspltw t,b,0 vsumsws u,a,t vsldoi r,u,u,12 vsumsws r,a,b

Vector Ternary Logic r = vec_ternarylogic (a, b, c, d) Purpose: Perform one of 256 logical operations on three input vectors to produce the output vector. Result value: For each integer value i from 0 to 127, do the following. Let j be the value of the concatenation of the contents of bit i of a, b, and c. The value of bit j of the 8-bit value in d is placed into bit i of r. d must have a value between 0 and 255, inclusive. The effect of this operation is to perform one of 256 logical functions on the input arguments to produce the result. The full set of logical functions is documented with the xxeval instruction in the Power Instruction Set Architecture, Version 3.1B Specification (see ). Endian considerations: None. xxeval vec_ternarylogic r a b c d Example Implementation Restrictions vector unsigned char vector unsigned char vector unsigned char vector unsigned char const unsigned int xxeval r,a,b,c,d ISA 3.1 or later vector unsigned short vector unsigned short vector unsigned short vector unsigned short const unsigned int xxeval r,a,b,c,d ISA 3.1 or later vector unsigned int vector unsigned int vector unsigned int vector unsigned int const unsigned int xxeval r,a,b,c,d ISA 3.1 or later vector unsigned long long vector unsigned long long vector unsigned long long vector unsigned long long const unsigned int xxeval r,a,b,c,d ISA 3.1 or later vector unsigned __int128 vector unsigned __int128 vector unsigned __int128 vector unsigned __int128 const unsigned int xxeval r,a,b,c,d ISA 3.1 or later

Vector Test Data Class r = vec_test_data_class (a, b) Purpose: Determines the data class for each floating-point element. Result value: Each element of r is set to all ones if the corresponding element of a matches one of the possible data types selected by b. If not, the element is set to all zeros. b can select one of the following data classes, or more than one of them by ORing the constants together. Not a number (NaN) 64 Positive infinity 32 Negative infinity 16 Positive zero 8 Negative zero 4 Positive subnormal 2 Negative subnormal 1 For clarity of code, the following named constants are suggested. Preferably, compilers will provide these constants in a header file, but this is not required for compliance. #define __VEC_CLASS_FP_NAN (1<<6) #define __VEC_CLASS_FP_INFINITY_P (1<<5) #define __VEC_CLASS_FP_INFINITY_N (1<<4) #define __VEC_CLASS_FP_ZERO_P (1<<3) #define __VEC_CLASS_FP_ZERO_N (1<<2) #define __VEC_CLASS_FP_SUBNORMAL_P (1<<1) #define __VEC_CLASS_FP_SUBNORMAL_N (1<<0) #define __VEC_CLASS_FP_INFINITY (__VEC_CLASS_FP_INFINITY_P | __VEC_CLASS_FP_INFINITY_N) #define __VEC_CLASS_FP_ZERO (__VEC_CLASS_FP_ZERO_P | __VEC_CLASS_FP_ZERO_N) #define __VEC_CLASS_FP_SUBNORMAL (__VEC_CLASS_FP_SUBNORMAL_P | __VEC_CLASS_FP_SUBNORMAL_N) #define __VEC_CLASS_FP_NOT_NORMAL (__VEC_CLASS_FP_NAN | __VEC_CLASS_FP_SUBNORMAL | __VEC_CLASS_FP_ZERO | __VEC_CLASS_FP_INFINITY) Endian considerations: None. xvtstdcsp vec_test_data_class xvtstdcdp vec_test_data_class r a b Example Implementation Restrictions vector bool int vector float 7-bit unsigned literal xvtstdcsp r,a,b ISA 3.0 or later vector bool long long vector double 7-bit unsigned literal xvtstdcdp r,a,b ISA 3.0 or later

Vector Test Least-Significant Bit by Byte for All Ones r = vec_test_lsbb_all_ones (a) Purpose: Test whether the least-significant bit of all bytes of the input operand are equal to one. Result value: r is set to 1 if the least-significant bit of all bytes of a are equal to 1. Otherwise, r is set to 0. Endian considerations: None. Notes: In the example implementation, "mask" is an 8-bit mask where the only set bit identifies condition register field t, and "bit" identifies the first bit position in condition register field t. xvtlsbb vec_test_lsbb_all_ones setbc vec_test_lsbb_all_ones r a Example Implementation Restrictions int vector unsigned char xvtlsbb t,a setbc r,t.0 ISA 3.1 or later

Vector Test Least-Significant Bit by Byte for All Zeros r = vec_test_lsbb_all_zeros (a) Purpose: Test whether the least-significant bit of all bytes of the input operand are equal to zero. Result value: r is set to 1 if the least-significant bit of all bytes of a are equal to 0. Otherwise, r is set to 0. Endian considerations: None. Notes: In the example implementation, "mask" is an 8-bit mask where the only set bit identifies condition register field t, and "bit" identifies the third bit position in condition register field t. xvtlsbb vec_test_lsbb_all_zeros setbc vec_test_lsbb_all_zeros r a Example Implementation Restrictions int vector unsigned char xvtlsbb t,a setbc r,t.2 ISA 3.1 or later

Vector Truncate r = vec_trunc (a) Purpose: Returns a vector containing the truncated values of the corresponding elements of the source vector. Result value: Each element of r contains the value of the corresponding element of a, truncated to an integral value. Endian considerations: None. xvrdpiz vec_trunc xvrspiz vec_trunc r a Example Implementation vector float vector float xvrspiz r,a vector double vector double xvrdpiz r,a

Vector Unpack High r = vec_unpackh (a) Purpose: Unpacks the most-significant (“high”) half of a vector into a vector with larger elements. Result value: If a is an integer vector, the value of each element of r is the value of the corresponding element of the most-significant half of a. An example for input a of type vector signed int follows: doubleword index 0 1 word index 0 1 2 3 r 10111213 24252627 ???????? ???????? a 0000000010111213 0000000024252627 If a is a floating-point vector, the value of each element of r is the value of the corresponding element of the most-significant half of a, widened to the result precision. An example for input a of type vector float follows: doubleword index 0 1 word index 0 1 2 3 r -2.71828182 3.14159265 ???????? ???????? a -2.71828182 3.14159265 If a is a pixel vector, the value of each element of r is taken from the corresponding element of the most-significant half of a as follows: All bits in the first byte of the element of r are set to the value of the first bit of the element of a. The least-significant 5 bits of the second byte of the element of r are set to the value of the next 5 bits in the element of a. The least-significant 5 bits of the third byte of the element of r are set to the value of the next 5 bits in the element of a. The least-significant 5 bits of the fourth byte of the element of r are set to the value of the next 5 bits in the element of a. An example follows: word index 0 1 2 3 halfword index 0 1 2 3 4 5 6 7 a 1234 2567 489A 8BCD ???? ???? ???? ???? unpack halfwords to words 1234 2567 489A 8BCD as bits 0001001000110100 0010010101100111 0100100010011010 1000101111001101 as 1-5-5-5 0 00100 10001 10100 0 01001 01011 00111 0 10010 00100 11010 1 00010 11110 01101 r 00041114 00090B07 0012041A FF021E0D Endian considerations: The "high" half of a vector with n elements is the first n/2 elements of the vector. For little endian, these elements are in the rightmost half of the vector. For big endian, these elements are in the leftmost half of the vector. vupklsh vec_unpackh vupkhsh vec_unpackh vupklpx vec_unpackh vupkhpx vec_unpackh vupklsw vec_unpackh vupkhsw vec_unpackh vupklsb vec_unpackh vupkhsb vec_unpackh xxsldwi vec_unpackh xvcvspdp vec_unpackh r a Example LE Implementation Example BE Implementation vector bool short vector bool char vupklsb r,a vupkhsb r,a vector signed short vector signed char vupklsb r,a vupkhsb r,a vector bool int vector bool short vupklsh r,a vupkhsh r,a vector signed int vector signed short vupklsh r,a vupkhsh r,a vector unsigned int vector pixel vupklpx r,a vupkhpx r,a vector bool long long vector bool int vupklsw r,a vupkhsw r,a vector signed long long vector signed int vupklsw r,a vupkhsw r,a vector double vector float xxsldwi t,a,a,3 xxsldwi u,a,t,2 xvcvspdp r,u xxsldwi t,a,a,1 xxsldwi u,t,a,3 xvcvspdp r,u

Vector Unpack Low r = vec_unpackl (a) Purpose: Unpacks the least-significant (“low”) half of a vector into a vector with larger elements. Result value: If a is an integer vector, the value of each element of r is the value of the corresponding element of the least-significant half of a. An example for input a of type vector signed int follows: doubleword index 0 1 word index 0 1 2 3 r ???????? ???????? 38393A3B 4C4D4E4F a 0000000038393A3B 000000004C4D4E4F If a is a floating-point vector, the value of each element of r is the value of the corresponding element of the least-significant half of a, widened to the result precision. An example for input a of type vector float follows: doubleword index 0 1 word index 0 1 2 3 r ???????? ???????? 6.0221409e+23 1.61803398875 a 6.0221409e+23 1.61803398875 If a is a pixel vector, the value of each element of r is taken from the corresponding element of the least-significant half of a as follows: All bits in the first byte of the element of r are set to the value of the first bit of the element of a. The least-significant 5 bits of the second byte of the element of r are set to the value of the next 5 bits in the element of a. The least-significant 5 bits of the third byte of the element of r are set to the value of the next 5 bits in the element of a. The least-significant 5 bits of the fourth byte of the element of r are set to the value of the next 5 bits in the element of a. An example follows: word index 0 1 2 3 halfword index 0 1 2 3 4 5 6 7 a ???? ???? ???? ???? DCB8 A984 7652 4321 unpack halfwords to words DCB8 A984 7652 4321 as bits 1101110010111000 1010100110000100 0111011001010010 0100001100100001 as 1-5-5-5 1 10111 00101 11000 1 01010 01100 00100 0 11101 10010 10010 0 10000 11001 00001 r FF170518 FF0A0C04 001D1212 00101901 Endian considerations: The "high" half of a vector with n elements is the first n/2 elements of the vector. For little endian, these elements are in the rightmost half of the vector. For big endian, these elements are in the leftmost half of the vector. vupkhsh vec_unpackl vupklsh vec_unpackl vupkhpx vec_unpackl vupklpx vec_unpackl vupkhsw vec_unpackl vupklsw vec_unpackl vupkhsb vec_unpackl vupklsb vec_unpackl xxsldwi vec_unpackl xvcvspdp vec_unpackl r a Example LE Implementation Example BE Implementation vector bool short vector bool char vupkhsb r,a vupklsb r,a vector signed short vector signed char vupkhsb r,a vupklsb r,a vector bool int vector bool short vupkhsh r,a vupklsh r,a vector signed int vector signed short vupkhsh r,a vupklsh r,a vector unsigned int vector pixel vupkhpx r,a vupklpx r,a vector bool long long vector bool int vupkhsw r,a vupklsw r,a vector signed long long vector signed int vupkhsw r,a vupklsw r,a vector double vector float xxsldwi t,a,a,1 xxsldwi u,t,a,3 xvcvspdp r,u xxsldwi t,a,a,3 xxsldwi u,a,t,2 xvcvspdp r,u

Vector Convert Floating-Point to Unsigned Integer r = vec_unsigned (a) Purpose: Converts a vector of floating-point numbers to a vector of unsigned integers. Result value: Each element of r is obtained by truncating the corresponding element of a to an unsigned integer. The current floating-point rounding mode is ignored. Endian considerations: None. xvcvspsxws vec_unsigned xvcvdpsxds vec_unsigned r a Example Implementation vector unsigned int vector float xvcvspsxws r,a vector unsigned long long vector double xvcvdpsxds r,a

Vector Convert Double-Precision to Unsigned Word r = vec_unsigned2 (a, b) Purpose: Converts two vectors of double-precision floating-point numbers to a vector of unsigned 32-bit integers. Result value: Let v be the concatenation of a and b. Each element of r is obtained by truncating the corresponding element of v to an unsigned 32-bit integer. The current floating-point rounding mode is ignored. Endian considerations: The element numbering within a register is left-to-right for big-endian targets, and right-to-left for little-endian targets. xxpermdi vec_unsigned2 xvcvdpuxws vec_unsigned2 vmrgow vec_unsigned2 vmrgew vec_unsigned2 r a b Example LE Implementation Example BE Implementation vector unsigned int vector double vector double xxpermdi t,b,a,3 xxpermdi u,b,a,0 xvcvdpuxws v,t xvcvdpuxws w,u vmrgow r,w,v xxpermdi t,a,b,3 xxpermdi u,a,b,0 xvcvdpuxws v,t xvcvdpuxws w,u vmrgew r,v,w

Vector Convert Double-Precision to Unsigned Word Even r = vec_unsignede (a) Purpose: Converts elements of the source vector to unsigned integers and stores them in the even-numbered elements of the result vector. Result value: Element 0 of r contains element 0 of a, truncated to an unsigned integer. Element 2 of r contains element 1 of a, truncated to a signed integer. Elements 1 and 3 of r are undefined. Truncation of a negative number to an unsigned integer results in a value of zero. An example follows: doubleword index 0 1 word index 0 1 2 3 a 1.7 -1.0 r 00000001 ???????? (undefined) 00000000 (truncation of a negative number to unsigned is 0) ???????? (undefined) Endian considerations: The element numbering within a register is left-to-right for big-endian targets, and right-to-left for little-endian targets. xvcvdpuxws vec_unsignede vsldoi vec_unsignede r a Example LE Implementation Example BE Implementation vector unsigned int vector double xvcvdpuxws t,a vsldoi r,t,t,12 xvcvdpuxws r,a

Vector Convert Double-Precision to Unsigned Word Odd r = vec_unsignedo (a) Purpose: Converts elements of the source vector to unsigned integers and stores them in the odd-numbered elements of the result vector. Result value: Element 1 of r contains element 0 of a, truncated to an unsigned integer. Element 3 of r contains element 1 of a, truncated to an unsigned integer. Elements 0 and 2 of r are undefined. Truncation of a negative number to an unsigned integer results in a value of zero. An example follows: doubleword index 0 1 word index 0 1 2 3 a 1.7 -1.0 r ???????? (undefined) 00000001 ???????? (undefined) 00000000 (truncation of a negative number to unsigned is 0) Endian considerations: The element numbering within a register is left-to-right for big-endian targets, and right-to-left for little-endian targets. xvcvdpuxws vec_unsignedo vsldoi vec_unsignedo r a Example LE Implementation Example BE Implementation vector unsigned int vector double xvcvdpuxws r,a xvcvdpuxws t,a vsldoi r,t,t,12

VSX Unaligned Load r = vec_xl (a, b) Purpose: Loads a 16-byte vector from the memory address specified by the displacement and the pointer. Result value: The value of r is obtained by adding a and b, then loading the 16-byte vector from the resultant memory address. Endian considerations: For ISA 2.07, there is no bi-endian unaligned load instruction. For little-endian targets, it is necessary to use the lxvd2x instruction and swap the doublewords with an xxswapd instruction. For big-endian targets, the lxvd2x instruction or lxvw4x instruction suffices. The examples below assume ISA 3.0, where the bi-endian lxv instruction is available. Notes: For languages that support built-in methods for pointer dereferencing, such as the C/C++ * and [ ] operators, use of the native operators is encouraged when the memory to be accessed is aligned on a 32-bit boundary or aligned to the type of b, whichever is weaker. GCC provides a commonly used synonym for vec_xl called vec_vsx_ld. Although these have the same behavior, only vec_xl is guaranteed to be portable across compliant compilers. Therefore vec_xl is preferred. lxv vec_xl r a b Example ISA 3.0 Implementation vector signed char signed long const signed char * lxv r,a(b) vector unsigned char signed long const unsigned char * lxv r,a(b) vector signed short signed long const signed short * lxv r,a(b) vector unsigned short signed long const unsigned short * lxv r,a(b) vector signed int signed long const signed int * lxv r,a(b) vector unsigned int signed long const unsigned int * lxv r,a(b) vector signed signed long long signed long const signed long long * lxv r,a(b) vector unsigned long long signed long const unsigned long long * lxv r,a(b) vector signed __int128 signed long const signed __int128 * lxv r,a(b) vector unsigned __int128 signed long const unsigned __int128 * lxv r,a(b) vector float signed long const float * lxv r,a(b) vector double signed long const double * lxv r,a(b)

VSX Unaligned Load as Big Endian r = vec_xl_be (a, b) Purpose: Loads a vector from an address into a register in big-endian element order, regardless of the endianness of the target machine. Result value: The value of r is obtained by adding a and b, then loading the vector elements from the resulting address in big-endian order. Endian considerations: In big-endian mode, this acts just like the vec_xl intrinsic. In little-endian mode, the highest-numbered element of r is loaded from the lowest data address, and the lowest-numbered element of r from the highest data address. lxvb16x vec_xl_be lxv vec_xl_be lxvw4x vec_xl_be lxvd2x vec_xl_be lxvh8x vec_xl_be r a b Example ISA 3.0 LE Implementation Example ISA 3.0 BE Implementation vector signed char signed long const signed char * lxvb16x r,a,b lxv r,a,b vector unsigned char signed long const unsigned char * lxvb16x r,a,b lxv r,a,b vector signed short signed long const signed short * lxvh8x r,a,b lxv r,a,b vector unsigned short signed long const unsigned short * lxvh8x r,a,b lxv r,a,b vector signed int signed long const signed int * lxvw4x r,a,b lxv r,a,b vector unsigned int signed long const unsigned int * lxvw4x r,a,b lxv r,a,b vector signed long long signed long const signed long long * lxvd2x r,a,b lxv r,a,b vector unsigned long long signed long const unsigned long long * lxvd2x r,a,b lxv r,a,b vector signed __int128 signed long const signed __int128 * lxv r,a,b lxv r,a,b vector unsigned __int128 signed long const unsigned __int128 * lxv r,a,b lxv r,a,b vector float signed long const float * lxvw4x r,a,b lxv r,a,b vector double signed long const double * lxvd2x r,a,b lxv r,a,b

Vector Load with Length r = vec_xl_len (a, b) Purpose: Loads a vector of a specified byte length. Result value: Loads the number of bytes specified by b from the address specified in a. Initializes elements in order from the byte stream (as defined by the endianness of the target). Any bytes of elements that cannot be initialized from the number of loaded bytes have a zero value. Between 0 and 16 bytes, inclusive, will be loaded. The length is specified by the least-significant byte of b, as min (b mod 256, 16). The behavior is undefined if the length argument is outside of the range 0–255, or if it is not a multiple of the vector element size. Endian considerations: None. Notes: vec_xl_len should not be used to load from cache-inhibited memory. sldi vec_xl_len lxvl vec_xl_len r a b Example Implementation Restrictions vector signed char const signed char * size_t sldi t,b,56 lxvl r,a,t ISA 3.0 or later vector unsigned char const unsigned char * size_t sldi t,b,56 lxvl r,a,t ISA 3.0 or later vector signed short const signed short * size_t sldi t,b,56 lxvl r,a,t ISA 3.0 or later vector unsigned short const unsigned short * size_t sldi t,b,56 lxvl r,a,t ISA 3.0 or later vector signed int const signed int * size_t sldi t,b,56 lxvl r,a,t ISA 3.0 or later vector unsigned int const unsigned int * size_t sldi t,b,56 lxvl r,a,t ISA 3.0 or later vector signed long long const signed long long * size_t sldi t,b,56 lxvl r,a,t ISA 3.0 or later vector unsigned long long const unsigned long long * size_t sldi t,b,56 lxvl r,a,t ISA 3.0 or later vector signed __int128 const signed __int128 * size_t sldi t,b,56 lxvl r,a,t ISA 3.0 or later vector unsigned __int128 const unsigned __int128 * size_t sldi t,b,56 lxvl r,a,t ISA 3.0 or later vector float const float * size_t sldi t,b,56 lxvl r,a,t ISA 3.0 or later vector double const double * size_t sldi t,b,56 lxvl r,a,t ISA 3.0 or later

Vector Load with Length Right-Justified r = vec_xl_len_r (a, b) Purpose: Loads a vector of a specified byte length, right-justified. Result value: Loads the number of bytes specified by b from the address specified in a, right justified in r. Initializes elements in order from the byte stream (as defined by the endianness of the target). Any bytes of elements that cannot be initialized from the number of loaded bytes have a zero value. Between 0 and 16 bytes, inclusive, will be loaded. The length is specified by the least-significant byte of b, as min (b mod 256, 16). The behavior is undefined if the length argument is outside of the range 0–255. Endian considerations: None. Notes: vec_xl_len_r should not be used to load from cache-inhibited memory. sldi vec_xl_len_r lvsl vec_xl_len_r lxvll vec_xl_len_r vperm vec_xl_len_r r a b Example Implementation Restrictions vector unsigned char const unsigned char * size_t sldi t,b,56 lvsl u,0,b lxvll v,a,t vperm r,v,v,u ISA 3.0 or later

Load VSX Vector Element and Sign Extend r = vec_xl_sext (a, b) Purpose: Load a single element into a vector register and sign extend it to a 128-bit integer. Result value: Let x be the address formed by adding a and b. Then r is set to the value of the element loaded from address x and sign-extended to 128 bits. The type of the loaded element is specified by the pointer type of argument b. Endian considerations: None. lxvrbx vec_xl_sext lxvrhx vec_xl_sext lxvrwx vec_xl_sext lxvrdx vec_xl_sext vextsb2d vec_xl_sext vextsh2d vec_xl_sext vextsw2d vec_xl_sext vextsd2q vec_xl_sext r a b Example Implementation Restrictions vector signed __int128 signed long signed char * lxvrbx t,b,a vextsb2d u,t vextsd2q r,u ISA 3.1 or later vector signed __int128 signed long signed short * lxvrhx t,b,a vextsh2d u,t vextsd2q r,u ISA 3.1 or later vector signed __int128 signed long signed int * lxvrwx t,b,a vextsw2d u,t vextsd2q r,u ISA 3.1 or later vector signed __int128 signed long signed long long * lxvrdx t,b,a vextsd2q r,t ISA 3.1 or later

Load VSX Vector Element and Zero Extend r = vec_xl_zext (a, b) Purpose: Load a single element into a vector register and zero-extend it to a 128-bit unsigned integer. Result value: Let x be the address formed by adding a and b. Then r is set to the value of the element loaded from address x and zero-extended to 128 bits. The type of the loaded element is specified by the pointer type of argument b. Endian considerations: None. lxvrbx vec_xl_zext lxvrhx vec_xl_zext lxvrwx vec_xl_zext lxvrdx vec_xl_zext r a b Example Implementation Restrictions vector unsigned __int128 signed long unsigned char * lxvrbx r,b,a ISA 3.1 or later vector unsigned __int128 signed long unsigned short * lxvrhx r,b,a ISA 3.1 or later vector unsigned __int128 signed long unsigned int * lxvrwx r,b,a ISA 3.1 or later vector unsigned __int128 signed long unsigned long long * lxvrdx r,b,a ISA 3.1 or later

Vector Exclusive OR r = vec_xor (a, b) Purpose: Performs a bitwise XOR of two vectors. Result value: v is the bitwise exclusive OR of a and b. Endian considerations: None. xxlxor vec_xor r a b Example Implementation vector bool char vector bool char vector bool char xxlxor r,a,b vector signed char vector signed char vector signed char xxlxor r,a,b vector unsigned char vector unsigned char vector unsigned char xxlxor r,a,b vector bool short vector bool short vector bool short xxlxor r,a,b vector signed short vector signed short vector signed short xxlxor r,a,b vector unsigned short vector unsigned short vector unsigned short xxlxor r,a,b vector bool int vector bool int vector bool int xxlxor r,a,b vector signed int vector signed int vector signed int xxlxor r,a,b vector unsigned int vector unsigned int vector unsigned int xxlxor r,a,b vector bool long long vector bool long long vector bool long long xxlxor r,a,b vector signed long long vector signed long long vector signed long long xxlxor r,a,b vector unsigned long long vector unsigned long long vector unsigned long long xxlxor r,a,b vector float vector float vector float xxlxor r,a,b vector double vector double vector double xxlxor r,a,b

VSX Unaligned Store vec_xst (a, b, c) Purpose: Stores a 16-byte value into memory at the address specified by the displacement and pointer. Operation: The values of b and c are added, and the value of a is stored to the resultant address. Endian considerations: For ISA 2.07, there is no bi-endian unaligned store instruction. For little-endian targets, it is necessary to first swap the doublewords of the value to be stored using an xxswapd instruction, and then store the result using the stxvd2x instruction. For big-endian targets, the stxvd2x or stxvw4x instruction suffices. The examples below assume ISA 3.0, where the bi-endian stxv instruction is available. Notes: For languages that support built-in methods for pointer dereferencing, such as the C/C++ * and [ ] operators, use of the native operators is encouraged when the memory to be accessed is aligned on a 32-bit boundary or aligned to the type of b, whichever is weaker. GCC provides a commonly used synonym for vec_xst called vec_vsx_st. Although these have the same behavior, only vec_xst is guaranteed to be portable across compliant compilers. Therefore vec_xst is preferred. stxv vec_xst a b c Example ISA 3.0 Implementation vector signed char signed long signed char * stxv a,b(c) vector unsigned char signed long unsigned char * stxv a,b(c) vector signed short signed long signed short * stxv a,b(c) vector unsigned short signed long unsigned short * stxv a,b(c) vector signed int signed long signed int * stxv a,b(c) vector unsigned int signed long unsigned int * stxv a,b(c) vector signed long long signed long signed long long * stxv a,b(c) vector unsigned long long signed long unsigned long long * stxv a,b(c) vector signed __int128 signed long signed __int128 * stxv a,b(c) vector unsigned __int128 signed long unsigned __int128 * stxv a,b(c) vector float signed long float * stxv a,b(c) vector double signed long double * stxv a,b(c)

VSX Unaligned Store as Big Endian vec_xst_be (a, b, c) Purpose: Stores a vector to an address using big-endian element order, regardless of the endianness of the target machine. Result value: The values of b and c are added, and the value of a is stored to the resultant address using big-endian element order. Endian considerations: In big-endian mode, this acts just like the vec_xst intrinsic. In little-endian mode, the lowest data address receives the highest-numbered element of a, and the highest data address receives the lowest-numbered element of a. stxvb16x vec_xst_be stxv vec_xst_be stxvw4x vec_xst_be stxvd2x vec_xst_be stxvh8x vec_xst_be a b c Example ISA 3.0 LE Implementation Example ISA 3.0 BE Implementation vector signed char signed long signed char * stxvb16x a,b,c stxv a,b,c vector unsigned char signed long unsigned char * stxvb16x a,b,c stxv a,b,c vector signed short signed long signed short * stxvh8x a,b,c stxv a,b,c vector unsigned short signed long unsigned short * stxvh8x a,b,c stxv a,b,c vector signed int signed long signed int * stxvw4x a,b,c stxv a,b,c vector unsigned int signed long unsigned int * stxvw4x a,b,c stxv a,b,c vector signed long long signed long signed long long * stxvd2x a,b,c stxv a,b,c vector unsigned long long signed long unsigned long long * stxvd2x a,b,c stxv a,b,c vector signed __int128 signed long signed __int128 * stxv a,b,c stxv a,b,c vector unsigned __int128 signed long unsigned __int128 * stxv a,b,c stxv a,b,c vector float signed long float * stxvw4x a,b,c stxv a,b,c vector double signed long double * stxvd2x a,b,c stxv a,b,c

Vector Store with Length vec_xst_len (a, b, c) Purpose: Stores a vector of a specified byte length. Operation: Stores the number of bytes specified by c of the vector a to the address specified in b. The bytes are obtained starting from the lowest-numbered byte of the lowest-numbered element (as defined by the endianness of the target). All bytes of an element are accessed before proceeding to the next higher element. Between 0 and 16 bytes, inclusive, will be stored. The length is specified by the least-significant byte of c, as min (c mod 256, 16). The behavior is undefined if the length argument is outside of the range 0–255, or if it is not a multiple of the vector element size. Endian considerations: None. Notes: vec_xst_len should not be used to store to cache-inhibited memory. sldi vec_xst_len stxvl vec_xst_len a b c Example Implementation Restrictions vector signed char signed char * size_t sldi t,c,56 stxvl a,b,t ISA 3.0 or later vector unsigned char unsigned char * size_t sldi t,c,56 stxvl a,b,t ISA 3.0 or later vector signed short signed short * size_t sldi t,c,56 stxvl a,b,t ISA 3.0 or later vector unsigned short unsigned short * size_t sldi t,c,56 stxvl a,b,t ISA 3.0 or later vector signed int signed int * size_t sldi t,c,56 stxvl a,b,t ISA 3.0 or later vector unsigned int unsigned int * size_t sldi t,c,56 stxvl a,b,t ISA 3.0 or later vector signed long long signed long long * size_t sldi t,c,56 stxvl a,b,t ISA 3.0 or later vector unsigned long long unsigned long long * size_t sldi t,c,56 stxvl a,b,t ISA 3.0 or later vector signed __int128 signed __int128 * size_t sldi t,c,56 stxvl a,b,t ISA 3.0 or later vector unsigned __int128 unsigned __int128 * size_t sldi t,c,56 stxvl a,b,t ISA 3.0 or later vector float float * size_t sldi t,c,56 stxvl a,b,t ISA 3.0 or later vector double double * size_t sldi t,c,56 stxvl a,b,t ISA 3.0 or later

Vector Store with Length Right-Justified vec_xst_len_r (a, b, c) Purpose: Stores a right-justified vector of a specified byte length. Operation: Stores the number of bytes specified by c of the right-justified vector a to the address specified by b. Between 0 and 16 bytes, inclusive, will be stored. The length is specified by the least-significant byte of c, as min (b mod 256, 16). The behavior is undefined if the length argument is outside of the range 0–255. Endian considerations: None. Notes: vec_xst_len_r should not be used to store to cache-inhibited memory. lvsr vec_xst_len_r sldi vec_xst_len_r vperm vec_xst_len_r stxvll vec_xst_len_r a b c Example Implementation Restrictions vector unsigned char unsigned char * size_t lvsr t,0,c sldi u,c,56 vperm v,a,a,t stxvll v,b,u ISA 3.0 or later

Truncate and Store from VSX Vector vec_xst_trunc (a, b, c) Purpose: Truncate the value in a vector register and store it. Operation: The rightmost element of a (using the element type specified by the pointer type of c) is stored to the address formed by adding b and c. Endian considerations: None. stxvrbx vec_xst_trunc stxvrhx vec_xst_trunc stxvrwx vec_xst_trunc stxvrdx vec_xst_trunc a b c Example Implementation Restrictions vector signed __int128 signed long signed char * stxvrbx a,c,b ISA 3.1 or later vector unsigned __int128 signed long unsigned char * stxvrbx a,c,b ISA 3.1 or later vector signed __int128 signed long signed short * stxvrhx a,c,b ISA 3.1 or later vector unsigned __int128 signed long unsigned short * stxvrhx a,c,b ISA 3.1 or later vector signed __int128 signed long signed int * stxvrwx a,c,b ISA 3.1 or later vector unsigned __int128 signed long unsigned int * stxvrwx a,c,b ISA 3.1 or later vector signed __int128 signed long signed long long * stxvrdx a,c,b ISA 3.1 or later vector unsigned __int128 signed long unsigned long long * stxvrdx a,c,b ISA 3.1 or later

shows the correspondence between the C/C++ types described in this document and their Fortran equivalents. In Fortran, the Boolean vector data types are represented by VECTOR(UNSIGNED(n)). XL Fortran Vector Type XL C/C++ Vector Type VECTOR(INTEGER(1)) vector signed char VECTOR(INTEGER(2)) vector signed short VECTOR(INTEGER(4)) vector signed int VECTOR(INTEGER(8)) vector signed long long, vector signed long The vector long types are deprecated due to their ambiguity between 32-bit and 64-bit environments. The use of the vector long long types is preferred. VECTOR(INTEGER(16)) vector signed __int128 VECTOR(UNSIGNED(1)) vector unsigned char VECTOR(UNSIGNED(2)) vector unsigned short VECTOR(UNSIGNED(4)) vector unsigned int VECTOR(UNSIGNED(8)) vector unsigned long long, vector unsigned long VECTOR(UNSIGNED(16)) vector unsigned __int128 VECTOR(REAL(4)) vector float VECTOR(REAL(8)) vector double VECTOR(PIXEL) vector pixel Because the Fortran language does not support pointers, vector built-in functions that expect pointers to a base type take an array element reference to indicate the address of a memory location that is the subject of a memory access built-in function. Because the Fortran language does not support type casts, the vec_convert and vec_concat built-in functions described in the following pages are provided to perform bit-exact type conversions between vector types.

Vector Concatenate r = vec_concat (a, b) Purpose: Concatenates two elements to form a vector. Result value: The resulting vector consists of the two scalar elements, a and b, assigned to elements 0 and 1 in natural element order, respectively. Endian considerations: None. r a b vector signed long long signed long long signed long long vector unsigned long long unsigned long long unsigned long long vector double double double

Vector Convert r = vec_convert (a, b) Purpose: Converts a vector to a vector of a different type by reinterpreting the bits of the vector. Result value: In what follows, a and b must be INTENT(IN) vectors. If b is a variable, it need not be defined. The result r has the value of a interpreted as the type of b. Endian considerations: None.