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<?xml version="1.0" encoding="UTF-8"?> |
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<!-- |
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Copyright (c) 2017 OpenPOWER Foundation |
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Licensed under the Apache License, Version 2.0 (the "License"); |
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you may not use this file except in compliance with the License. |
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You may obtain a copy of the License at |
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http://www.apache.org/licenses/LICENSE-2.0 |
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Unless required by applicable law or agreed to in writing, software |
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distributed under the License is distributed on an "AS IS" BASIS, |
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WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. |
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See the License for the specific language governing permissions and |
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limitations under the License. |
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--> |
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<section xmlns="http://docbook.org/ns/docbook" |
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xmlns:xi="http://www.w3.org/2001/XInclude" |
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xmlns:xlink="http://www.w3.org/1999/xlink" |
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version="5.0" |
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xml:id="sec_performance_mmx"> |
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<title>Using MMX intrinsics</title> |
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<para>MMX was the first and oldest SIMD extension and initially filled a |
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need for wider (64-bit) integer and additional registers. This is back when |
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processors were 32-bit and 8 x 32-bit registers was starting to cramp our |
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programming style. Now 64-bit processors, larger register sets, and 128-bit (or |
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larger) vector SIMD extensions are common. There is simply no good reason to |
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write new code using the (now) very limited MMX capabilities. </para> |
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<para>We recommend that existing MMX codes be rewritten to use the newer |
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SSE and VMX/VSX intrinsics or using the more portable GCC builtin vector |
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support or in the case of si64 operations use C scalar code. The MMX si64 |
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scalars are just (64-bit) operations on long long int types and any |
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modern C compiler can handle this type. The char / short in SIMD operations |
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should all be promoted to 128-bit SIMD operations on GCC builtin vectors. Both |
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will improve cross platform portability and performance.</para> |
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</section> |
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