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357 lines
7.2 KiB
ArmAsm
357 lines
7.2 KiB
ArmAsm
2 years ago
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# © IBM Corp. 2022
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# Licensed under and subject to the terms of the CC-BY 4.0
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# license (https://creativecommons.org/licenses/by/4.0/legalcode).
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# Additional rights, including the right to physically implement a softcore
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# that is compliant with the required sections of the Power ISA
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# Specification, will be available at no cost via the OpenPOWER Foundation.
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# This README will be updated with additional information when OpenPOWER's
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# license is available.
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# boot kernel
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# resets to 32BE
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# set up translations for starting bios (inc. BE/LE)
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# copy modifiable rom data to ram - or do in bios?
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# set up msr for running bios (inc. 32/64)
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# jump to bios
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.include "defines.s"
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.macro load32 rx,v
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li \rx,0
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oris \rx,\rx,\v>>16
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ori \rx,\rx,\v&0x0000FFFF
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.endm
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.macro load16swiz rx,v
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li \rx,0
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ori \rx,\rx,(\v<<8)&0xFF00
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ori \rx,\rx,(\v>>8)&0x00FF
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.endm
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# constants from linker script, or defsym
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.ifdef BIOS_32
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# sup MSR cm=1 ce=1 ee=1 pr=0 fp=1 me=1 fe=00 de=0 is=0 ds=0
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.set BIOS_MSR,0x0002B000
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.else
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# sup MSR cm=1 ce=1 ee=1 pr=0 fp=1 me=1 fe=00 de=0 is=0 ds=0
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.set BIOS_MSR,0x8002B000
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.endif
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# erat w2 (test) # word 2 wlc=40:41 rsvd=42 u=44:47 r=48 c=49 wimge=52:56 vf=57 ux/sx=58:59 uw/sw=60:61 ur/sr=62:63
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.ifdef BIOS_LE
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.set BIOS_ERATW2,0x000000BF
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.else
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.set BIOS_ERATW2,0x0000003F
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.endif
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# bios might be able to use one stack during thread startup if careful
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.ifndef BIOS_STACK_0
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.set BIOS_STACK_0,_stack_0
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.endif
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.ifndef BIOS_STACK_1
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.set BIOS_STACK_1,_stack_1
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.endif
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.ifndef BIOS_START
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.set BIOS_START,0x00010000
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.endif
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.section .text
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.global _start
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.org 0x000
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_start:
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int_000:
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b boot_start
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.ifdef TST_END
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b tst_end
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.endif
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# critical input
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.org 0x020
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int_020:
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.ifdef INT_UNHANDLED
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b int_unhandled
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.else
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b .
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.endif
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# debug
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.org 0x040
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int_040:
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b .
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# dsi
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.org 0x060
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int_060:
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b .
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# isi
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.org 0x080
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int_080:
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b .
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# external
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.org 0x0A0
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int_0A0:
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b .
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# alignment
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.org 0x0C0
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int_0C0:
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b .
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# program
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.org 0x0E0
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int_0E0:
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b .
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# fp unavailable
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.org 0x100
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int_100:
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b .
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# sc
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.org 0x120
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int_120:
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.ifdef INT_SC
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# lev is in 20:26, but supposed to use scv now
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li r3,0
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mfsrr0 r4
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b int_sc
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.else
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.ifdef INT_UNHANDLED
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b int_unhandled
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.else
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b .
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.endif
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.endif
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# apu unavailable
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.org 0x140
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int_140:
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b .
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# decrementer
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.org 0x160
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int_160:
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b .
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# fit
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.org 0x180
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int_180:
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b .
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# watchdog
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.org 0x1A0
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int_1A0:
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b .
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# dtlb
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.org 0x1C0
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int_1C0:
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b .
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# itlb
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.org 0x1E0
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int_1E0:
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b .
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# vector unavailable
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.org 0x200
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int_200:
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b .
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#
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.org 0x220
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int_220:
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b .
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#
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.org 0x240
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int_240:
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b .
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#
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.org 0x260
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int_260:
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b .
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# doorbell
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.org 0x280
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int_280:
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b .
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# doorbell critical
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.org 0x2A0
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int_2A0:
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b .
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# doorbell guest
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.org 0x2C0
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int_2C0:
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b .
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# doorbell guest critical
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.org 0x2E0
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int_2E0:
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b .
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# hvsc
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.org 0x300
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int_300:
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b .
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# hvpriv
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.org 0x320
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int_320:
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b .
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# lrat
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.org 0x340
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int_340:
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b .
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# ------------------------------------------------------------------------------------------------------------------------------
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# initial translation
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# both erats:
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# 00000000 64K: (rom, BE)
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# 00010000 64K: (ram, BE or LE)
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#
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.org 0x400
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boot_start:
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mfspr r5,tir # who am i?
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cmpdi r5,0x00 # skip unless T0
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bne init_t123
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lis r3,0x8C00 # 32=ecl 36:37=tlbsel (10=i, 11=d)
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# derat 31 @00000000
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li r0,0x001F # entry #31
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li r2,0x0015 # word 2 wlc=40:41 rsvd=42 u=44:47 r=48 c=49 wimge=52:56 vf=57 ux/sx=58:59 uw/sw=60:61 ur/sr=62:63
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li r4,0 # word 1 rpn(32:51)=32:51 rpn(22:31)=54:63
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li r8,0x023F # word 0 epn=32:51 class=52:53 v=54 x=55 size=56:59 thrd=60:63 size: 0001=4K 0011=64K 0101=1M 0111=16M 1010=1G
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mtspr mmucr0,r3
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eratwe r2,r0,2
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eratwe r4,r0,1
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eratwe r8,r0,0
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isync
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load32 r10,BIOS_ERATW2 # word 2 wlc=40:41 rsvd=42 u=44:47 r=48 c=49 wimge=52:56 vf=57 ux/sx=58:59 uw/sw=60:61 ur/sr=62:63
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# derat 30 @<BIOS_START>
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li r0,0x001E # entry #30
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load32 r4,BIOS_START # word 1 rpn(32:51)=32:51 rpn(22:31)=54:63
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load32 r8,BIOS_START
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ori r8,r8,0x023F # word 0 epn=32:51 class=52:53 v=54 x=55 size=56:59 thrd=60:63 size: 0001=4K 0011=64K 0101=1M 0111=16M 1010=1G
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eratwe r10,r0,2
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eratwe r4,r0,1
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eratwe r8,r0,0
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isync
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lis r3,0x8800 # 32=ecl 36:37=tlbsel (10=i, 11=d)
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# ierat 15 @00000000
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li r0,0x000F # entry #15
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li r2,0x003F # word 2 wlc=40:41 rsvd=42 u=44:47 r=48 c=49 wimge=52:56 vf=57 ux/sx=58:59 uw/sw=60:61 ur/sr=62:63
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li r4,0 # word 1 rpn(32:51)=32:51 rpn(22:31)=54:63
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li r8,0x023F # word 0 epn=32:51 class=52:53 v=54 x=55 size=56:59 thrd=60:63 size: 0001=4K 0011=64K 0101=1M 0111=16M 1010=1G
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mtspr mmucr0,r3
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eratwe r2,r0,2
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eratwe r4,r0,1
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eratwe r8,r0,0
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isync
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# *** leave the init'd entry 14 for MT access to FFFFFFC0
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# ierat 13 @<BIOS_START>
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li r0,0x000D # entry #13
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load32 r4,BIOS_START # word 1 rpn(32:51)=32:51 rpn(22:31)=54:63
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load32 r8,BIOS_START
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ori r8,r8,0x023F # word 0 epn=32:51 class=52:53 v=54 x=55 size=56:59 thrd=60:63 size: 0001=4K 0011=64K 0101=1M 0111=16M 1010=1G
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eratwe r10,r0,2
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eratwe r4,r0,1
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eratwe r8,r0,0
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isync
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b init_t0
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# ------------------------------------------------------------------------------------------------------------------------------
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# init
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#
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# T0
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init_t0:
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# set up BIOS msr
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load32 r10,BIOS_MSR
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mtmsr r10
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isync
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# can't use load32 unless you can .set BIOS_STACK_0 to the linked value
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# load32 r1,BIOS_STACK_0 # @stack_0
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# this ignores def
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# lis r1,_stack_0@h
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# ori r1,r1,_stack_0@l
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# this requires data load
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lwz r1,stack_0(r0)
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b boot_complete
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# except T0
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init_t123:
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# set up BIOS msr
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load32 r10,BIOS_MSR
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mtmsr r10
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isync
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# check tir if more than 2 threads possible
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lwz r1,stack_1(r0)
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b boot_complete
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# ------------------------------------------------------------------------------------------------------------------------------
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boot_complete:
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# set up thread and hop to it
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lis r3,main@h
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ori r3,r3,main@l
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mtctr r3
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mfspr r3,tir # who am i?
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bctrl
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b kernel_return
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# ------------------------------------------------------------------------------------------------------------------------------
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.org 0x7FC
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kernel_return:
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b .
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# dec
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.org 0x800
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int_800:
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b .
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# perf
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.org 0x820
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int_820:
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b .
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.org 0x8F0
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.section .rodata
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stack_0: .long BIOS_STACK_0
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stack_1: .long BIOS_STACK_1
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