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1 # © IBM Corp. 2022
2 # Licensed under and subject to the terms of the CC-BY 4.0
3 # license (https://creativecommons.org/licenses/by/4.0/legalcode).
4 # Additional rights, including the right to physically implement a softcore
5 # that is compliant with the required sections of the Power ISA
6 # Specification, will be available at no cost via the OpenPOWER Foundation.
7 # This README will be updated with additional information when OpenPOWER's
8 # license is available.
9
10 # boot kernel
11 # resets to 32BE
12 # set up translations for starting bios (inc. BE/LE)
13 # copy modifiable rom data to ram - or do in bios?
14 # set up msr for running bios (inc. 32/64)
15 # jump to bios
16
17
18 .include "defines.s"
1 # © IBM Corp. 2020
2 # Licensed under and subject to the terms of the CC-BY 4.0
3 # license (https://creativecommons.org/licenses/by/4.0/legalcode).
4 # Additional rights, including the right to physically implement a softcore
5 # that is compliant with the required sections of the Power ISA
6 # Specification, will be available at no cost via the OpenPOWER Foundation.
7 # This README will be updated with additional information when OpenPOWER's
8 # license is available.
9
10 #-----------------------------------------
11 # Defines
12 #-----------------------------------------
13
14 # Regs
15
16 .set r0, 0
17 .set r1, 1
18 .set r2, 2
19 .set r3, 3
20 .set r4, 4
21 .set r5, 5
22 .set r6, 6
23 .set r7, 7
24 .set r8, 8
25 .set r9, 9
26 .set r10,10
27 .set r11,11
28 .set r12,12
29 .set r13,13
30 .set r14,14
31 .set r15,15
32 .set r16,16
33 .set r17,17
34 .set r18,18
35 .set r19,19
36 .set r20,20
37 .set r21,21
38 .set r22,22
39 .set r23,23
40 .set r24,24
41 .set r25,25
42 .set r26,26
43 .set r27,27
44 .set r28,28
45 .set r29,29
46 .set r30,30
47 .set r31,31
48
49 .set f0, 0
50 .set f1, 1
51 .set f2, 2
52 .set f3, 3
53 .set f4, 4
54 .set f5, 5
55 .set f6, 6
56 .set f7, 7
57 .set f8, 8
58 .set f9, 9
59 .set f10,10
60 .set f11,11
61 .set f12,12
62 .set f13,13
63 .set f14,14
64 .set f15,15
65 .set f16,16
66 .set f17,17
67 .set f18,18
68 .set f19,19
69 .set f20,20
70 .set f21,21
71 .set f22,22
72 .set f23,23
73 .set f24,24
74 .set f25,25
75 .set f26,26
76 .set f27,27
77 .set f28,28
78 .set f29,29
79 .set f30,30
80 .set f31,31
81
82 .set cr0, 0
83 .set cr1, 1
84 .set cr2, 2
85 .set cr3, 3
86 .set cr4, 4
87 .set cr5, 5
88 .set cr6, 6
89 .set cr7, 7
90
91 # SPR numbers
92
93 .set srr0, 26
94 .set srr1, 27
95 .set dar, 19
96 .set dsisr, 18
97 .set epcr, 307
98 .set tar, 815
99
100 .set dbsr, 304
101 .set dbcr0, 308
102 .set dbcr1, 309
103 .set dbcr2, 310
104 .set dbcr3, 848
105
106 .set ivpr, 63
107
108 .set iucr0, 1011
109 .set iucr1, 883
110 .set iucr2, 884
111
112 .set iudbg0, 888
113 .set iudbg1, 889
114 .set iudbg2, 890
115 .set iulfsr, 891
116 .set iullcr, 892
117
118 .set mmucr0, 1020
119 .set mmucr1, 1021
120 .set mmucr2, 1022
121 .set mmucr3, 1023
122
123 .set tb, 268
124 .set tbl, 284
125 .set tbh, 285
126
127 .set dec, 22
128 .set udec, 550
129 .set tsr, 336
130 .set tcr, 340
131
132 .set xucr0, 1014
133 .set xucr1, 851
134 .set xucr2, 1016
135 .set xucr3, 852
136 .set xucr4, 853
137
138 .set tens, 438
139 .set tenc, 439
140 .set tensr, 437
141
142 .set pid, 48
143 .set pir, 286
144 .set pvr, 287
145 .set tir, 446
146
147 #.set sprg0,
148 #.set sprg1,
149 #.set sprg2,
150 .set sprg3, 259
19
20 .macro load32 rx,v
21 li \rx,0
22 oris \rx,\rx,\v>>16
23 ori \rx,\rx,\v&0x0000FFFF
24 .endm
25
26 .macro load16swiz rx,v
27 li \rx,0
28 ori \rx,\rx,(\v<<8)&0xFF00
29 ori \rx,\rx,(\v>>8)&0x00FF
30 .endm
31
32 # constants from linker script, or defsym
33
34 .ifdef BIOS_32
35 # sup MSR cm=1 ce=1 ee=1 pr=0 fp=1 me=1 fe=00 de=0 is=0 ds=0
36 .set BIOS_MSR,0x0002B000
37 .else
38 # sup MSR cm=1 ce=1 ee=1 pr=0 fp=1 me=1 fe=00 de=0 is=0 ds=0
39 .set BIOS_MSR,0x8002B000
40 .endif
41
42 # erat w2 (test) # word 2 wlc=40:41 rsvd=42 u=44:47 r=48 c=49 wimge=52:56 vf=57 ux/sx=58:59 uw/s
43 .ifdef BIOS_LE
44 .set BIOS_ERATW2,0x000000BF
45 .else
46 .set BIOS_ERATW2,0x0000003F
47 .endif
48
49 # bios might be able to use one stack during thread startup if careful
50 .ifndef BIOS_STACK_0
51 .set BIOS_STACK_0,_stack_0
52 .endif
53
54 .ifndef BIOS_STACK_1
55 .set BIOS_STACK_1,_stack_1
56 .endif
57
58 .ifndef BIOS_START
59 .set BIOS_START,0x00010000
60 .endif
61
62 .section .text
63
64 .global _start
65
66 .org 0x000
67 _start:
68 int_000:
69 0000 48000400 b boot_start
70
71 .ifdef TST_END
72 0004 48000000 b tst_end
73 .endif
74
75 # critical input
76 0008 00000000 .org 0x020
76 00000000
76 00000000
76 00000000
76 00000000
77 int_020:
78 .ifdef INT_UNHANDLED
79 0020 48000000 b int_unhandled
80 .else
81 b .
82 .endif
83
84 # debug
85 0024 00000000 .org 0x040
85 00000000
85 00000000
85 00000000
85 00000000
86 int_040:
87 0040 48000000 b .
88
89 # dsi
90 0044 00000000 .org 0x060
90 00000000
90 00000000
90 00000000
90 00000000
91 int_060:
92 0060 48000000 b .
93
94 # isi
95 0064 00000000 .org 0x080
95 00000000
95 00000000
95 00000000
95 00000000
96 int_080:
97 0080 48000000 b .
98
99 # external
100 0084 00000000 .org 0x0A0
100 00000000
100 00000000
100 00000000
100 00000000
101 int_0A0:
102 00a0 48000000 b .
103
104 # alignment
105 00a4 00000000 .org 0x0C0
105 00000000
105 00000000
105 00000000
105 00000000
106 int_0C0:
107 00c0 48000000 b .
108
109 # program
110 00c4 00000000 .org 0x0E0
110 00000000
110 00000000
110 00000000
110 00000000
111 int_0E0:
112 00e0 48000000 b .
113
114 # fp unavailable
115 00e4 00000000 .org 0x100
115 00000000
115 00000000
115 00000000
115 00000000
116 int_100:
117 0100 48000000 b .
118
119 # sc
120 0104 00000000 .org 0x120
120 00000000
120 00000000
120 00000000
120 00000000
121 int_120:
122 .ifdef INT_SC
123 # lev is in 20:26, but supposed to use scv now
124 li r3,0
125 mfsrr0 r4
126 b int_sc
127 .else
128 .ifdef INT_UNHANDLED
129 0120 48000000 b int_unhandled
130 .else
131 b .
132 .endif
133 .endif
134
135 # apu unavailable
136 0124 00000000 .org 0x140
136 00000000
136 00000000
136 00000000
136 00000000
137 int_140:
138 0140 48000000 b .
139
140 # decrementer
141 0144 00000000 .org 0x160
141 00000000
141 00000000
141 00000000
141 00000000
142 int_160:
143 0160 48000000 b .
144
145 # fit
146 0164 00000000 .org 0x180
146 00000000
146 00000000
146 00000000
146 00000000
147 int_180:
148 0180 48000000 b .
149
150 # watchdog
151 0184 00000000 .org 0x1A0
151 00000000
151 00000000
151 00000000
151 00000000
152 int_1A0:
153 01a0 48000000 b .
154
155 # dtlb
156 01a4 00000000 .org 0x1C0
156 00000000
156 00000000
156 00000000
156 00000000
157 int_1C0:
158 01c0 48000000 b .
159
160 # itlb
161 01c4 00000000 .org 0x1E0
161 00000000
161 00000000
161 00000000
161 00000000
162 int_1E0:
163 01e0 48000000 b .
164
165 # vector unavailable
166 01e4 00000000 .org 0x200
166 00000000
166 00000000
166 00000000
166 00000000
167 int_200:
168 0200 48000000 b .
169
170 #
171 0204 00000000 .org 0x220
171 00000000
171 00000000
171 00000000
171 00000000
172 int_220:
173 0220 48000000 b .
174
175 #
176 0224 00000000 .org 0x240
176 00000000
176 00000000
176 00000000
176 00000000
177 int_240:
178 0240 48000000 b .
179
180 #
181 0244 00000000 .org 0x260
181 00000000
181 00000000
181 00000000
181 00000000
182 int_260:
183 0260 48000000 b .
184
185 # doorbell
186 0264 00000000 .org 0x280
186 00000000
186 00000000
186 00000000
186 00000000
187 int_280:
188 0280 48000000 b .
189
190 # doorbell critical
191 0284 00000000 .org 0x2A0
191 00000000
191 00000000
191 00000000
191 00000000
192 int_2A0:
193 02a0 48000000 b .
194
195 # doorbell guest
196 02a4 00000000 .org 0x2C0
196 00000000
196 00000000
196 00000000
196 00000000
197 int_2C0:
198 02c0 48000000 b .
199
200 # doorbell guest critical
201 02c4 00000000 .org 0x2E0
201 00000000
201 00000000
201 00000000
201 00000000
202 int_2E0:
203 02e0 48000000 b .
204
205 # hvsc
206 02e4 00000000 .org 0x300
206 00000000
206 00000000
206 00000000
206 00000000
207 int_300:
208 0300 48000000 b .
209
210 # hvpriv
211 0304 00000000 .org 0x320
211 00000000
211 00000000
211 00000000
211 00000000
212 int_320:
213 0320 48000000 b .
214
215 # lrat
216 0324 00000000 .org 0x340
216 00000000
216 00000000
216 00000000
216 00000000
217 int_340:
218 0340 48000000 b .
219
220 # -------------------------------------------------------------------------------------------------
221 # initial translation
222 # both erats:
223 # 00000000 64K: (rom, BE)
224 # 00010000 64K: (ram, BE or LE)
225 #
226 0344 00000000 .org 0x400
226 00000000
226 00000000
226 00000000
226 00000000
227 boot_start:
228
229 0400 7CBE6AA6 mfspr r5,tir # who am i?
230 0404 2C250000 cmpdi r5,0x00 # skip unless T0
231 0408 408200E0 bne init_t123
232
233 040c 3C608C00 lis r3,0x8C00 # 32=ecl 36:37=tlbsel (10=i, 11=d)
234
235 # derat 31 @00000000
236 0410 3800001F li r0,0x001F # entry #31
237 0414 38400015 li r2,0x0015 # word 2 wlc=40:41 rsvd=42 u=44:47 r=48 c=49 wimge=52:56 vf=57 ux/
238 0418 38800000 li r4,0 # word 1 rpn(32:51)=32:51 rpn(22:31)=54:63
239 041c 3900023F li r8,0x023F # word 0 epn=32:51 class=52:53 v=54 x=55 size=56:59 thrd=60:63 s
240
241 0420 7C7CFBA6 mtspr mmucr0,r3
242 0424 7C4011A6 eratwe r2,r0,2
243 0428 7C8009A6 eratwe r4,r0,1
244 042c 7D0001A6 eratwe r8,r0,0
245 0430 4C00012C isync
246
247 0434 39400000 load32 r10,BIOS_ERATW2 # word 2 wlc=40:41 rsvd=42 u=44:47 r=48 c=49 wimge=52:56 vf=57 ux/
247 654A0000
247 614A003F
248
249 # derat 30 @<BIOS_START>
250 0440 3800001E li r0,0x001E # entry #30
251 0444 38800000 load32 r4,BIOS_START # word 1 rpn(32:51)=32:51 rpn(22:31)=54:63
251 64840001
251 60840000
252 0450 39000000 load32 r8,BIOS_START
252 65080001
252 61080000
253 045c 6108023F ori r8,r8,0x023F # word 0 epn=32:51 class=52:53 v=54 x=55 size=56:59 thrd=60:63 s
254
255 0460 7D4011A6 eratwe r10,r0,2
256 0464 7C8009A6 eratwe r4,r0,1
257 0468 7D0001A6 eratwe r8,r0,0
258 046c 4C00012C isync
259
260 0470 3C608800 lis r3,0x8800 # 32=ecl 36:37=tlbsel (10=i, 11=d)
261
262 # ierat 15 @00000000
263 0474 3800000F li r0,0x000F # entry #15
264 0478 3840003F li r2,0x003F # word 2 wlc=40:41 rsvd=42 u=44:47 r=48 c=49 wimge=52:56 vf=57 ux/
265 047c 38800000 li r4,0 # word 1 rpn(32:51)=32:51 rpn(22:31)=54:63
266 0480 3900023F li r8,0x023F # word 0 epn=32:51 class=52:53 v=54 x=55 size=56:59 thrd=60:63 s
267
268 0484 7C7CFBA6 mtspr mmucr0,r3
269 0488 7C4011A6 eratwe r2,r0,2
270 048c 7C8009A6 eratwe r4,r0,1
271 0490 7D0001A6 eratwe r8,r0,0
272 0494 4C00012C isync
273
274 # *** leave the init'd entry 14 for MT access to FFFFFFC0
275 # ierat 13 @<BIOS_START>
276 0498 3800000D li r0,0x000D # entry #13
277 049c 38800000 load32 r4,BIOS_START # word 1 rpn(32:51)=32:51 rpn(22:31)=54:63
277 64840001
277 60840000
278 04a8 39000000 load32 r8,BIOS_START
278 65080001
278 61080000
279 04b4 6108023F ori r8,r8,0x023F # word 0 epn=32:51 class=52:53 v=54 x=55 size=56:59 thrd=60:63 s
280
281 04b8 7D4011A6 eratwe r10,r0,2
282 04bc 7C8009A6 eratwe r4,r0,1
283 04c0 7D0001A6 eratwe r8,r0,0
284 04c4 4C00012C isync
285
286 04c8 48000004 b init_t0
287
288 # -------------------------------------------------------------------------------------------------
289 # init
290 #
291
292 # T0
293
294 init_t0:
295
296 # set up BIOS msr
297
298 04cc 39400000 load32 r10,BIOS_MSR
298 654A8002
298 614AB000
299 04d8 7D400124 mtmsr r10
300 04dc 4C00012C isync
301 # can't use load32 unless you can .set BIOS_STACK_0 to the linked value
302 # load32 r1,BIOS_STACK_0 # @stack_0
303 # this ignores def
304 # lis r1,_stack_0@h
305 # ori r1,r1,_stack_0@l
306 # this requires data load
307 04e0 80200000 lwz r1,stack_0(r0)
308
309 04e4 48000020 b boot_complete
310
311 # except T0
312
313 init_t123:
314
315 # set up BIOS msr
316
317 04e8 39400000 load32 r10,BIOS_MSR
317 654A8002
317 614AB000
318 04f4 7D400124 mtmsr r10
319 04f8 4C00012C isync
320 # check tir if more than 2 threads possible
321 04fc 80200000 lwz r1,stack_1(r0)
322
323 0500 48000004 b boot_complete
324
325 # -------------------------------------------------------------------------------------------------
326 boot_complete:
327
328 # set up thread and hop to it
329
330 0504 3C600000 lis r3,main@h
331 0508 60630000 ori r3,r3,main@l
332 050c 7C6903A6 mtctr r3
333 0510 7C7E6AA6 mfspr r3,tir # who am i?
334 0514 4E800421 bctrl
335 0518 480002E4 b kernel_return
336
337 # -------------------------------------------------------------------------------------------------
338
339 051c 00000000 .org 0x7FC
339 00000000
339 00000000
339 00000000
339 00000000
340 kernel_return:
341 07fc 48000000 b .
342
343 # dec
344 .org 0x800
345 int_800:
346 0800 48000000 b .
347
348 # perf
349 0804 00000000 .org 0x820
349 00000000
349 00000000
349 00000000
349 00000000
350 int_820:
351 0820 48000000 b .
352
353 0824 00000000 .org 0x8F0
353 00000000
353 00000000
353 00000000
353 00000000
354 .section .rodata
355 0000 00000000 stack_0: .long BIOS_STACK_0
356 0004 00000000 stack_1: .long BIOS_STACK_1