litex

dev/sim/coco/A2O.py

@@ -287,28 +287,28 @@ async def A2OMonitor(dut, sim):
          for i in range(36):
             good, arch = sim.safeint(gprCompMap[i].value.binstr, 2, rc=True)
             if good and arch != lastGprCompMap[i]:
-               sim.msg(f'GPR Update: R{i:02d}={hex(gpr[arch], 16)}')
+               sim.msg(f'C0: GPR Update: R{i:02d}={hex(gpr[arch], 16)}')
                lastGprCompMap[i] = arch
          for i in range(8):
             good, arch = sim.safeint(crCompMap[i].value.binstr, 2, rc=True)
             if good and arch != lastCrCompMap[i]:
-               sim.msg(f'CR Update: F{i:01d}={hex(cr[arch], 1)}')
+               sim.msg(f'C0: CR Update: F{i:01d}={hex(cr[arch], 1)}')
                lastCrCompMap[i] = arch
          for i in range(1):
             good, arch = sim.safeint(xerCompMap[i].value.binstr, 2, rc=True)
             if good and arch != lastXerCompMap[i]:
                v = xer[arch].value.binstr
-               sim.msg(f'XER Update: SO/OV/CA={v[0:3]} LEN={int(v[3:],2):02X}')
+               sim.msg(f'C0: XER Update: SO/OV/CA={v[0:3]} LEN={int(v[3:],2):02X}')
                lastXerCompMap[i] = arch
          for i in range(1):
             good, arch = sim.safeint(ctrCompMap[i].value.binstr, 2, rc=True)
             if good and arch != lastCtrCompMap[i]:
-               sim.msg(f'CTR Update:{hex(ctr[arch], 16)}')
+               sim.msg(f'C0: CTR Update:{hex(ctr[arch], 16)}')
                lastCtrCompMap[i] = arch
          for i in range(1):
             good, arch = sim.safeint(lrCompMap[i].value.binstr, 2, rc=True)
             if good and arch != lastLrCompMap[i]:
-               sim.msg(f'LR Update:{hex(lr[arch], 16)}')
+               sim.msg(f'C0: LR Update:{hex(lr[arch], 16)}')
                lastLrCompMap[i] = arch
 
    sim.msg(f'{me}: ended.')

dev/sim/coco/cocotb_litex.v

@@ -5,23 +5,27 @@
 
 module cocotb (
 
-    input                                                  clk_1x,
-    input                                                  clk_2x,
-    input                                                  rst,
-
-    input                                                  timerInterrupt,
-    input                                                  externalInterrupt,
-    input                                                  softwareInterrupt,
-    input                                                  externalInterruptS,
-
-    output                                                 wb_stb,
-    output                                                 wb_cyc,
-    output [31:0]                                          wb_adr,
-    output                                                 wb_we,
-    output [3:0]                                           wb_sel,
-    output [31:0]                                          wb_datw,
-    input                                                  wb_ack,
-    input  [31:0]                                          wb_datr
+    input                            clk_1x,
+    input                            clk_2x,
+    input                            rst,
+
+    input  [0:31]                    cfg_dat,
+    input                            cfg_wr,
+    output [0:31]                    status,
+
+    input                            timerInterrupt,
+    input                            externalInterrupt,
+    input                            softwareInterrupt,
+    input                            externalInterruptS,
+
+    output                           wb_stb,
+    output                           wb_cyc,
+    output [31:0]                    wb_adr,
+    output                           wb_we,
+    output [3:0]                     wb_sel,
+    output [31:0]                    wb_datw,
+    input                            wb_ack,
+    input  [31:0]                    wb_datr
 
 );
 
@@ -30,6 +34,10 @@ a2owb c0 (
       .clk_2x(clk_2x),
       .rst(rst),
 
+      .cfg_wr(cfg_wr),
+      .cfg_dat(cfg_dat),
+      .status(status),
+
       .timerInterrupt(timerInterrupt),
       .externalInterrupt(externalInterrupt),
       .softwareInterrupt(softwareInterrupt),

dev/sim/coco/tb_node.py

@@ -467,6 +467,7 @@ async def tb_litex(dut):
    sim = Sim(dut)
    sim.mem = Memory(sim)
    sim.maxCycles = 20000
+   sim.resetAddr = None    # set to 00000000 in rtl define
 
    # rom+bios+arcitst
    sim.memFiles = [
@@ -476,7 +477,7 @@ async def tb_litex(dut):
       }
    ]
 
-   for i in range(len(sim.memFiles)):  #wtf el should be object with name, format, etc.
+   for i in range(len(sim.memFiles)):
       sim.mem.loadFile(sim.memFiles[i]['file'], addr=sim.memFiles[i]['addr'])
 
    if sim.resetAddr is not None and sim.mem.read(sim.resetAddr) == sim.mem.default:
@@ -484,11 +485,11 @@ async def tb_litex(dut):
       sim.msg(f'Set reset fetch @{sim.resetAddr:08X} to {sim.resetOp:08X}.')
 
    # init stuff
-   #await init(dut, sim)
-   dut.externalInterrupt.value = 0;
-   dut.externalInterruptS.value = 0;
-   dut.timerInterrupt.value = 0;
-   dut.softwareInterrupt.value = 0;
+   dut.externalInterrupt.value = 0
+   dut.externalInterruptS.value = 0
+   dut.timerInterrupt.value = 0
+   dut.softwareInterrupt.value = 0
+   dut.cfg_wr.value = 0
 
    # start clocks,reset
    await cocotb.start(genClocksLitex(dut, sim))
@@ -550,13 +551,6 @@ async def tb_litex(dut):
    await cocotb.start(A2O.checker(dut, sim))
    await cocotb.start(A2O.monitor(dut, sim))
 
-   #await cocotb.start(checker(dut, sim))
-
-   # release thread(s)
-   #dut.an_ac_pm_thread_stop.value = 0
-   #await RisingEdge(dut.clk_1x)
-   #dut._log.info(f'[{sim.cycle:08d}] Threads enabled.')
-
    # should await sim.done
    await Timer((sim.maxCycles+100)*8, units='ns')