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486 lines
28 KiB
Plaintext
486 lines
28 KiB
Plaintext
OpenROAD v2.0-1901-g6157d4945
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This program is licensed under the BSD-3 license. See the LICENSE file for details.
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Components of this program may be licensed under more restrictive licenses which must be honored.
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[INFO ODB-0222] Reading LEF file: ./platforms/sky130hd/lef/sky130_fd_sc_hd.tlef
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[INFO ODB-0223] Created 11 technology layers
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[INFO ODB-0224] Created 25 technology vias
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[INFO ODB-0226] Finished LEF file: ./platforms/sky130hd/lef/sky130_fd_sc_hd.tlef
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[INFO ODB-0222] Reading LEF file: ./platforms/sky130hd/lef/sky130_fd_sc_hd_merged.lef
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[INFO ODB-0225] Created 437 library cells
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[INFO ODB-0226] Finished LEF file: ./platforms/sky130hd/lef/sky130_fd_sc_hd_merged.lef
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[INFO ODB-0127] Reading DEF file: ./results/sky130hd/a2p/base/2_floorplan.def
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[INFO ODB-0128] Design: A2P_WB
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[INFO ODB-0094] Created 100000 Insts
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[INFO ODB-0094] Created 200000 Insts
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[INFO ODB-0094] Created 300000 Insts
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[INFO ODB-0094] Created 400000 Insts
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[INFO ODB-0094] Created 500000 Insts
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[INFO ODB-0094] Created 600000 Insts
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[INFO ODB-0097] Created 100000 Nets
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[INFO ODB-0097] Created 200000 Nets
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[INFO ODB-0097] Created 300000 Nets
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[INFO ODB-0130] Created 254 pins.
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[INFO ODB-0131] Created 651926 components and 2587892 component-terminals.
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[INFO ODB-0132] Created 2 special nets and 1303852 connections.
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[INFO ODB-0133] Created 317870 nets and 1283758 connections.
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[INFO ODB-0134] Finished DEF file: ./results/sky130hd/a2p/base/2_floorplan.def
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[INFO GPL-0002] DBU: 1000
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[INFO GPL-0003] SiteSize: 460 2720
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[INFO GPL-0004] CoreAreaLxLy: 210220 212160
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[INFO GPL-0005] CoreAreaUxUy: 4989620 4387360
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[INFO GPL-0006] NumInstances: 651926
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[INFO GPL-0007] NumPlaceInstances: 386025
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[INFO GPL-0008] NumFixedInstances: 265901
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[INFO GPL-0009] NumDummyInstances: 0
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[INFO GPL-0010] NumNets: 317870
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[INFO GPL-0011] NumPins: 1284012
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[INFO GPL-0012] DieAreaLxLy: 0 0
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[INFO GPL-0013] DieAreaUxUy: 5200000 4609140
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[INFO GPL-0014] CoreAreaLxLy: 210220 212160
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[INFO GPL-0015] CoreAreaUxUy: 4989620 4387360
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[INFO GPL-0016] CoreArea: 19954950880000
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[INFO GPL-0017] NonPlaceInstsArea: 332695331200
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[INFO GPL-0018] PlaceInstsArea: 8405654188800
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[INFO GPL-0019] Util(%): 42.84
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[INFO GPL-0020] StdInstsArea: 8405654188800
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[INFO GPL-0021] MacroInstsArea: 0
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[InitialPlace] Iter: 1 CG Error: 0.00415516 HPWL: 3867717600
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[InitialPlace] Iter: 2 CG Error: 0.00007246 HPWL: 3863367077
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[InitialPlace] Iter: 3 CG Error: 0.00001159 HPWL: 3883391444
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[InitialPlace] Iter: 4 CG Error: 0.00001345 HPWL: 3891885687
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[InitialPlace] Iter: 5 CG Error: 0.00001456 HPWL: 3889521585
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[InitialPlace] Iter: 6 CG Error: 0.00000666 HPWL: 3888913848
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[INFO GPL-0031] FillerInit: NumGCells: 541159
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[INFO GPL-0032] FillerInit: NumGNets: 317870
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[INFO GPL-0033] FillerInit: NumGPins: 1284012
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[INFO GPL-0023] TargetDensity: 0.60
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[INFO GPL-0024] AveragePlaceInstArea: 21774895
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[INFO GPL-0025] IdealBinArea: 36291492
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[INFO GPL-0026] IdealBinCnt: 549852
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[INFO GPL-0027] TotalBinArea: 19954950880000
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[INFO GPL-0028] BinCnt: 512 512
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[INFO GPL-0029] BinSize: 9335 8155
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[INFO GPL-0030] NumBins: 262144
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[NesterovSolve] Iter: 1 overflow: 0.998845 HPWL: 1180500025
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[NesterovSolve] Iter: 10 overflow: 0.996763 HPWL: 1383805105
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[NesterovSolve] Iter: 20 overflow: 0.995224 HPWL: 1474291212
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[NesterovSolve] Iter: 30 overflow: 0.994488 HPWL: 1533722689
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[NesterovSolve] Iter: 40 overflow: 0.994295 HPWL: 1546586218
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[NesterovSolve] Iter: 50 overflow: 0.994281 HPWL: 1546146528
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[NesterovSolve] Iter: 60 overflow: 0.99432 HPWL: 1535568772
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[NesterovSolve] Iter: 70 overflow: 0.994345 HPWL: 1530188704
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[NesterovSolve] Iter: 80 overflow: 0.994262 HPWL: 1533229326
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[NesterovSolve] Iter: 90 overflow: 0.99423 HPWL: 1537638589
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[NesterovSolve] Iter: 100 overflow: 0.994137 HPWL: 1539012361
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[NesterovSolve] Iter: 110 overflow: 0.994094 HPWL: 1539541437
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[NesterovSolve] Iter: 120 overflow: 0.994015 HPWL: 1541128962
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[NesterovSolve] Iter: 130 overflow: 0.993987 HPWL: 1545100411
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[NesterovSolve] Iter: 140 overflow: 0.993947 HPWL: 1551408823
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[NesterovSolve] Iter: 150 overflow: 0.993883 HPWL: 1560006569
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[NesterovSolve] Iter: 160 overflow: 0.993816 HPWL: 1573137353
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[NesterovSolve] Iter: 170 overflow: 0.993782 HPWL: 1593520684
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[NesterovSolve] Iter: 180 overflow: 0.993706 HPWL: 1628314635
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[NesterovSolve] Iter: 190 overflow: 0.993551 HPWL: 1683084197
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[NesterovSolve] Iter: 200 overflow: 0.993304 HPWL: 1759538391
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[NesterovSolve] Iter: 210 overflow: 0.992975 HPWL: 1857231666
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[NesterovSolve] Iter: 220 overflow: 0.992348 HPWL: 1978689253
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[NesterovSolve] Iter: 230 overflow: 0.991302 HPWL: 2125167500
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[NesterovSolve] Iter: 240 overflow: 0.989686 HPWL: 2299610841
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[NesterovSolve] Iter: 250 overflow: 0.987221 HPWL: 2513196172
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[NesterovSolve] Iter: 260 overflow: 0.983451 HPWL: 2784510939
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[NesterovSolve] Iter: 270 overflow: 0.978863 HPWL: 3141905617
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[NesterovSolve] Iter: 280 overflow: 0.973151 HPWL: 3609119836
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[NesterovSolve] Iter: 290 overflow: 0.965563 HPWL: 4185323792
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[NesterovSolve] Iter: 300 overflow: 0.955086 HPWL: 4863482666
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[NesterovSolve] Iter: 310 overflow: 0.942691 HPWL: 5624032958
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[NesterovSolve] Iter: 320 overflow: 0.928545 HPWL: 6411407597
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[NesterovSolve] Iter: 330 overflow: 0.912421 HPWL: 7159465127
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[NesterovSolve] Iter: 340 overflow: 0.892405 HPWL: 7797782782
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[NesterovSolve] Iter: 350 overflow: 0.866639 HPWL: 8329655506
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[NesterovSolve] Iter: 360 overflow: 0.838202 HPWL: 8737315357
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[NesterovSolve] Iter: 370 overflow: 0.807709 HPWL: 9228870381
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[NesterovSolve] Iter: 380 overflow: 0.774372 HPWL: 9858444582
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[NesterovSolve] Iter: 390 overflow: 0.74003 HPWL: 10506023896
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[NesterovSolve] Iter: 400 overflow: 0.706632 HPWL: 11706861023
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[NesterovSolve] Iter: 410 overflow: 0.667068 HPWL: 13542833928
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[NesterovSolve] Iter: 420 overflow: 0.639148 HPWL: 13843488224
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[NesterovSolve] Snapshot saved at iter = 427
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[NesterovSolve] Iter: 430 overflow: 0.590578 HPWL: 14582617111
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[NesterovSolve] Iter: 440 overflow: 0.554742 HPWL: 13331266378
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[NesterovSolve] Iter: 450 overflow: 0.512624 HPWL: 12570495474
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[NesterovSolve] Iter: 460 overflow: 0.476803 HPWL: 12043325892
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[NesterovSolve] Iter: 470 overflow: 0.447001 HPWL: 11806171542
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[NesterovSolve] Iter: 480 overflow: 0.415581 HPWL: 11257953580
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[NesterovSolve] Iter: 490 overflow: 0.388441 HPWL: 10823311280
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[NesterovSolve] Iter: 500 overflow: 0.360349 HPWL: 10409735593
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[NesterovSolve] Iter: 510 overflow: 0.336177 HPWL: 10037738990
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[NesterovSolve] Iter: 520 overflow: 0.315769 HPWL: 9716054384
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[NesterovSolve] Iter: 530 overflow: 0.293944 HPWL: 9456435951
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[NesterovSolve] Iter: 540 overflow: 0.266344 HPWL: 9268137881
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[NesterovSolve] Iter: 550 overflow: 0.227483 HPWL: 9129070380
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[INFO GPL-0075] Routability numCall: 1 inflationIterCnt: 1 bloatIterCnt: 0
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[INFO GRT-0020] Min routing layer: met1
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[INFO GRT-0021] Max routing layer: met5
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[INFO GRT-0022] Global adjustment: 0%
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[INFO GRT-0023] Grid origin: (0, 0)
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[WARNING GRT-0043] No OR_DEFAULT vias defined.
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[INFO GRT-0224] Chose via L1M1_PR as default.
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[INFO GRT-0224] Chose via M1M2_PR as default.
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[INFO GRT-0224] Chose via M2M3_PR as default.
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[INFO GRT-0224] Chose via M3M4_PR as default.
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[INFO GRT-0224] Chose via M4M5_PR as default.
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[INFO GRT-0088] Layer li1 Track-Pitch = 0.4600 line-2-Via Pitch: 0.3400
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[INFO GRT-0088] Layer met1 Track-Pitch = 0.3400 line-2-Via Pitch: 0.3400
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[INFO GRT-0088] Layer met2 Track-Pitch = 0.4600 line-2-Via Pitch: 0.3500
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[INFO GRT-0088] Layer met3 Track-Pitch = 0.6800 line-2-Via Pitch: 0.6150
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[INFO GRT-0088] Layer met4 Track-Pitch = 0.9200 line-2-Via Pitch: 1.0400
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[INFO GRT-0088] Layer met5 Track-Pitch = 3.4000 line-2-Via Pitch: 3.1100
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[INFO GRT-0003] Macros: 0
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[INFO GRT-0004] Blockages: 1977156
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[INFO GRT-0019] Found 17533 clock nets.
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[INFO GRT-0001] Minimum degree: 2
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[INFO GRT-0002] Maximum degree: 67698
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[INFO GRT-0017] Processing 3379039 blockages on layer met1.
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[INFO GRT-0017] Processing 352 blockages on layer met4.
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[INFO GRT-0017] Processing 306 blockages on layer met5.
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[INFO GRT-0053] Routing resources analysis:
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Routing Original Derated Resource
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Layer Direction Resources Resources Reduction (%)
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---------------------------------------------------------------
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li1 Vertical 0 0 0.00%
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met1 Horizontal 10045020 4937568 50.85%
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met2 Vertical 7533765 4522140 39.98%
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met3 Horizontal 5022510 3018528 39.90%
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met4 Vertical 3013506 1510488 49.88%
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met5 Horizontal 1004502 502336 49.99%
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---------------------------------------------------------------
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[INFO GRT-0104] Minimal overflow 965 occurring at round 0.
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[INFO GRT-0111] Final number of vias: 1734719
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[INFO GRT-0112] Final usage 3D: 8145910
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[WARNING GRT-0115] Global routing finished with overflow.
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[INFO GRT-0096] Final congestion report:
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Layer Resource Demand Usage (%) Max H / Max V / Total Overflow
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---------------------------------------------------------------------------------------
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li1 0 39 0.00% 0 / 2 / 39
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met1 4937568 1247337 25.26% 7 / 0 / 27
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met2 4522140 1262928 27.93% 0 / 5 / 735
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met3 3018528 272168 9.02% 2 / 0 / 2
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met4 1510488 157552 10.43% 0 / 2 / 161
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met5 502336 1729 0.34% 1 / 0 / 1
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---------------------------------------------------------------------------------------
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Total 14491060 2941753 20.30% 10 / 9 / 965
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[INFO GRT-0018] Total wirelength: 27717341 um
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[INFO GPL-0036] TileLxLy: 0 0
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[INFO GPL-0037] TileSize: 6900 6900
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[INFO GPL-0038] TileCnt: 753 668
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[INFO GPL-0039] numRoutingLayers: 6
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[INFO GPL-0040] NumTiles: 503004
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[INFO GPL-0063] TotalRouteOverflowH2: 0.7999999523162842
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[INFO GPL-0064] TotalRouteOverflowV2: 75.83334827423096
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[INFO GPL-0065] OverflowTileCnt2: 661
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[INFO GPL-0066] 0.5%RC: 1.015139418701184
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[INFO GPL-0067] 1.0%RC: 1.0075704650368604
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[INFO GPL-0068] 2.0%RC: 1.0012994584827064
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[INFO GPL-0069] 5.0%RC: 0.9398297566571524
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[INFO GPL-0070] 0.5rcK: 1.0
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[INFO GPL-0071] 1.0rcK: 1.0
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[INFO GPL-0072] 2.0rcK: 0.0
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[INFO GPL-0073] 5.0rcK: 0.0
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[INFO GPL-0074] FinalRC: 1.0113549
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[NesterovSolve] Iter: 560 overflow: 0.192131 HPWL: 8951726949
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[NesterovSolve] Iter: 570 overflow: 0.164959 HPWL: 8896051253
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[NesterovSolve] Iter: 580 overflow: 0.142472 HPWL: 8828665026
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[NesterovSolve] Iter: 590 overflow: 0.123891 HPWL: 8765586474
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[NesterovSolve] Iter: 600 overflow: 0.1076 HPWL: 8764798375
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[NesterovSolve] Finished with Overflow: 0.098959
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==========================================================================
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global place report_checks -path_delay min
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--------------------------------------------------------------------------
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Startpoint: externalResetVector[1] (input port clocked by clk)
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Endpoint: _392865_ (removal check against rising-edge clock clk)
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Path Group: **async_default**
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Path Type: min
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Fanout Cap Slew Delay Time Description
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-----------------------------------------------------------------------------
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0.00 0.00 0.00 clock clk (rise edge)
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0.00 0.00 clock network delay (ideal)
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0.00 0.00 v input external delay
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0.00 0.00 0.00 v externalResetVector[1] (in)
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2 0.21 externalResetVector[1] (net)
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0.21 0.11 0.11 v _334882_/B (sky130_fd_sc_hd__nand2_1)
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0.08 0.14 0.24 ^ _334882_/Y (sky130_fd_sc_hd__nand2_1)
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1 0.00 _000305_ (net)
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0.08 0.00 0.24 ^ _392865_/SET_B (sky130_fd_sc_hd__dfbbp_1)
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0.24 data arrival time
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0.00 0.00 0.00 clock clk (rise edge)
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0.00 0.00 clock network delay (ideal)
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0.00 0.00 clock reconvergence pessimism
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0.00 ^ _392865_/CLK (sky130_fd_sc_hd__dfbbp_1)
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0.10 0.10 library removal time
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0.10 data required time
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-----------------------------------------------------------------------------
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0.10 data required time
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-0.24 data arrival time
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-----------------------------------------------------------------------------
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0.14 slack (MET)
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Startpoint: iBusWB_DAT_MISO[29] (input port clocked by clk)
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Endpoint: _336849_ (rising edge-triggered flip-flop clocked by clk)
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Path Group: clk
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Path Type: min
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Fanout Cap Slew Delay Time Description
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-----------------------------------------------------------------------------
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0.00 0.00 0.00 clock clk (rise edge)
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0.00 0.00 clock network delay (ideal)
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0.00 0.00 ^ input external delay
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0.00 0.00 0.00 ^ iBusWB_DAT_MISO[29] (in)
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1 0.03 iBusWB_DAT_MISO[29] (net)
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0.01 0.00 0.00 ^ _336849_/D (sky130_fd_sc_hd__dfxtp_1)
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0.00 data arrival time
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0.00 0.00 0.00 clock clk (rise edge)
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0.00 0.00 clock network delay (ideal)
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0.00 0.00 clock reconvergence pessimism
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0.00 ^ _336849_/CLK (sky130_fd_sc_hd__dfxtp_1)
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-0.03 -0.03 library hold time
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-0.03 data required time
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-----------------------------------------------------------------------------
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-0.03 data required time
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-0.00 data arrival time
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-----------------------------------------------------------------------------
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0.03 slack (MET)
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==========================================================================
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global place report_checks -path_delay max
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--------------------------------------------------------------------------
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Startpoint: externalResetVector[21] (input port clocked by clk)
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Endpoint: _392885_ (recovery check against rising-edge clock clk)
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Path Group: **async_default**
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Path Type: max
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Fanout Cap Slew Delay Time Description
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-----------------------------------------------------------------------------
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0.00 0.00 0.00 clock clk (rise edge)
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0.00 0.00 clock network delay (ideal)
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0.00 0.00 v input external delay
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0.00 0.00 0.00 v externalResetVector[21] (in)
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2 0.78 externalResetVector[21] (net)
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2.83 1.41 1.41 v _334904_/B (sky130_fd_sc_hd__nand2_1)
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0.48 0.60 2.01 ^ _334904_/Y (sky130_fd_sc_hd__nand2_1)
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1 0.00 _000345_ (net)
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0.48 0.00 2.01 ^ _392885_/SET_B (sky130_fd_sc_hd__dfbbp_1)
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2.01 data arrival time
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0.00 10.00 10.00 clock clk (rise edge)
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0.00 10.00 clock network delay (ideal)
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0.00 10.00 clock reconvergence pessimism
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10.00 ^ _392885_/CLK (sky130_fd_sc_hd__dfbbp_1)
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-0.07 9.93 library recovery time
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9.93 data required time
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-----------------------------------------------------------------------------
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9.93 data required time
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-2.01 data arrival time
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-----------------------------------------------------------------------------
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7.92 slack (MET)
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Startpoint: _393206_ (rising edge-triggered flip-flop clocked by clk)
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Endpoint: IBusCachedPlugin_cache.ways_0_datas.dir.BANK512[0].RAM512.BANK128[1].RAM128.BLOCK[2].RAM32.SLICE[2].RAM8.WORD[3].W.BYTE[0].B.genblk1.CG
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(rising clock gating-check end-point clocked by clk')
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Path Group: clk
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Path Type: max
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Fanout Cap Slew Delay Time Description
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-----------------------------------------------------------------------------
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0.00 0.00 0.00 clock clk (rise edge)
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0.00 0.00 clock network delay (ideal)
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0.00 0.00 0.00 ^ _393206_/CLK (sky130_fd_sc_hd__dfrtp_1)
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6.94 4.12 4.12 ^ _393206_/Q (sky130_fd_sc_hd__dfrtp_1)
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7 0.82 dBusWB_CYC (net)
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6.94 0.00 4.12 ^ _170980_/A1 (sky130_fd_sc_hd__a21oi_1)
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1.00 0.53 4.65 v _170980_/Y (sky130_fd_sc_hd__a21oi_1)
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3 0.01 _057163_ (net)
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1.00 0.00 4.65 v _170984_/A2 (sky130_fd_sc_hd__o31a_1)
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8.16 6.58 11.23 v _170984_/X (sky130_fd_sc_hd__o31a_1)
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363 1.96 _057167_ (net)
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8.18 0.36 11.59 v _171012_/A1 (sky130_fd_sc_hd__a21oi_1)
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3.13 5.62 17.21 ^ _171012_/Y (sky130_fd_sc_hd__a21oi_1)
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31 0.16 _057195_ (net)
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3.13 0.00 17.21 ^ _174406_/A (sky130_fd_sc_hd__nand2_1)
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0.73 0.75 17.96 v _174406_/Y (sky130_fd_sc_hd__nand2_1)
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8 0.03 _059918_ (net)
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0.73 0.00 17.96 v _174579_/B1 (sky130_fd_sc_hd__o2bb2ai_1)
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1652.94 1197.18 1215.14 ^ _174579_/Y (sky130_fd_sc_hd__o2bb2ai_1)
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13060 87.98 _060082_ (net)
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1653.15 15.89 1231.03 ^ _174590_/A2 (sky130_fd_sc_hd__o21ai_0)
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30.96 22197.20 23428.23 v _174590_/Y (sky130_fd_sc_hd__o21ai_0)
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1024 4.50 IBusCachedPlugin_cache.ways_0_datas.adr[0] (net)
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30.96 4.53 23432.76 v IBusCachedPlugin_cache.ways_0_datas.dir.BANK512[0].RAM512.BANK128[1].RAM128.BLOCK[2].RAM32.SLICE[2].RAM8.DEC0.AND3/C (sky130_fd_sc_hd__and4b_2)
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0.85 12.20 23444.96 v IBusCachedPlugin_cache.ways_0_datas.dir.BANK512[0].RAM512.BANK128[1].RAM128.BLOCK[2].RAM32.SLICE[2].RAM8.DEC0.AND3/X (sky130_fd_sc_hd__and4b_2)
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8 0.09 IBusCachedPlugin_cache.ways_0_datas.dir.BANK512[0].RAM512.BANK128[1].RAM128.BLOCK[2].RAM32.SLICE[2].RAM8.WORD[3].W.SEL0 (net)
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0.85 0.00 23444.96 v IBusCachedPlugin_cache.ways_0_datas.dir.BANK512[0].RAM512.BANK128[1].RAM128.BLOCK[2].RAM32.SLICE[2].RAM8.WORD[3].W.BYTE[0].B.CGAND/A (sky130_fd_sc_hd__and2_1)
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0.91 0.39 23445.36 v IBusCachedPlugin_cache.ways_0_datas.dir.BANK512[0].RAM512.BANK128[1].RAM128.BLOCK[2].RAM32.SLICE[2].RAM8.WORD[3].W.BYTE[0].B.CGAND/X (sky130_fd_sc_hd__and2_1)
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1 0.00 IBusCachedPlugin_cache.ways_0_datas.dir.BANK512[0].RAM512.BANK128[1].RAM128.BLOCK[2].RAM32.SLICE[2].RAM8.WORD[3].W.BYTE[0].B.WE0_WIRE (net)
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|
0.91 0.00 23445.36 v IBusCachedPlugin_cache.ways_0_datas.dir.BANK512[0].RAM512.BANK128[1].RAM128.BLOCK[2].RAM32.SLICE[2].RAM8.WORD[3].W.BYTE[0].B.genblk1.CG/GATE (sky130_fd_sc_hd__dlclkp_1)
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23445.36 data arrival time
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0.00 5.00 5.00 clock clk' (rise edge)
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0.00 5.00 clock network delay (ideal)
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|
0.00 5.00 clock reconvergence pessimism
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|
5.00 ^ IBusCachedPlugin_cache.ways_0_datas.dir.BANK512[0].RAM512.BANK128[1].RAM128.BLOCK[2].RAM32.SLICE[2].RAM8.WORD[3].W.BYTE[0].B.genblk1.CG/CLK (sky130_fd_sc_hd__dlclkp_1)
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-0.36 4.64 library setup time
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4.64 data required time
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-----------------------------------------------------------------------------
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4.64 data required time
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-23445.36 data arrival time
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-----------------------------------------------------------------------------
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-23440.72 slack (VIOLATED)
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==========================================================================
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global place report_checks -unconstrained
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--------------------------------------------------------------------------
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Startpoint: externalResetVector[21] (input port clocked by clk)
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Endpoint: _392885_ (recovery check against rising-edge clock clk)
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Path Group: **async_default**
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Path Type: max
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Fanout Cap Slew Delay Time Description
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-----------------------------------------------------------------------------
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0.00 0.00 0.00 clock clk (rise edge)
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0.00 0.00 clock network delay (ideal)
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|
0.00 0.00 v input external delay
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0.00 0.00 0.00 v externalResetVector[21] (in)
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|
2 0.78 externalResetVector[21] (net)
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2.83 1.41 1.41 v _334904_/B (sky130_fd_sc_hd__nand2_1)
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0.48 0.60 2.01 ^ _334904_/Y (sky130_fd_sc_hd__nand2_1)
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1 0.00 _000345_ (net)
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0.48 0.00 2.01 ^ _392885_/SET_B (sky130_fd_sc_hd__dfbbp_1)
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2.01 data arrival time
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|
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0.00 10.00 10.00 clock clk (rise edge)
|
|
0.00 10.00 clock network delay (ideal)
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|
0.00 10.00 clock reconvergence pessimism
|
|
10.00 ^ _392885_/CLK (sky130_fd_sc_hd__dfbbp_1)
|
|
-0.07 9.93 library recovery time
|
|
9.93 data required time
|
|
-----------------------------------------------------------------------------
|
|
9.93 data required time
|
|
-2.01 data arrival time
|
|
-----------------------------------------------------------------------------
|
|
7.92 slack (MET)
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|
|
|
|
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Startpoint: _393206_ (rising edge-triggered flip-flop clocked by clk)
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Endpoint: IBusCachedPlugin_cache.ways_0_datas.dir.BANK512[0].RAM512.BANK128[1].RAM128.BLOCK[2].RAM32.SLICE[2].RAM8.WORD[3].W.BYTE[0].B.genblk1.CG
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(rising clock gating-check end-point clocked by clk')
|
|
Path Group: clk
|
|
Path Type: max
|
|
|
|
Fanout Cap Slew Delay Time Description
|
|
-----------------------------------------------------------------------------
|
|
0.00 0.00 0.00 clock clk (rise edge)
|
|
0.00 0.00 clock network delay (ideal)
|
|
0.00 0.00 0.00 ^ _393206_/CLK (sky130_fd_sc_hd__dfrtp_1)
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|
6.94 4.12 4.12 ^ _393206_/Q (sky130_fd_sc_hd__dfrtp_1)
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7 0.82 dBusWB_CYC (net)
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6.94 0.00 4.12 ^ _170980_/A1 (sky130_fd_sc_hd__a21oi_1)
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|
1.00 0.53 4.65 v _170980_/Y (sky130_fd_sc_hd__a21oi_1)
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3 0.01 _057163_ (net)
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1.00 0.00 4.65 v _170984_/A2 (sky130_fd_sc_hd__o31a_1)
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|
8.16 6.58 11.23 v _170984_/X (sky130_fd_sc_hd__o31a_1)
|
|
363 1.96 _057167_ (net)
|
|
8.18 0.36 11.59 v _171012_/A1 (sky130_fd_sc_hd__a21oi_1)
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|
3.13 5.62 17.21 ^ _171012_/Y (sky130_fd_sc_hd__a21oi_1)
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|
31 0.16 _057195_ (net)
|
|
3.13 0.00 17.21 ^ _174406_/A (sky130_fd_sc_hd__nand2_1)
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|
0.73 0.75 17.96 v _174406_/Y (sky130_fd_sc_hd__nand2_1)
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|
8 0.03 _059918_ (net)
|
|
0.73 0.00 17.96 v _174579_/B1 (sky130_fd_sc_hd__o2bb2ai_1)
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|
1652.94 1197.18 1215.14 ^ _174579_/Y (sky130_fd_sc_hd__o2bb2ai_1)
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|
13060 87.98 _060082_ (net)
|
|
1653.15 15.89 1231.03 ^ _174590_/A2 (sky130_fd_sc_hd__o21ai_0)
|
|
30.96 22197.20 23428.23 v _174590_/Y (sky130_fd_sc_hd__o21ai_0)
|
|
1024 4.50 IBusCachedPlugin_cache.ways_0_datas.adr[0] (net)
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|
30.96 4.53 23432.76 v IBusCachedPlugin_cache.ways_0_datas.dir.BANK512[0].RAM512.BANK128[1].RAM128.BLOCK[2].RAM32.SLICE[2].RAM8.DEC0.AND3/C (sky130_fd_sc_hd__and4b_2)
|
|
0.85 12.20 23444.96 v IBusCachedPlugin_cache.ways_0_datas.dir.BANK512[0].RAM512.BANK128[1].RAM128.BLOCK[2].RAM32.SLICE[2].RAM8.DEC0.AND3/X (sky130_fd_sc_hd__and4b_2)
|
|
8 0.09 IBusCachedPlugin_cache.ways_0_datas.dir.BANK512[0].RAM512.BANK128[1].RAM128.BLOCK[2].RAM32.SLICE[2].RAM8.WORD[3].W.SEL0 (net)
|
|
0.85 0.00 23444.96 v IBusCachedPlugin_cache.ways_0_datas.dir.BANK512[0].RAM512.BANK128[1].RAM128.BLOCK[2].RAM32.SLICE[2].RAM8.WORD[3].W.BYTE[0].B.CGAND/A (sky130_fd_sc_hd__and2_1)
|
|
0.91 0.39 23445.36 v IBusCachedPlugin_cache.ways_0_datas.dir.BANK512[0].RAM512.BANK128[1].RAM128.BLOCK[2].RAM32.SLICE[2].RAM8.WORD[3].W.BYTE[0].B.CGAND/X (sky130_fd_sc_hd__and2_1)
|
|
1 0.00 IBusCachedPlugin_cache.ways_0_datas.dir.BANK512[0].RAM512.BANK128[1].RAM128.BLOCK[2].RAM32.SLICE[2].RAM8.WORD[3].W.BYTE[0].B.WE0_WIRE (net)
|
|
0.91 0.00 23445.36 v IBusCachedPlugin_cache.ways_0_datas.dir.BANK512[0].RAM512.BANK128[1].RAM128.BLOCK[2].RAM32.SLICE[2].RAM8.WORD[3].W.BYTE[0].B.genblk1.CG/GATE (sky130_fd_sc_hd__dlclkp_1)
|
|
23445.36 data arrival time
|
|
|
|
0.00 5.00 5.00 clock clk' (rise edge)
|
|
0.00 5.00 clock network delay (ideal)
|
|
0.00 5.00 clock reconvergence pessimism
|
|
5.00 ^ IBusCachedPlugin_cache.ways_0_datas.dir.BANK512[0].RAM512.BANK128[1].RAM128.BLOCK[2].RAM32.SLICE[2].RAM8.WORD[3].W.BYTE[0].B.genblk1.CG/CLK (sky130_fd_sc_hd__dlclkp_1)
|
|
-0.36 4.64 library setup time
|
|
4.64 data required time
|
|
-----------------------------------------------------------------------------
|
|
4.64 data required time
|
|
-23445.36 data arrival time
|
|
-----------------------------------------------------------------------------
|
|
-23440.72 slack (VIOLATED)
|
|
|
|
|
|
|
|
==========================================================================
|
|
global place report_tns
|
|
--------------------------------------------------------------------------
|
|
tns -57064752.00
|
|
|
|
==========================================================================
|
|
global place report_wns
|
|
--------------------------------------------------------------------------
|
|
wns -23440.72
|
|
|
|
==========================================================================
|
|
global place report_worst_slack
|
|
--------------------------------------------------------------------------
|
|
worst slack -23440.72
|
|
|
|
==========================================================================
|
|
global place report_clock_skew
|
|
--------------------------------------------------------------------------
|
|
Clock clk
|
|
Latency CRPR Skew
|
|
IBusCachedPlugin_cache.ways_0_datas.dir.BANK512[0].RAM512.BANK128[2].RAM128.BLOCK[3].RAM32.SLICE[1].RAM8.WORD[6].W.BYTE[0].B.BIT[6].genblk1.STORAGE/GATE ^
|
|
0.26
|
|
IBusCachedPlugin_cache.ways_0_datas.dir.BANK512[0].RAM512.BANK128[2].RAM128.BLOCK[3].RAM32.Do0_FF[6]/CLK ^
|
|
0.00 0.00 0.26
|
|
|
|
|
|
==========================================================================
|
|
global place report_power
|
|
--------------------------------------------------------------------------
|
|
Group Internal Switching Leakage Total
|
|
Power Power Power Power
|
|
----------------------------------------------------------------
|
|
Sequential 4.25e-01 2.16e-02 9.12e-07 4.46e-01 12.3%
|
|
Combinational 2.73e+00 4.51e-01 8.63e-07 3.18e+00 87.7%
|
|
Macro 0.00e+00 0.00e+00 0.00e+00 0.00e+00 0.0%
|
|
Pad 0.00e+00 0.00e+00 0.00e+00 0.00e+00 0.0%
|
|
----------------------------------------------------------------
|
|
Total 3.15e+00 4.72e-01 1.77e-06 3.62e+00 100.0%
|
|
87.0% 13.0% 0.0%
|
|
|
|
==========================================================================
|
|
global place report_design_area
|
|
--------------------------------------------------------------------------
|
|
Design area 4874394 u^2 24% utilization.
|
|
|
|
Elapsed time: 14:19.41[h:]min:sec. CPU time: user 845.86 sys 13.41 (99%). Peak memory: 14352804KB.
|