You cannot select more than 25 topics Topics must start with a letter or number, can include dashes ('-') and can be up to 35 characters long.
openpowerwtf d5fc9bcd00 add lcb strobe and cleanup array logic 1 year ago
..
img init 2 years ago
8T-SRAM Publication.pdf init 2 years ago
IEEE Xplore Full-Text PDF_doublepumprf.pdf add lcb strobe and cleanup array logic 1 year ago
Limited_switch_dynamic_logic_circuits_for_high-speed_low-power_circuit_design.pdf init 2 years ago
Open Toy-SRAM test chip 062021.pdf init 2 years ago
Practical Strategies for Power-Efficient Computing Technologies.pdf init 2 years ago
Toy-sram 062021.pdf init 2 years ago
cells.md init 2 years ago
cells.txt init 2 years ago
readme.md init 2 years ago
slide1.png init 2 years ago
slide2.png init 2 years ago
slide3.png init 2 years ago

readme.md

General Notes

SDR/DDR

  • logical wrappers instantiate hard array
  • SDR: use multiple hard array instances to add ports
  • DDR: use early/late pulses to double read/write ports

DDR Implementation

  • strobes are generated from clk based on configurable delay parameters

Test site arrays

  • 2R1W, SDR - this is the sdr hard array and simple logical wrapper using single clock
  • 4R2W, DDR - this is the ddr hard array and double-rate logical wrapper generating early/late pulses

Configuration options

  • SDR clock frequency (external to logical array)

  • DDR clock frequency (external to logical array)

  • SDR Pulse Control

  • DDR Pulse Control