cores
/
toy-sram
mirror of https://github.com/OpenPOWERFoundation/toy-sram
4
1
Fork 0
Code Releases Activity
You cannot select more than 25 topics Topics must start with a letter or number, can include dashes ('-') and can be up to 35 characters long.
master
Branches Tags
${ item.name }
Create tag ${ searchTerm }
Create branch ${ searchTerm }
from '2e11a03ffb'
${ noResults }
toy-sram/rtl
History
openpowerwtf 2e11a03ffb add gen parm for 16x12 or 32x12 subarray 2 years ago
..
build init 2 years ago
sim add gen parm for 16x12 or 32x12 subarray 2 years ago
src add gen parm for 16x12 or 32x12 subarray 2 years ago
readme.md init 2 years ago

readme.md

Logical Array Wrapper

  • verilog is in rtl/src/array
  • parameter determines sim vs tech during rtl compile

Physical Array

  • custom cell(s) to be designed
  • custom/

Test Site

  • verilog is in rtl/src/site
  • supporting logic for test and debug through available Caravel connections

Verification

  • rtl/sim/coco

Caravel