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344 lines
12 KiB
TeX
344 lines
12 KiB
TeX
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\section{Workgroup name}
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LibreBMC \acrfull{SIG}
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\section{Definitions}
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Reference the OpenPOWER Foundation \acrshort{IPR} Policy and OpenPOWER WorkGroup Process for additional term definitions.
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\begin{enumerate}
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\item
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``Maintainer" is an Eligible or Non-Eligible participant of the workgroup that has been elected by Full Majority Vote to review and
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approve changes to the LibreBMC code in the git repository(ies) created by this \acrshort{SIG}.
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\end{enumerate}
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\section{Description}
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The LibreBMC \acrshort{SIG} is a project workgroup whose purpose is to create a reference design of an open source \acrfull{BMC} compatible
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with the \acrfull{OCP} \acrfull{DC-SCM} specification, named ``LibreBMC".\par
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The goal of the \acrshort{SIG} is advance the state of the open source hardware community through the design and implementation of LibreBMC.
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The SIG will use many open source tools and components, including open POWER \acrshort{ISA} processor soft core, \acrfull{RTL}
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for all required \acrshort{BMC} interfaces and controls, design and synthesis tools, \acrfull{PDK}'s, \acrshort{DC-SCM} board reference designs and
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\acrshort{BMC} software to design and implement LibreBMC in order to contribute to their growth and usability.\par
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The purpose of LibreBMC is to be a fully open source \acrshort{BMC} design which will enhance the security of
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server management control by utilizing open hardware and software, and designed with fully open source tooling.\par
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The requirement of a POWER \acrshort{ISA} core will drive the design and open release of a new or improved POWER soft-core.
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\section{Scope}
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The scope of the LibreBMC \acrshort{SIG} is the creation of a functional \acrshort{BMC} prototype.
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The prototype will include a \acrshort{DC-SCM} card design with a \acrfull{FPGA} controller.
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The \acrshort{FPGA} image will consist of a POWER \acrshort{ISA} core(s) that can run the OpenBMC stack (including \acrfull{LSB}) and
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manage the interface between system-management software and platform hardware.
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The \acrshort{FPGA} image will also have all controls and interfaces required of a typical \acrshort{BMC}.\par
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LibreBMC will be compatible with the \acrshort{OCP} \acrshort{DC-SCM} specification.
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Any changes to the \acrshort{OCP} \acrshort{DC-SCM} specification is outside the scope of this workgroup and will be handled through \acrshort{OCP}.\par
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LibreBMC should meet the requirements to manage a variety of server architectures, including but not limited to POWER, ARM, and x86 based systems.
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Any changes to system reference designs or specifications to use LibreBMC are outside the scope of this workgroup.\par
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The scope of the workgroup will require the use of Linux, OpenBMC, open source tools, interfaces, and components.
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Any modifications of these are outside the scope of the workgroup and will be handled through their respective bodies.\par
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\section{Similar Activities}
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\begin{itemize}
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\item
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Accelerator Workgroup : may work with to define the requirements for open tooling needed to complete the implementation of LibreBMC components.
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\item
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Compliance Workgroup : defines the compliancy requirements for the Power ISA core to be used in LibreBMC.
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\item
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HW Architecture Workgroup : maintains the hardware architecture specifications that may be needed by this workgroup to properly architect
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LibreBMC and functions use to manage and communicate with a system.
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\item
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System Software Workgroup : owns definition, documentation, and maintenance of the firmware required to boot, run, and manage Linux on
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OpenPOWER compliant systems that will run on LibreBMC.
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\item
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Development Platform Workgroup : defines the reference architecture of future OpenPower systems that may incorporate and use LibreBMC to
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manage the system.
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\end{itemize}
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\section{Users}
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\begin{itemize}
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\item
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Any system vendor, datacenter operator, or cloud provider that plans to use a \acrshort{BMC},
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compatible with the \acrshort{OCP} \acrshort{DC-SCM} form factor to manage their system.
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\item
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Any third-party hardware manufacturer that choose to build \acrshort{BMC}s compatible with the \acrshort{DC-SCM} specification.
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\item
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Any monitoring / base software vendors.
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\end{itemize}
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\section{Work Product}
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\begin{itemize}
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\item
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\acrshort{FPGA} \acrshort{RTL} for a POWER \acrshort{ISA} soft-core
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\item
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\acrshort{FPGA} \acrshort{RTL} that includes the soft-core and all required interfaces and controls
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\item
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Working LibreBMC prototype
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\item
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Demonstration of LibreBMC managing a system
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\end{itemize}
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The \acrshort{FPGA} \acrshort{RTL} and reference material will be open to the general public and maintained in a public git repository(ies).
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\section{Projects}
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\begin{itemize}
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\item
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Design an \acrshort{FPGA} based POWER \acrshort{ISA} soft-core capable of running OpenBMC that meets reasonable performance requirements
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\item
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Design and build an \acrshort{FPGA} image for LibreBMC that contains one or more of the POWER \acrshort{ISA} soft cores,
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along with the required interfaces and controls, that is capable of managing a server.
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\item
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Create required material to properly document how to recreate and use the design.
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\item
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Build a prototype of LibreBMC.
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\item
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Demonstrate the operability of LibreBMC containing the above mentioned \acrshort{FPGA} image in a server.
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\end{itemize}
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\section{Participation}
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Public\par
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Participation and voting right requirements are as outlined per the OpenPOWER Work Group Process.\par
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A minimum of one participant will be required to be a Maintainer of the LibreBMC git repository(ies).
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Maintainer(s) will have the responsibility to review and approve any requested updates to the code in the repository(ies).
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Any disagreement with the decision of a Maintainer can be appealed to the Workgroup Chair and
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the Chair has the discretion to bring the issue to a vote of the Workgroup.\par
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\section{Work Group Convener}
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Paul Lecocq (IBM)
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\section{Meeting Plan:}
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Paul Lecocq will convene the first meeting.\par
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The first meeting will be at 5p CST on the second Wednesday after the TSC and BoD approve the formation of the SIG.
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Subsequent meetings will be held bi-weekly alternating between 5p CST Wednesday and 10a CST Thursday to accommodate participants in all time zones.
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\section{Participants}
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\begin{itemize}
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\item
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IBM
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\begin{itemize}
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\item
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Paul Lecocq (lecocq@us.ibm.com)
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\item
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Paul Mackerras (pmac@au1.ibm.com)
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\item
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Steve Roberts (robers@us.ibm.com)
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\end{itemize}
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\item
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Google
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\begin{itemize}
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\item
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Tim Ansel (tansell@google.com)
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\end{itemize}
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\item
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Antmicro
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\begin{itemize}
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\item
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Michael Gielda (mgielda@antmicro.com)
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\end{itemize}
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\item
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Raptor Computing Systems
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\begin{itemize}
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\item
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Timothy Pearson (tpearson@raptorengineering.com)
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\end{itemize}
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VanTosh
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\begin{itemize}
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\item
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Toshaan Bharvani (toshaan@vantosh.com)
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\end{itemize}
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Yadro
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\begin{itemize}
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\item
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Alexey Stepanov (a.stepanov@yadro.com)
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\end{itemize}
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\end{itemize}
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\section{Balloting Approval Requirements}
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While the WG aims to operate as a consensus based community from time to time a WG decision may require a vote to move a Project forward.\par
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Standard WG Process applies with the following specific requirements with respect to Maintainers :
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\begin{itemize}
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\item
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Election of repository Maintainer(s) will be by Full Majority Vote.
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A Maintainer can be removed from their position as Maintainer by Full Majority Vote as well.
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\item
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The initial Maintainer(s) will be voted in prior to setting up the git repository for the project.
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\end{itemize}
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\section{Member Organization Support}
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Member organization support will be confirmed as part of the approval process.
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\section{Anticipated Contributions}
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\begin{itemize}
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\item
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POWER \acrshort{ISA} Core \acrshort{RTL}
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\item
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\acrshort{RTL} created as part of the workgroup deliverable
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\item
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\acrshort{OCP} \acrshort{DC-SCM} compatible board schematics
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\end{itemize}
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\section{IPR, Confidentiality \& Licensing}
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The following sections may not be modified after chartering. Changes require closing and submitting a new charter.
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\subsection{Confidentiality Mode}
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Non-confidential
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\subsection{IPR Policy}
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Code Mode
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\subsection{Open Source Licensing Mode}
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Apache License, v2.0\par
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All Code contributed to the WG by a WG Member or WG Party shall be licensed to OpenPOWER under Apache License, V2.0
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with the condition that the patent license granted in Section 3 of the License, as applied to the ``Work", hereby
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includes implementations of the Work in physical form.\par
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Code contributed to the WG by a WG member or WG party may be licensed to OpenPOWER under a future open hardware license with
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WG, TSC, and Board approval.\par
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All contributions to the WG's git repository must include a developer certificate of originality.
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Non-Eligible person contributions to the git repository are bound to a Guest Participation Agreement.
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The Guest Participation Agreement for this WG is agreement to the terms of the OS license as defined in the OS Licensing Mode and
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documented in the license file within the WG's git repository.\par
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The Guest Participation Agreement is agreed to automatically upon any contribution to the WG's git repository.
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Any contributions made outside the WG's git repository by a non-Eligible person must include a signed
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Contribution / Feedback License as defined in Section 7.1 and Appendix A of the OpenPOWER IPR Policy.
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Alternatively this WG can provide a Guest Participation Agreement to be signed per Section 7.2.\par
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The executed Contribution / Feedback License or Guest Participation Agreement must be sent to librebmc@openpowerfoundation.org.\par
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As a default position, all Code that is, or is made part of, an OpenPOWER Deliverable shall be licensed out by OpenPOWER under one of the following
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licenses and shall at least be provided in source code form.
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The selected license will include or be accompanied by a clarification that any necessary license rights for the Power \acrshort{ISA} comes from
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the POWER \acrshort{ISA} license and is not granted under the selected license for the OpenPOWER Deliverable.
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\begin{itemize}
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\item
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Apache License, V2.0 with the condition that the patent license granted in Section 3 of the License, as applied to the ``Work",
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hereby includes implementations of the Work in physical form.
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\item
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a future open hardware license with WG, TSC, and Board approval.
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\end{itemize}
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\subsection{Open Source Communities}
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This WG may accept Code from the following OS Communities under their respective licenses.
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\begin{itemize}
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\item
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LiteX
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\begin{itemize}
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\item
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https://github.com/enjoy-digital/litex
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\item
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2-Clause BSD
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\end{itemize}
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\item
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Microwatt POWER ISA Core
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\begin{itemize}
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\item
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https://github.com/antonblanchard/microwatt
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\item
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Apache license, Version 2.0
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\end{itemize}
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\item
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Antmicro DC-SCM board
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\begin{itemize}
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\item
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https://github.com/antmicro/artix-dc-scm (ecp5-dc-scm)
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\item
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Apache license, Version 2.0
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\end{itemize}
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\end{itemize}
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This WG may accept other OS Code under a Permissive License such as Apache License, v2.0, 2 or 3 clause BSD, MIT, ISC,
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or other \acrshort{OS} license approved by this WG, TSC and Board.\par
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This WG may contribute Code to the following \acrshort{OS} Communities under either the respective \acrshort{OS} Communities
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required license or an approved WG deliverable license as defined in the above \acrshort{OS} Licensing Mode.\par
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\begin{itemize}
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\item
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OpenBMC
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\begin{itemize}
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\item
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https://github.com/openbmc
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\item
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Apache license, Version 2.0
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\end{itemize}
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\item
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LiteX
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\begin{itemize}
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\item
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https://github.com/enjoy-digital/litex
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\item
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2-Clause BSD
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\end{itemize}
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Microwatt POWER ISA Core
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\begin{itemize}
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\item
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https://github.com/antonblanchard/microwatt
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\item
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Apache License, Version 2.0
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\end{itemize}
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Antmicro DC-SCM board
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\begin{itemize}
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\item
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o https://github.com/antmicro/artix-dc-scm or ecp5-dc-scm
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\item
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Apache license, Version 2.0
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\end{itemize}
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SymbiFlow
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\begin{itemize}
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\item
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https://symbiflow.github.io/
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\item
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ISC License
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\end{itemize}
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Yosys
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\begin{itemize}
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\item
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http://www.clifford.at/yosys/
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\item
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ISC License
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\end{itemize}
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Project X-Ray
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\begin{itemize}
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\item
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https://github.com/SymbiFlow/prjxray
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\item
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ISC License
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\end{itemize}
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\end{itemize}
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This WG may accept or contribute Code from/to additional OS Communities with approval by the WG, TSC, and Board.
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Any code accepted from or contributed to approved OS Communities must be under a Permissive License such as
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Apache License, v2.0, 2 or 3 clause BSD, MIT, ISC, or other OS license approved by the WG, TSC, and Board.
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