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---
title: Meeting Minutes 2023-02-22
date: 2023-02-22
attendees:
- toddrosedahl,ibm
- toshaanbharvani,vantosh
- timansell,google
- michaelneuling,ibm
- jeremykerr,codeconstruct
- lukeleighton,redsemiconductor
- davidcalderwood,redsemiconductor
- andreymiroshnikov,redsemiconductor
- cesarstrauss,libre-soc
- lancealbertson,oregeonstateuniversity
- jameskulina,linuxfoundation
- munirahmad,lattice
draft: false
---

# LibreBMC SIG Meeting

Meeting date: 22 Feb 2023
Access link: https://zoom.us/j/91597478078
Meeting ID: 91597478078 - Todd this zoom ID is listed as "Invalid" by Zoom!!!

* https://us02web.zoom.us/j/84454712886?pwd=eVh3ejYydCtsOXhjeGRrTFh6Z25oUT09
* Meeting ID: 844 5471 2886
* Passcode: 962360


# Call to Order

### Anti-trust Reminder

This is a reminder that all OpenPOWER Foundation activities are subject to strict compliance with the OpenPOWER Foundation’s Antitrust Guidelines. Each individual participant and attendee at this meeting is responsible for knowing the contents of the Antitrust Guidelines, and for complying with the Antitrust Guidelines. Copies of the Antitrust Guidelines are available at: [Antitrust Guidelines](https://files.openpower.foundation/s/k5Hny649q3XHSqk)

### Meeting Recording

Meeting is being recorded

# AGENDA

## New attendees?

## OCP 2022 and SC 2022 readout

* There was a great deal of discussion and presentations and announcements around DC-SCM and RoT/security solutions. It seems clear that this will be an area of industry focus and activity this year.
* Caliptra
* Hydra
* OpenTitan

* The OPF/OCP booth highlighted the following:
* **Code Construct has successfully booted the AC922 with the DC-SCM card and OpenBMC!!**
* There were press releases and a demo (video) at the booth
* **Jeremy Kerr -- Overview/update on this?**

* **A new company, Axiado, has joined the OPF and they showed their DC-SCM/FPGA implementation that boots the AC922**
* This is different than LibreBMC, but proves out the same concepts and is intended to be a commercial offering -- though hardened into an ASIC not as an FPGA. The content they have will not fit on an FPGA currently.
* This was a live demo at the booth
* There were press releases and other demo's as well at the booth that described their implementation and future plans
* **Josel -- Any updates since SC22?**
* **Todd To send Axiado info to Mikey or upload - This is done. Sent to Mikey and posted on the slack channel**
* **The new open source POWER ISA based Computer Architecture curriculum, created by Vtech, was be showcased/advertised**
* We had handouts and a QR code that links to the curriculum information.
* Vtech will potentially be further enhancing the curriculum
* Hoping other universities will use the curriculum and enhance it
* https://github.com/w-feng/CompArch-MIPS-POWER

**Todd** presented (along with Just Thaler from Jabil) at OCP on the some of the issues we face as we move toward modular hardware.
https://drive.google.com/file/d/1AGfbLXUGoCuea4jKpVj8cRqDGKvlKEWZ/view
**Todd** was on a panel where the libreBMC solution was presented and next steps/future work was discussed.

## Discuss Goals for 2023

Ideas for disussion:
a. X-86 support
b. Performance improvements
c. Add support for the new POWER core
d. Build a new AC922 interposer due to hardware issues with the existing one. This will not solve the hardware issues with the DC-SCM card. (although not a perfect solution, klayout can import GERBER files and re-create the netlist, followed by schematic and PCB. it's a pain but editing is actually possible. of course it is better to have the original CAD files.)
e. Add support for ECP5
f. Add simulation (renode?)
g. Find other ways to lower the barrier to entry – can we get a set-up running on a hub. **Maybe OSU -- Max?**
h. Add caliptra to BMC on DC-SCM card. But Caliptra may not be easily integratable into an FPGA. Could just have a Caliptra based ASIC on the DC-SCM connector.
i. Replace Microwatt with LibreSOC (which has Formal Correctness Proofs for its pipelines: important for engendering trust in functionality)
j. Bunny from BeTrusted has the some functions needed for an FPGA based ROT. Maybe work with him to create an FPGA based ROT.
k. See the list of project ideas below as well

## New Co-Chair

* Todd is stepping down as co-chair
* Ask for volunteers and vote in a new co-chair to run the Australian time zone call
- Jeremy Kerr
* Vote
- IBM : YES
- VanTosh : YES
- OSU : YES

## OCP DC-SCM 2.0 Working Group and updates

The WG continues to discuss updates/improvements to the standard.


## Communication / Collaboration


* Calendar invites are working now it seems.


* Standing Reminder: Everyone should be posting things into the #librebmc-sig slack channel.


## Gateware

Update?




## Simulation

* Renode looks like a good option for a simulation environment for LibreBMC.

## Soft Cores

* OPF is funding an FPGA optimized POWER soft core
* Target was "VexRISCV" resource usage and performance. **We should get a progress readout at a future meeting.**

## Toolchain

Updates?

## Software

Updates?


## Project Ideas -- Running list of areas where we could use help

* **Near term project ideas -- things that could be worked on now**
* Get a page going on the OPF web page that we can point people to. **This is still a WIP. Not sure how exactly to format it**


* Linux-on-Litex-VexRiscV => Linux-on-Litex-Microwatt (/cc Anton)
* https://github.com/litex-hub/linux-on-litex-power
* There is a demo showing linux running on VexRiscV
* https://github.com/litex-hub/linux-on-litex-vexriscv
* Replicate that demo using Microwatt
* https://antmicro.com/blog/2020/05/multicore-vex-in-litex/
* This can be started now and questions asked/answered in the open
* Ask questions on github or on IRC #litex channel on Libera

* Add emulation of LPC peripheral to Renode (/cc Piotr)
* Questions asked/answered github
* Karol/Piotr can help as well directly

* Add CI so we know when litex breaks
* See FPGA CI from Antmicro
* https://github.com/chipsalliance/f4pga-examples
* https://builds.antmicro.com/results/invocations/f2f9d40b-e7d7-4dde-a3c3-4a9271a5bfaf
* https://builds.antmicro.com/results/invocations/f2f9d40b-e7d7-4dde-a3c3-4a9271a5bfaf?target=xc7_counter_test_arty_35
* https://builds.antmicro.com/results/invocations/f2f9d40b-e7d7-4dde-a3c3-4a9271a5bfaf?target=xc7_litex_demo_vexriscv_arty_35
* See work from Carl Karsten <cfkarsten@gmail.com> - https://docs.google.com/document/d/1jyodwCNK-9mokDAe6X1AMhEDPW-qPeqPTHI-z9aUGVg/edit#
* **Could point students to Carl**
* See recent work from Enjoy Digital - https://twitter.com/enjoy_digital/status/1514192833070174208?s=20
* We have an ecosystem of :micropython, u-boot, linux.
* All work, but only in specific configs. Documenting and testing those configurations would be a good project.
* Could use Zephyr
* https://antmicro.com/blog/2021/11/renode-zephyr-dashboard-100-boards/
* https://antmicro.com/blog/2022/03/test-driven-development-of-zephyr-micro-ros-with-renode/
* https://antmicro.com/blog/2019/12/tflite-in-zephyr-on-litex-vexriscv/
* Define a boot loader for microwatt
* Make it work across configurations (arty, orangecrab)



* **Mid-term ideas -- things that need more definition**

* Include the firmware into the CI infrastructure
* Need LiteX-Hub support and integration
* Add more FPGA boards supports
* Get it running on Raspbery PI
* Linux on LiteX VexRISCV like repository
* An example for just running a POWER Linux system on as many FPGA development boards as possible?
* https://github.com/litex-hub/linux-on-litex-vexriscv -- >30 boards supported...
* Repository exists - https://github.com/litex-hub/linux-on-litex-power

* Improving Ethernet performance.
* https://github.com/rprinz08/hBPF


* **Further Project Ideas from Tim Ansell:**
* It would be great to get help with getting GHDL into conda-eda
* https://github.com/hdl/conda-eda/issues/171
* https://github.com/hdl/conda-eda/pull/180
* It would be great to get help with adding POWER support into conda-eda
* https://github.com/hdl/conda-eda/pull/3
* It would be great to investigate "EDA Containers" for usage with LiteX
* https://github.com/hdl/containers/issues/40
* https://twitter.com/carlosedp

* **NLnet funding / Grant application idea**
* https://nlnet.nl/entrust/
* Libre-BMC definitely qualifies for privacy and enhanced trust
* suggestion: proposal covers *dual* FPGAs connected back-to-back
* one BMC client, one BMC server
* one has Libre-BMC, but it uploads linux OS to the *other* FPGA
* bonus points: swap in an ASPEED 2500 or Nuvoton BMC for interoperability testing
* primary focus: keep cost down so that more people can use it / collaborate!
* if proposal is ONLY for EUR 10,000 servers then NLnet will likely go "hmmm" and reject on the basis of "reduced benefit to users"
* EU aspect strongly recommended but once satisfied, other people world-wide can be "pulled in" and receive funds (e.g. ADG India Group)
* also recommend inviting 3mdeb (OPF Member, coreboot developers) to collaborate (helps satisfy EU aspect)
* **Toshaan and Luke update?**
## Workgroup Collaboration Tools

* [Meeting Minutes](https://meetingminutes.openpower.foundation/librebmc/)
https://meetingminutes.openpower.foundation/librebmc/
* Meeting invites are still not seeming to get mailed?
* Long term TODO : Need to make the system actually sends emails with ical attachments. It will take awhile to make this work. Rather we should have interested parties import the cal and get notifications.
* [WebSys Document](https://files.openpower.foundation/s/Sj756P5B39T7XnP)


- OPF Discuss (with calendar and link to chat)
https://discuss.openpower.foundation/c/sig/librebmc/11
webcal://discuss.openpower.foundation/c/sig/librebmc/l/calendar.ics

- Slack / IRC / Mattermost
https://openpowerfoundation.slack.com/archives/C01UVKFKUQY
https://chat.openpower.foundation/opf/channels/librebmc
#librebmc on libera (namespace)
https://chat.openpower.foundation/opf/channels/librebmc

- OPF Files
https://files.openpower.foundation/s/iZRseq3XLtRcjtX

- OPF Discuss
https://discuss.openpower.foundation/c/sig/librebmc/11

- OPF GIT repository
https://git.openpower.foundation/librebmc/librebmc
Will be mirrored to github and gitlab

- OPF Kanban (linked with chat)
https://kanban.openpower.foundation/b/hgDqwnbiZDHFR3B3b/librebmc

## Community Involvement

* Options for not needing an AC922
* FPGA on both sides (emulating the HPM)
* Raptor has such a board that has an FPGA on both sides
* Can just use QEMU and simulate the AC922 side
* Hosted on a Hub
* How do we generate more activity/interest
* Engage Universities -- There are interested universities
* Start a list of universities and contacts. Consider making an OPF "Education Page" that points to these projects as well as the OpenPOWER curriculum being developed. Then we can all point our education contacts to that page.
* Need clear work breakdown. We have this for some projects.
* Need Mentors.
* Offer badges/certificates
* Offer Bounties
* Major League Hacking Interships
* Start end of May.
* Need to sign up by end of March
* Must have sponsors to guide students and hold office hours
* To use MLH, We need BoD (Board of Directors) approval
* Need work items clearly identified and easily understood
* It was suggested that we should have a logo for libreBMC. Any thoughts from the team. Nice to have, but should not be a focus right now.


## Next Meeting

{{< localdatetime date="2023-3-9" time="16:00" >}}


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